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Change subject: [WIP] include/post_code: Reorganize POST code to range specific header
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76099/comment/53158fd5_9c09c49b :
PS3, Line 2: lilacious
> Would it be possible to use your full namee Yuchen He? […]
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Change subject: include/amdblocks/post_code.h: Change post code prefix to POSTCODE
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76046/comment/bf3ffe10_b7c27d11 :
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> Would it be possible to use your full namee Yuchen He? […]
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Change subject: include/intel/post_code.h: Change post code prefix to POSTCODE
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76044/comment/e7feb31f_fe68be65 :
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> Would it be possible to use your full namee *Yuchen He*? […]
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Change subject: include/intelblocks/post_code.h: Change post code prefix to POSTCODE
......................................................................
Patch Set 4:
(1 comment)
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Attention is currently required from: Felix Singer, Yuchen He.
Hello Felix Singer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76099?usp=email
to look at the new patch set (#4).
Change subject: [WIP] include/post_code: Reorganize POST code to range specific header
......................................................................
[WIP] include/post_code: Reorganize POST code to range specific header
Relocate POST code macros to a main post_code folder with multiple
header files. In each is a description of the header and POST code
ranges proposed by Martin Roth.
This is an initial implementation and highly work in progress. Hence,
critiques, opinions and ideas are welcome!
Change-Id: Ic140f6bd46f6de2ba31db453aac5cbfd3bd4be84
Signed-off-by: Yuchen He <yuchenhe126(a)gmail.com>
---
A src/include/post_code/acpi.h
A src/include/post_code/bootstage.h
A src/include/post_code/coreboot.h
A src/include/post_code/debug.h
A src/include/post_code/driver.h
A src/include/post_code/error.h
A src/include/post_code/mainboard.h
A src/include/post_code/post_code_unregulated.h
A src/include/post_code/soc.h
A src/include/post_code/vendorcode.h
10 files changed, 148 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/76099/4
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Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel, Yuchen He.
Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76046?usp=email
to look at the new patch set (#4).
Change subject: include/amdblocks/post_code.h: Change post code prefix to POSTCODE
......................................................................
include/amdblocks/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.
The files was changed by running the following bash script from the
top level directory.
filedir=src/soc/amd/common/block/include/amdblocks/post_codes.h
sed -i'' '1,${s/#define POST_/#define POSTCODE_/g;}' $filedir
myArray=`grep -e "^#define POSTCODE_" $filedir | grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`
for str in ${myArray[@]}; do
splitstr=`echo $str | cut -d '_' -f2-`
grep -r POST_$splitstr src | cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g"
done
Change-Id: I7c0963391b2ed647048d741b087d8ee01dd7bdde
Signed-off-by: Yuchen He <yuchenhe126(a)gmail.com>
---
M src/drivers/amd/agesa/cache_as_ram.S
M src/soc/amd/cezanne/romstage.c
M src/soc/amd/common/block/cpu/car/cache_as_ram.S
M src/soc/amd/common/block/cpu/noncar/pre_c.S
M src/soc/amd/common/block/include/amdblocks/post_codes.h
M src/soc/amd/glinda/romstage.c
M src/soc/amd/mendocino/romstage.c
M src/soc/amd/phoenix/romstage.c
M src/soc/amd/picasso/romstage.c
M src/soc/amd/stoneyridge/bootblock.c
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/romstage.c
12 files changed, 39 insertions(+), 39 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/76046/4
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Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76045?usp=email
to look at the new patch set (#4).
Change subject: include/intelblocks/post_code.h: Change post code prefix to POSTCODE
......................................................................
include/intelblocks/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.
The files was changed by running the following bash script from the
top level directory.
filedir=src/soc/intel/common/block/include/intelblocks/post_codes.h
sed -i'' '1,${s/#define POST_/#define POSTCODE_/g;}' $filedir
myArray=`grep -e "^#define POSTCODE_" $filedir | grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`
for str in ${myArray[@]}; do
splitstr=`echo $str | cut -d '_' -f2-`
grep -r POST_$splitstr src | cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g"
done
Change-Id: Ie84abb6cfd467dd51c0d62111306969ecab5313b
Signed-off-by: Yuchen He <yuchenhe126(a)gmail.com>
---
M src/drivers/amd/agesa/cache_as_ram.S
M src/soc/amd/common/block/cpu/car/cache_as_ram.S
M src/soc/amd/common/block/cpu/noncar/pre_c.S
M src/soc/amd/common/block/include/amdblocks/post_codes.h
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/include/intelblocks/post_codes.h
7 files changed, 25 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/76045/4
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Attention is currently required from: Felix Singer, Yuchen He.
Hello Felix Singer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76044?usp=email
to look at the new patch set (#4).
Change subject: include/intel/post_code.h: Change post code prefix to POSTCODE
......................................................................
include/intel/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.
The files was changed by running the following bash script from the
top level directory.
filedir=src/include/cpu/intel/post_codes.h
sed -i'' '1,${s/#define POST_/#define POSTCODE_/g;}' $filedir
myArray=`grep -e "^#define POSTCODE_" $filedir | grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`
for str in ${myArray[@]}; do
splitstr=`echo $str | cut -d '_' -f2-`
grep -r POST_$splitstr src | cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g"
done
Change-Id: Id2ca654126fc5b96e6b40d222bb636bbf39ab7ad
Signed-off-by: Yuchen He <yuchenhe126(a)gmail.com>
---
M src/cpu/intel/car/core2/cache_as_ram.S
M src/cpu/intel/car/non-evict/cache_as_ram.S
M src/cpu/intel/car/non-evict/exit_car.S
M src/cpu/intel/car/p3/cache_as_ram.S
M src/cpu/intel/car/p4-netburst/cache_as_ram.S
M src/cpu/intel/car/p4-netburst/exit_car.S
M src/include/cpu/intel/post_codes.h
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
M src/soc/intel/common/block/include/intelblocks/post_codes.h
9 files changed, 71 insertions(+), 71 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/76044/4
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Attention is currently required from: Christian Walter, Eric Lai, Michael Niewöhner, Patrick Rudolph, Tarun Tuli, Yuchen He.
Hello Christian Walter, Eric Lai, Felix Singer, Michael Niewöhner, Patrick Rudolph, Tarun Tuli, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75960?usp=email
to look at the new patch set (#5).
The following approvals got outdated and were removed:
Code-Review+2 by Eric Lai, Verified+1 by build bot (Jenkins)
Change subject: mb/{cfl,cml,whl}: Use true/false macros for s0ix_enable dt option
......................................................................
mb/{cfl,cml,whl}: Use true/false macros for s0ix_enable dt option
The true/false macros give the reader a better understanding about how
the option should be used. Thus, replace 0/1 with false/true.
While on it, remove the quotes from the option name and from the value.
Coffeelake, Cometlake and Whiskeylake mainboards which use that option
were changed by the following command ran from the top level directory.
dt_line="chip soc/intel/cannonlake" && \
option="s0ix_enable" && \
grep -r "${dt_line}" src/mainboard | \
cut -d ':' -f 1 | \
xargs sed -i'' -e "s/\"${option}\".*\=.*\"1\"/${option} \= true/g" -e "s/\"${option}\".*\=.*\"0\"/${option} \= false/g"
Change-Id: Ibfd1b1dc7d3a210e30d7007876f5aa8a8a0d4d34
Signed-off-by: Yuchen He <yuchenhe126(a)gmail.com>
---
M src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb
M src/mainboard/google/drallion/variants/drallion/devicetree.cb
M src/mainboard/google/hatch/variants/baseboard/devicetree.cb
M src/mainboard/google/puff/variants/baseboard/devicetree.cb
M src/mainboard/google/sarien/variants/arcada/devicetree.cb
M src/mainboard/google/sarien/variants/sarien/devicetree.cb
M src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb
M src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb
M src/mainboard/prodrive/hermes/devicetree.cb
9 files changed, 9 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/75960/5
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