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TangYiwei has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75722?usp=email )
Change subject: mb/bytedance: Add 2 SPR sockets server board bd_egs
......................................................................
Patch Set 13:
(1 comment)
File src/mainboard/bytedance/bd_egs/Kconfig:
https://review.coreboot.org/c/coreboot/+/75722/comment/b13e8d3b_ab7a1b34 :
PS10, Line 32: default "\\_SB.C%03d"
> Hi Yiwei, could you check if you remove this line will it still works on your side?
Hi Sheng,
It's workable on my side because below PR has been merged,
https://review.coreboot.org/c/coreboot/+/73368
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Change subject: mb/google/dedede/var/pirika: Add new Codec ALC5650
......................................................................
Patch Set 2: Code-Review+1
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Change subject: mb/google/dedede/var/pirika: Add new Codec ALC5650
......................................................................
mb/google/dedede/var/pirika: Add new Codec ALC5650
1.Add Codec ALC5650 setings for drivers/i2c/generic
2.Add option value '3' to AUDIO_CODEC_SOURCE for SSFC
BUG=b:284060672
BRANCH=master
TEST=emerge-dedede coreboot chromeos-ec chromeos-bootimage
Confirm the device is existed on system.
Change-Id: I39703a950620c90aa3740b7313b7d32cc68eede4
Signed-off-by: Daniel_Peng <Daniel_Peng(a)pegatron.corp-partner.google.com>
---
M src/mainboard/google/dedede/variants/pirika/overridetree.cb
1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/75918/2
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Change subject: mb/bytedance: Add 2 SPR sockets server board bd_egs
......................................................................
mb/bytedance: Add 2 SPR sockets server board bd_egs
Bytedance bd_egs is a dual socket MB with Intel Sapphire Rapids
Scalable Processor chipset.
It's utilising:
- 2 SPR sockets
- Max 32 DIMMs
- 33x CPU PCIe slots
- AST2600 for VGA and BMC remote management
Test:
The board boots to Linux 5.10 with all 192 cores available.
All PCIe devices and DIMMS are working.
# sudo dmesg --level alert,crit,err,warn
[ 46.636896] netlink: 'consul': attribute type 1 has an invalid length.
Change-Id: I091bc78e39cd76b3c6b9a10a1fcf58e9d671ef5d
Co-authored-by: Jinfeng Li <lijinfeng01(a)ieisystem.com>
Co-authored-by: Long Cao <caolong01(a)inspur.com>
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Co-authored-by: Dong Wei <weidong.wd(a)bytedance.com>
Co-authored-by: Chenchen Li <lichenchen.carl(a)bytedance.com>
Signed-off-by: Yiwei Tang <tangyiwei.2022(a)bytedance.com>
Reviewed-by: Haitao Nie <niehaitao(a)bytedance.com>
Reviewed-by: Shijian Ge <geshijian(a)bytedance.com>
---
A src/mainboard/bytedance/Kconfig
A src/mainboard/bytedance/Kconfig.name
A src/mainboard/bytedance/bd_egs/Kconfig
A src/mainboard/bytedance/bd_egs/Kconfig.name
A src/mainboard/bytedance/bd_egs/Makefile.inc
A src/mainboard/bytedance/bd_egs/acpi/platform.asl
A src/mainboard/bytedance/bd_egs/board.fmd
A src/mainboard/bytedance/bd_egs/board_info.txt
A src/mainboard/bytedance/bd_egs/bootblock.c
A src/mainboard/bytedance/bd_egs/devicetree.cb
A src/mainboard/bytedance/bd_egs/dsdt.asl
A src/mainboard/bytedance/bd_egs/gpio.c
A src/mainboard/bytedance/bd_egs/gpio.h
A src/mainboard/bytedance/bd_egs/include/sprsp_bd_iio.h
A src/mainboard/bytedance/bd_egs/ramstage.c
A src/mainboard/bytedance/bd_egs/romstage.c
16 files changed, 757 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/75722/13
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......................................................................
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flashrom does not support libftdi 0.20 anymore and it's not used by
anything else. Its build systems (Makefile and Meson) only references
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......................................................................
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flashrom does not support libusb 0.1 anymore and it's not used by
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