coreboot-gerrit June 2023

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[M] Change in coreboot[master]: [UNTESTED] soc/amd/phoenix/chip: use common data fabric domain resour...
by Felix Held (Code Review) 01 Jun '23

01 Jun '23

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier. Hello Fred Reitberger, Jason Glenesk, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75559?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: [UNTESTED] soc/amd/phoenix/chip: use common data fabric domain resource code ...................................................................... [UNTESTED] soc/amd/phoenix/chip: use common data fabric domain resource code Use the new common AMD code that gets the usable non-fixed MMIO windows from the data fabric MMIO decode registers and generate the PCI0 _CRS ACPI code based on those regions. For a more detailed description see the corresponding patch that changes the Picasso code to use this new code. BUG=b:283495475 TEST=None Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I425876c4ef470574e00e123d36101641240c98cf --- M src/soc/amd/phoenix/Kconfig M src/soc/amd/phoenix/acpi/pci0.asl M src/soc/amd/phoenix/chip.c M src/soc/amd/phoenix/root_complex.c 4 files changed, 4 insertions(+), 63 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/75559/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75559?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I425876c4ef470574e00e123d36101641240c98cf Gerrit-Change-Number: 75559 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel/apollolake: Switch to snake case for SataPortsEnable
by Mario Scheithauer (Code Review) 01 Jun '23

01 Jun '23

Attention is currently required from: Felix Singer, Jan Samek, Mario Scheithauer, Maxim Polyakov, Nico Huber, Sean Rhodes, Werner Zeh. Hello Felix Singer, Jan Samek, Maxim Polyakov, Nico Huber, Sean Rhodes, Werner Zeh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75553?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Jan Samek, Code-Review+1 by Nico Huber, Code-Review+2 by Felix Singer Change subject: soc/intel/apollolake: Switch to snake case for SataPortsEnable ...................................................................... soc/intel/apollolake: Switch to snake case for SataPortsEnable For a unification of the naming convension, change to snake case style for parameter 'SataPortsEnable'. Change-Id: I0df35125360eb42a03d5445011d72842cb2b8d7e Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/intel/apollolake_rvp/devicetree.cb M src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb M src/mainboard/intel/leafhill/devicetree.cb M src/mainboard/intel/minnow3/devicetree.cb M src/mainboard/kontron/mal10/variants/mal10/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb M src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb M src/mainboard/starlabs/lite/variants/glk/devicetree.cb M src/mainboard/starlabs/lite/variants/glkr/devicetree.cb M src/mainboard/up/squared/devicetree.cb M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/chip.h 16 files changed, 28 insertions(+), 28 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/75553/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/75553?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0df35125360eb42a03d5445011d72842cb2b8d7e Gerrit-Change-Number: 75553 Gerrit-PatchSet: 3 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/rex/var/screebo: Add devicetree config for support audio AL...
by Subrata Banik (Code Review) 01 Jun '23

01 Jun '23

Attention is currently required from: Kapil Porwal, Rui Zhou, Simon Zhou, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75575?usp=email ) Change subject: mb/google/rex/var/screebo: Add devicetree config for support audio ALC1019_ALC5682I_I2S ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/rex/Kconfig: https://review.coreboot.org/c/coreboot/+/75575/comment/fa37f81d_81377d38 : PS2, Line 4: select DRIVERS_GENERIC_MAX98357A : select DRIVERS_GENERIC_ALC1015 can you please move this under screebo Kconfig.name? -- To view, visit https://review.coreboot.org/c/coreboot/+/75575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2814cc76aff43daf0353cfef41592591bbe3d213 Gerrit-Change-Number: 75575 Gerrit-PatchSet: 2 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Simon Zhou <zhouguohui(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 01 Jun 2023 10:55:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex/var/screebo: Add devicetree config for support audio AL...
by Simon Zhou (Code Review) 01 Jun '23

01 Jun '23

Attention is currently required from: Kapil Porwal, Subrata Banik, Tarun Tuli. Simon Zhou has uploaded a new patch set (#2) to the change originally created by Rui Zhou. ( https://review.coreboot.org/c/coreboot/+/75575?usp=email ) Change subject: mb/google/rex/var/screebo: Add devicetree config for support audio ALC1019_ALC5682I_I2S ...................................................................... mb/google/rex/var/screebo: Add devicetree config for support audio ALC1019_ALC5682I_I2S Add devicetree config for ALC1019_ALC5682I_I2S BUG=b:278169268 TEST=emerge-rex coreboot and verified on screebo Change-Id: I2814cc76aff43daf0353cfef41592591bbe3d213 Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/rex/Kconfig M src/mainboard/google/rex/variants/screebo/overridetree.cb 2 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/75575/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2814cc76aff43daf0353cfef41592591bbe3d213 Gerrit-Change-Number: 75575 Gerrit-PatchSet: 2 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd/common/data_fabric/domain: provide scan_bus and read_resources
by Felix Held (Code Review) 01 Jun '23

01 Jun '23

Attention is currently required from: Arthur Heymans, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74717?usp=email ) Change subject: soc/amd/common/data_fabric/domain: provide scan_bus and read_resources ...................................................................... Patch Set 12: (1 comment) Patchset: PS11: > leaving an unresolved comment since this depends on CB:67018 which will soon be submitted Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74717?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4aada7c8a2a43145ad08d11d0a38d9cdc182b98e Gerrit-Change-Number: 74717 Gerrit-PatchSet: 12 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Jun 2023 10:27:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: device/allocator: Allow for multiple domain resources of a type
by Felix Held (Code Review) 01 Jun '23

01 Jun '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67018?usp=email ) Change subject: device/allocator: Allow for multiple domain resources of a type ...................................................................... device/allocator: Allow for multiple domain resources of a type Don't assume only one IO and one MEM domain resource. Currently the code is awkward for bridge devices where loops over resources are done twice. This would be avoided on top of other patches that improve the allocator (topic:allocator) by adding a top-down mode. However those patches break the tree and having the option to have multiple resources per type would make it easier to get those patches in without breaking the tree. Change-Id: I3d3a60c9a4438accdb06444e2b50cc9b0b2eb009 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67018 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/device/resource_allocator_v4.c 1 file changed, 69 insertions(+), 64 deletions(-) Approvals: Nico Huber: Looks good to me, but someone else must approve Varshit Pandya: Looks good to me, but someone else must approve build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/device/resource_allocator_v4.c b/src/device/resource_allocator_v4.c index 511c450..2f4ea12 100644 --- a/src/device/resource_allocator_v4.c +++ b/src/device/resource_allocator_v4.c @@ -215,14 +215,14 @@ } } -static unsigned char get_alignment_by_resource_type(const struct resource *res) +static unsigned char get_alignment_by_resource_type(const unsigned long type) { - if (res->flags & IORESOURCE_MEM) + if (type & IORESOURCE_MEM) return 12; /* Page-aligned --> log2(4KiB) */ - else if (res->flags & IORESOURCE_IO) + else if (type & IORESOURCE_IO) return 0; /* No special alignment required --> log2(1) */ - die("Unexpected resource type: flags(%lu)!\n", res->flags); + die("Unexpected resource type: flags(%lu)!\n", type); } /* @@ -303,20 +303,31 @@ * satisfy resource requests from downstream devices for allocations * above 4G. */ -static void initialize_domain_memranges(struct memranges *ranges, const struct resource *res, +static void initialize_domain_memranges(const struct device *dev, struct memranges *ranges, unsigned long memrange_type) { - unsigned char align = get_alignment_by_resource_type(res); + unsigned char align = get_alignment_by_resource_type(memrange_type); memranges_init_empty_with_alignment(ranges, NULL, 0, align); - if (is_resource_invalid(res)) - return; + struct resource *res; + for (res = dev->resource_list; res != NULL; res = res->next) { + if (is_resource_invalid(res)) + continue; + if (res->flags & IORESOURCE_FIXED) + continue; + if ((res->flags & IORESOURCE_TYPE_MASK) != memrange_type) + continue; - if (res->flags & IORESOURCE_IO) - initialize_domain_io_resource_memranges(ranges, res, memrange_type); - else - initialize_domain_mem_resource_memranges(ranges, res, memrange_type); + printk(BIOS_DEBUG, "%s %s: base: %llx size: %llx align: %d gran: %d limit: %llx\n", + dev_path(dev), resource2str(res), res->base, res->size, res->align, + res->gran, res->limit); + + if (res->flags & IORESOURCE_IO) + initialize_domain_io_resource_memranges(ranges, res, memrange_type); + else + initialize_domain_mem_resource_memranges(ranges, res, memrange_type); + } } /* @@ -335,15 +346,22 @@ * downstream resources of the same type under the bridge get allocated * above 4G. */ -static void initialize_bridge_memranges(struct memranges *ranges, const struct resource *res, +static void initialize_bridge_memranges(const struct device *dev, struct memranges *ranges, unsigned long memrange_type) { - unsigned char align = get_alignment_by_resource_type(res); + unsigned char align = get_alignment_by_resource_type(memrange_type); memranges_init_empty_with_alignment(ranges, NULL, 0, align); - if (is_resource_invalid(res)) - return; + struct resource *res; + for (res = dev->resource_list; res != NULL; res = res->next) { + if (is_resource_invalid(res)) + continue; + if (res->flags & IORESOURCE_FIXED) + continue; + if ((res->flags & (IORESOURCE_TYPE_MASK | IORESOURCE_PREFETCH)) == memrange_type) + break; + } memranges_insert(ranges, res->base, res->limit - res->base + 1, memrange_type); } @@ -485,32 +503,41 @@ * windows which cannot be used for resource allocation as fixed * resources. */ -static void setup_resource_ranges(const struct device *dev, const struct resource *res, - unsigned long type, struct memranges *ranges) +static void setup_resource_ranges(const struct device *dev, unsigned long type, + struct memranges *ranges) { - printk(BIOS_DEBUG, "%s %s: base: %llx size: %llx align: %d gran: %d limit: %llx\n", - dev_path(dev), resource2str(res), res->base, res->size, res->align, - res->gran, res->limit); - if (dev->path.type == DEVICE_PATH_DOMAIN) { - initialize_domain_memranges(ranges, res, type); + initialize_domain_memranges(dev, ranges, type); constrain_domain_resources(dev, ranges, type); } else { - initialize_bridge_memranges(ranges, res, type); + initialize_bridge_memranges(dev, ranges, type); } print_resource_ranges(dev, ranges); } -static void cleanup_resource_ranges(const struct device *dev, struct memranges *ranges, - const struct resource *res) +static void print_resource_done(const struct device *dev, const struct resource *res) { - memranges_teardown(ranges); printk(BIOS_DEBUG, "%s %s: base: %llx size: %llx align: %d gran: %d limit: %llx done\n", dev_path(dev), resource2str(res), res->base, res->size, res->align, res->gran, res->limit); } +static void cleanup_domain_resource_ranges(const struct device *dev, struct memranges *ranges, + unsigned long type) +{ + memranges_teardown(ranges); + for (struct resource *res = dev->resource_list; res != NULL; res = res->next) { + if (is_resource_invalid(res)) + continue; + if (res->flags & IORESOURCE_FIXED) + continue; + if ((res->flags & IORESOURCE_TYPE_MASK) != type) + continue; + print_resource_done(dev, res); + } +} + /* * Pass 2 of the resource allocator at the bridge level loops through * all the resources for the bridge and generates a list of memory @@ -547,9 +574,10 @@ type_match = res->flags & type_mask; - setup_resource_ranges(bridge, res, type_match, &ranges); + setup_resource_ranges(bridge, type_match, &ranges); allocate_child_resources(bus, &ranges, type_mask, type_match); - cleanup_resource_ranges(bridge, &ranges, res); + print_resource_done(bridge, res); + memranges_teardown(&ranges); } for (child = bus->children; child; child = child->sibling) { @@ -560,22 +588,6 @@ } } -static const struct resource *find_domain_resource(const struct device *domain, - unsigned long type) -{ - const struct resource *res; - - for (res = domain->resource_list; res; res = res->next) { - if (res->flags & IORESOURCE_FIXED) - continue; - - if ((res->flags & IORESOURCE_TYPE_MASK) == type) - return res; - } - - return NULL; -} - /* * Pass 2 of resource allocator begins at the domain level. Every domain * has two types of resources - io and mem. For each of these resources, @@ -593,16 +605,12 @@ { struct memranges ranges; struct device *child; - const struct resource *res; /* Resource type I/O */ - res = find_domain_resource(domain, IORESOURCE_IO); - if (res) { - setup_resource_ranges(domain, res, IORESOURCE_IO, &ranges); - allocate_child_resources(domain->link_list, &ranges, IORESOURCE_TYPE_MASK, - IORESOURCE_IO); - cleanup_resource_ranges(domain, &ranges, res); - } + setup_resource_ranges(domain, IORESOURCE_IO, &ranges); + allocate_child_resources(domain->link_list, &ranges, IORESOURCE_TYPE_MASK, + IORESOURCE_IO); + cleanup_domain_resource_ranges(domain, &ranges, IORESOURCE_IO); /* * Resource type Mem: @@ -621,17 +629,14 @@ * the 4G boundary are handled separately by setting the type_mask and * type_match to allocate_child_resources() accordingly. */ - res = find_domain_resource(domain, IORESOURCE_MEM); - if (res) { - setup_resource_ranges(domain, res, IORESOURCE_MEM, &ranges); - allocate_child_resources(domain->link_list, &ranges, - IORESOURCE_TYPE_MASK | IORESOURCE_ABOVE_4G, - IORESOURCE_MEM); - allocate_child_resources(domain->link_list, &ranges, - IORESOURCE_TYPE_MASK | IORESOURCE_ABOVE_4G, - IORESOURCE_MEM | IORESOURCE_ABOVE_4G); - cleanup_resource_ranges(domain, &ranges, res); - } + setup_resource_ranges(domain, IORESOURCE_MEM, &ranges); + allocate_child_resources(domain->link_list, &ranges, + IORESOURCE_TYPE_MASK | IORESOURCE_ABOVE_4G, + IORESOURCE_MEM); + allocate_child_resources(domain->link_list, &ranges, + IORESOURCE_TYPE_MASK | IORESOURCE_ABOVE_4G, + IORESOURCE_MEM | IORESOURCE_ABOVE_4G); + cleanup_domain_resource_ranges(domain, &ranges, IORESOURCE_MEM); for (child = domain->link_list->children; child; child = child->sibling) { if (!dev_has_children(child)) -- To view, visit https://review.coreboot.org/c/coreboot/+/67018?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d3a60c9a4438accdb06444e2b50cc9b0b2eb009 Gerrit-Change-Number: 67018 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/rex/var/screebo: Add devicetree config for support audio AL...
by Rui Zhou (Code Review) 01 Jun '23

01 Jun '23

Rui Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75575?usp=email ) Change subject: mb/google/rex/var/screebo: Add devicetree config for support audio ALC1019_ALC5682I_I2S ...................................................................... mb/google/rex/var/screebo: Add devicetree config for support audio ALC1019_ALC5682I_I2S Add devicetree config for ALC1019_ALC5682I_I2S BUG=b:278169268 TEST=emerge-rex coreboot and verified on screebo Change-Id: I2814cc76aff43daf0353cfef41592591bbe3d213 Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/rex/Kconfig M src/mainboard/google/rex/variants/screebo/overridetree.cb 2 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/75575/1 diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index 9ddd9fd..759e74f 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -2,6 +2,7 @@ def_bool n select BOARD_ROMSIZE_KB_32768 select DRIVERS_GENERIC_MAX98357A + select DRIVERS_GENERIC_ALC1015 select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID select DRIVERS_INTEL_DPTF diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb index e1b3d22b..e8792c2 100644 --- a/src/mainboard/google/rex/variants/screebo/overridetree.cb +++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb @@ -336,6 +336,22 @@ device generic 0 on end end end + device ref i2c0 on + chip drivers/i2c/generic + register "hid" = ""RTL5682"" + register "name" = ""RT58"" + register "desc" = ""Headset Codec"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_B06)" + # Set the jd_src to RT5668_JD1 for jack detection + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on + probe AUDIO ALC1019_ALC5682I_I2S + end + end + end device ref i2c3 on chip drivers/i2c/generic register "hid" = ""ELAN0000"" @@ -391,5 +407,14 @@ end end end + device ref hda on + chip drivers/generic/alc1015 + register "hid" = ""RTL1019"" + register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B07)" + device generic 0 on + probe AUDIO ALC1019_ALC5682I_I2S + end + end + end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/75575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2814cc76aff43daf0353cfef41592591bbe3d213 Gerrit-Change-Number: 75575 Gerrit-PatchSet: 1 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: mb/google/rex: Enable ISH support
by Subrata Banik (Code Review) 01 Jun '23

01 Jun '23

Attention is currently required from: Bernardo Perez Priego, Boris Mittelberg, Caveh Jalali, Gwendal Grignou, Harsha B R, Jamie Ryu, Jay Patel, Kapil Porwal, Li1 Feng, Paul Menzel, Tarun Tuli, Vijay P Hiremath, Wonkyu Kim. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75039?usp=email ) Change subject: mb/google/rex: Enable ISH support ...................................................................... Patch Set 13: (1 comment) File src/mainboard/google/rex/Kconfig: https://review.coreboot.org/c/coreboot/+/75039/comment/9bdc062b_73d88a76 : PS13, Line 111: default "variants/\$(CONFIG_VARIANT_DIR)/overridetree_ec_ish.cb" if DRIVERS_INTEL_ISH > I would think so. Including the ISH into devicetree requires `DRIVERS_INTEL_ISH`, which is only selected by `BOARD_GOOGLE_REX_EC_ISH`. See [75470/Kconfig.name](https://review.coreboot.org/c/coreboot/+/75470/2/src/ma… > > The change below in overridetree.cb without `DRIVERS_INTEL_ISH` causes build failure. > ``` > device ref ish on > probe ISH ISH_ENABLE > chip drivers/intel/ish > register "firmware_name" = ""rex_ish.bin"" > device generic 0 on end > end > end > ``` the cost of maintaining different override*.cb is too much. I would rather suggest to move DRIVERS_INTEL_ISH under both rex0 and rex_ec_ish and keep only one *.cb override file. -- To view, visit https://review.coreboot.org/c/coreboot/+/75039?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe0e1b8ce2c9b08ac6b1e6fef9bd19afc9b4f59f Gerrit-Change-Number: 75039 Gerrit-PatchSet: 13 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jay Patel <jay2.patel(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)gmail.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jay Patel <jay2.patel(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Attention: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Thu, 01 Jun 2023 10:21:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: comment

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[NoOp] Change in coreboot[master]: mb/google/rex/var/screebo: Add devicetree config for support audio AL...
by Rui Zhou (Code Review) 01 Jun '23

01 Jun '23

Rui Zhou has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75461?usp=email ) Change subject: mb/google/rex/var/screebo: Add devicetree config for support audio ALC1019_ALC5682I_I2S ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/75461?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ad6548e4fe47189b8463f4e796cc3b3f9e6db55 Gerrit-Change-Number: 75461 Gerrit-PatchSet: 5 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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[NoOp] Change in coreboot[master]: mb/google/rex/var/screebo: Add devicetree config for support audio AL...
by Rui Zhou (Code Review) 01 Jun '23

01 Jun '23

Rui Zhou has restored this change. ( https://review.coreboot.org/c/coreboot/+/75461?usp=email ) Change subject: mb/google/rex/var/screebo: Add devicetree config for support audio ALC1019_ALC5682I_I2S ...................................................................... Restored -- To view, visit https://review.coreboot.org/c/coreboot/+/75461?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ad6548e4fe47189b8463f4e796cc3b3f9e6db55 Gerrit-Change-Number: 75461 Gerrit-PatchSet: 5 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: restore

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