coreboot-gerrit June 2023

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[M] Change in coreboot[master]: mb/google/rex/variants/ovis: Add USB configuration
by Kapil Porwal (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Jakub Czapiga, Tarun Tuli. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75578?usp=email ) Change subject: mb/google/rex/variants/ovis: Add USB configuration ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/rex/variants/ovis/overridetree.cb: https://review.coreboot.org/c/coreboot/+/75578/comment/311046ee_99dad761 : PS1, Line 89: device ref tcss_dma0 on : chip drivers/intel/usb4/retimer : register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)" : use tcss_usb3_port1 as dfp[0].typec_port : device generic 0 on end : end : end : device ref tcss_dma1 on : chip drivers/intel/usb4/retimer : register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)" : use tcss_usb3_port2 as dfp[0].typec_port : device generic 0 on end : end : end `tcss_usb3_port3` is missing from here. ``` device ref tcss_dma0 on chip drivers/intel/usb4/retimer register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)" use tcss_usb3_port1 as dfp[0].typec_port device generic 0 on end end chip drivers/intel/usb4/retimer register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)" use tcss_usb3_port2 as dfp[1].typec_port device generic 0 on end end end device ref tcss_dma1 on chip drivers/intel/usb4/retimer register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)" use tcss_usb3_port3 as dfp[0].typec_port device generic 0 on end end end ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/75578?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc81f12ec6cc4af37bcc1fcf3164cbfa5612a443 Gerrit-Change-Number: 75578 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 09:44:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex/variants/ovis: Add SPI configuration
by Kapil Porwal (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Jakub Czapiga, Tarun Tuli. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75577?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/rex/variants/ovis: Add SPI configuration ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/rex/variants/ovis/overridetree.cb: https://review.coreboot.org/c/coreboot/+/75577/comment/5d69efc7_aa9821bf : PS1, Line 4: PchSerialIoIndexGSPI0 You are not using gspi0 yet. -- To view, visit https://review.coreboot.org/c/coreboot/+/75577?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f3fa6543a4cec8c2562196105f17fbc7831bab7 Gerrit-Change-Number: 75577 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 09:16:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex/variants/ovis: Add SSD card config
by Kapil Porwal (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Jakub Czapiga, Tarun Tuli. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75576?usp=email ) Change subject: mb/google/rex/variants/ovis: Add SSD card config ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75576?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3795313e784595ac02ee2a38f466bcb9e613a6a4 Gerrit-Change-Number: 75576 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 09:11:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/apollolake: Switch to snake case for SataPortsEnable
by Jan Samek (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Felix Singer, Mario Scheithauer, Maxim Polyakov, Nico Huber, Sean Rhodes, Werner Zeh. Jan Samek has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75553?usp=email ) Change subject: soc/intel/apollolake: Switch to snake case for SataPortsEnable ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75553?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0df35125360eb42a03d5445011d72842cb2b8d7e Gerrit-Change-Number: 75553 Gerrit-PatchSet: 4 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 09:08:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/dedede/var/taranza: Update memory part and generate SPD ID
by Sheng-Liang Pan (Code Review) 02 Jun '23

02 Jun '23

Sheng-Liang Pan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75605?usp=email ) Change subject: mb/google/dedede/var/taranza: Update memory part and generate SPD ID ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75605?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87a4dcdb6196c3ca7bed4b5c1bc654297339c16d Gerrit-Change-Number: 75605 Gerrit-PatchSet: 1 Gerrit-Owner: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 09:00:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/xeon_sp/spr: Add chip config to enable x2apic
by Lean Sheng Tan (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Christian Walter, Johnny Lin, Naresh Solanki, Paul Menzel, Tim Chu. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75581?usp=email ) Change subject: soc/intel/xeon_sp/spr: Add chip config to enable x2apic ...................................................................... Patch Set 1: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/75581?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81e9f473d0400173afd25278845be5ff34fd7e04 Gerrit-Change-Number: 75581 Gerrit-PatchSet: 1 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 08:59:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/xeon_sp/spr: Add chip config to enable x2apic
by Arthur Heymans (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Christian Walter, Johnny Lin, Naresh Solanki, Paul Menzel, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75581?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/intel/xeon_sp/spr: Add chip config to enable x2apic ...................................................................... Patch Set 1: Code-Review-1 (1 comment) File src/soc/intel/xeon_sp/spr/romstage.c: https://review.coreboot.org/c/coreboot/+/75581/comment/8bd4e10e_720bfd17 : PS1, Line 162: /* : * Let coreboot configure LAPIC based on Kconfig. : * coreboot currently can only switch from XAPIC to X2APIC, : * so always select XAPIC mode here. : */ This comment explains why 0 is a good value. -- To view, visit https://review.coreboot.org/c/coreboot/+/75581?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81e9f473d0400173afd25278845be5ff34fd7e04 Gerrit-Change-Number: 75581 Gerrit-PatchSet: 1 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 08:58:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/dedede/var/taranza: Update memory part and generate SPD ID
by Sheng-Liang Pan (Code Review) 02 Jun '23

02 Jun '23

Sheng-Liang Pan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75605?usp=email ) Change subject: mb/google/dedede/var/taranza: Update memory part and generate SPD ID ...................................................................... mb/google/dedede/var/taranza: Update memory part and generate SPD ID Add supported memory parts in the mem_parts_used.txt and generate the SPD ID for the parts. The memory parts being added are: 1. K4U6E3S4AB-MGCL 2. K4UBE3D4AB-MGCL BUG=b:285504022 BRANCH=dedede TEST=build Signed-off-by: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Change-Id: I87a4dcdb6196c3ca7bed4b5c1bc654297339c16d --- M src/mainboard/google/dedede/variants/taranza/memory/Makefile.inc M src/mainboard/google/dedede/variants/taranza/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt 3 files changed, 8 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/75605/1 diff --git a/src/mainboard/google/dedede/variants/taranza/memory/Makefile.inc b/src/mainboard/google/dedede/variants/taranza/memory/Makefile.inc index 43f5136..563fc9a 100644 --- a/src/mainboard/google/dedede/variants/taranza/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/taranza/memory/Makefile.inc @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/taranza/memory/ src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/taranza/memory/ src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D1NP-046 WT:B +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D1NP-046 WT:B, K4U6E3S4AB-MGCL +SPD_SOURCES += spd/lp4x/set-1/spd-3.hex # ID = 1(0b0001) Parts = K4UBE3D4AB-MGCL diff --git a/src/mainboard/google/dedede/variants/taranza/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/taranza/memory/dram_id.generated.txt index c3e8e42..e77699e 100644 --- a/src/mainboard/google/dedede/variants/taranza/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/taranza/memory/dram_id.generated.txt @@ -1,7 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# ./util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/taranza/memory/ src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/taranza/memory/ src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt DRAM Part Name ID to assign MT53E512M32D1NP-046 WT:B 0 (0000) +K4U6E3S4AB-MGCL 0 (0000) +K4UBE3D4AB-MGCL 1 (0001) diff --git a/src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt index b85681b..529f52d4 100644 --- a/src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/taranza/memory/mem_parts_used.txt @@ -10,3 +10,5 @@ # Part Name MT53E512M32D1NP-046 WT:B +K4U6E3S4AB-MGCL +K4UBE3D4AB-MGCL -- To view, visit https://review.coreboot.org/c/coreboot/+/75605?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87a4dcdb6196c3ca7bed4b5c1bc654297339c16d Gerrit-Change-Number: 75605 Gerrit-PatchSet: 1 Gerrit-Owner: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/xeon_sp/spr: Add RMT config
by Lean Sheng Tan (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Naresh Solanki, Tim Chu. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75416?usp=email ) Change subject: soc/intel/xeon_sp/spr: Add RMT config ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75416?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b9276116c22cfbbec132d7a1b0026a52a51398a Gerrit-Change-Number: 75416 Gerrit-PatchSet: 3 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 08:48:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp/spr: Add RMT config
by Lean Sheng Tan (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Naresh Solanki, Tim Chu. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75416?usp=email ) Change subject: soc/intel/xeon_sp/spr: Add RMT config ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/xeon_sp/spr/Kconfig: https://review.coreboot.org/c/coreboot/+/75416/comment/5c1be4f1_6ae4a040 : PS3, Line 185: EN_RMT ENABLE_RMT -- To view, visit https://review.coreboot.org/c/coreboot/+/75416?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b9276116c22cfbbec132d7a1b0026a52a51398a Gerrit-Change-Number: 75416 Gerrit-PatchSet: 3 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Jun 2023 08:47:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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