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Change subject: mb/google/nissa/var/joxer: Remove VBOOT_GSC_BOARD_ID config
......................................................................
mb/google/nissa/var/joxer: Remove VBOOT_GSC_BOARD_ID config
Board IDs are now filled in as part of the signing process, so we don't
need to set them in coreboot.
BUG=b:240620735
TEST=Build and check VBOOT_GSC_BOARD_ID is set to ZZCR.
Change-Id: I7dda8ad59046a1dd9a28595e037eda86e91c98df
Signed-off-by: Reka Norman <rekanorman(a)chromium.org>
---
M src/mainboard/google/brya/Kconfig
1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/75641/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index ce10aa7..893ec6a 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -292,10 +292,6 @@
select VBOOT_EARLY_EC_SYNC if !BOARD_GOOGLE_BASEBOARD_NISSA
select VBOOT_LID_SWITCH
-config VBOOT_GSC_BOARD_ID
- string
- default "LBTV" if BOARD_GOOGLE_JOXER
-
config DIMM_SPD_SIZE
default 512
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Change subject: Docs: Update the 4.19 release notes to match the server version
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Change subject: Docs: Update the 4.19 release notes to match the server version
......................................................................
Docs: Update the 4.19 release notes to match the server version
The version of the 4.19 release notes on the server was updated with
signatures and a note explaining the new tarballs vs the original,
corrupted tarballs. That data didn't make it back to the version of
the release notes in the documentation.
Likewise, the updates in the documentation didn't get pushed to the
release directory on the website.
The website now has this version of the release notes that combines the
two. This patch does the same for the documentation folder.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: Ib2563e7fa4b8d82ad4fbb3fd3880ee62a24a8aca
---
M Documentation/releases/coreboot-4.19-relnotes.md
1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/75639/1
diff --git a/Documentation/releases/coreboot-4.19-relnotes.md b/Documentation/releases/coreboot-4.19-relnotes.md
index 0925464..f0ef10d 100644
--- a/Documentation/releases/coreboot-4.19-relnotes.md
+++ b/Documentation/releases/coreboot-4.19-relnotes.md
@@ -15,6 +15,10 @@
codebase. Thank you very much to everyone who has contributed, both in
this release and in previous times.
+Note that the first set of tarballs posted for the 4.19 release had
+bad timestamps. This has been fixed. Hashes for all tarballs are at
+the bottom of this document.
+
The 4.20 release is planned for the 20th of April, 2023.
@@ -244,3 +248,20 @@
| 327 | OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes BSOD |
+-----+-----------------------------------------------------------------+
```
+
+Hashes for tarballs & signatures
+--------------------------------
+
+Old tarballs:
+
+- a1f9ec1252a3cc19f0b4ba1a2b9d66ea9327499cbeecebd85377db7d5c68555d coreboot-4.19.tar.xz
+- 6ceaa39429a2094d75e4c8a94615ae60664ddad7b4115570b65b9bb516cbd96d coreboot-4.19.tar.xz.sig
+- 881a3477221d1b77e161759344df14eccda115086af3ef54e66485ae0eb2e5d9 coreboot-blobs-4.19.tar.xz
+- 16f4f1f7acc6203ce915ffea64edce8512bd9eb9e94e65db22a0cb5282a6e157 coreboot-blobs-4.19.tar.xz.sig
+
+New tarballs:
+
+- 65ccb2f46535b996e0066a1b76f81c8cf1ff3e27df84b3f97d8ad7b3e7cf0a43 coreboot-4.19.tar.xz
+- d3c52a209b8ccb49049960318f04f158dd47db52ebe6019d6a3dffe3196d9cbe coreboot-4.19.tar.xz.sig
+- 30214caed07b25f11e47bec022ff6234841376e36689eb674de2330a3e980cbc coreboot-blobs-4.19.tar.xz
+- 023d511d074703beab98c237c3e964dc7c598af86d5a0e2091195c68980b6c5d coreboot-blobs-4.19.tar.xz.sig
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Change subject: Documentation: Move 4.20 release notes to 4.20.1
......................................................................
Documentation: Move 4.20 release notes to 4.20.1
This moves the release notes to 4.20.1, as was done with the 4.8 release
when it went to 4.8.1. The index.md file is updated for both the 4.20.1
and 4.8.1 releases, and extra spacing was added. This doesn't get shown
in the output, but makes the text version look better.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: Ic2fb35f1bf9fa7dc16d324882cd6057a1a4b05ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75637
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
---
R Documentation/releases/coreboot-4.20.1-relnotes.md
M Documentation/releases/index.md
2 files changed, 20 insertions(+), 20 deletions(-)
Approvals:
Nico Huber: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
diff --git a/Documentation/releases/coreboot-4.20-relnotes.md b/Documentation/releases/coreboot-4.20.1-relnotes.md
similarity index 100%
rename from Documentation/releases/coreboot-4.20-relnotes.md
rename to Documentation/releases/coreboot-4.20.1-relnotes.md
diff --git a/Documentation/releases/index.md b/Documentation/releases/index.md
index c6bec6e..bc57d3f 100644
--- a/Documentation/releases/index.md
+++ b/Documentation/releases/index.md
@@ -15,26 +15,26 @@
## Previous releases
-* [4.20 - May 2023](coreboot-4.20-relnotes.md)
-* [4.19 - January 2023](coreboot-4.19-relnotes.md)
-* [4.18 - October 2022](coreboot-4.18-relnotes.md)
-* [4.17 - May 2022](coreboot-4.17-relnotes.md)
-* [4.16 - February 2022](coreboot-4.16-relnotes.md)
-* [4.15 - November 2021](coreboot-4.15-relnotes.md)
-* [4.14 - May 2021](coreboot-4.14-relnotes.md)
-* [4.13 - November 2020](coreboot-4.13-relnotes.md)
-* [4.12 - May 2020](coreboot-4.12-relnotes.md)
-* [4.11 - November 2019](coreboot-4.11-relnotes.md)
-* [4.10 - July 2019](coreboot-4.10-relnotes.md)
-* [4.9 - December 2018](coreboot-4.9-relnotes.md)
-* [4.8 - May 2018](coreboot-4.8.1-relnotes.md)
-* [4.7 - January 2018](coreboot-4.7-relnotes.md)
-* [4.6 - April 2017](coreboot-4.6-relnotes.md)
-* [4.5 - October 2016](coreboot-4.5-relnotes.md)
-* [4.4 - May 2016](coreboot-4.4-relnotes.md)
-* [4.3 - January 2016](coreboot-4.3-relnotes.md)
-* [4.2 - October 2015](coreboot-4.2-relnotes.md)
-* [4.1 - July 2015](coreboot-4.1-relnotes.md)
+* [4.20.1 - May 2023](coreboot-4.20.1-relnotes.md)
+* [4.19 - January 2023](coreboot-4.19-relnotes.md)
+* [4.18 - October 2022](coreboot-4.18-relnotes.md)
+* [4.17 - May 2022](coreboot-4.17-relnotes.md)
+* [4.16 - February 2022](coreboot-4.16-relnotes.md)
+* [4.15 - November 2021](coreboot-4.15-relnotes.md)
+* [4.14 - May 2021](coreboot-4.14-relnotes.md)
+* [4.13 - November 2020](coreboot-4.13-relnotes.md)
+* [4.12 - May 2020](coreboot-4.12-relnotes.md)
+* [4.11 - November 2019](coreboot-4.11-relnotes.md)
+* [4.10 - July 2019](coreboot-4.10-relnotes.md)
+* [4.9 - December 2018](coreboot-4.9-relnotes.md)
+* [4.8.1 - May 2018](coreboot-4.8.1-relnotes.md)
+* [4.7 - January 2018](coreboot-4.7-relnotes.md)
+* [4.6 - April 2017](coreboot-4.6-relnotes.md)
+* [4.5 - October 2016](coreboot-4.5-relnotes.md)
+* [4.4 - May 2016](coreboot-4.4-relnotes.md)
+* [4.3 - January 2016](coreboot-4.3-relnotes.md)
+* [4.2 - October 2015](coreboot-4.2-relnotes.md)
+* [4.1 - July 2015](coreboot-4.1-relnotes.md)
[checklist]: checklist.md
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(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: Documentation: Finalize 4.20 release notes
......................................................................
Documentation: Finalize 4.20 release notes
Update the 4.20 release notes to the final post-release version.
This fixes a few typos, updates the statistics to include the final few
patches, and adds a note about the licensing issues which required a
version bump to 4.20.1.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I350535b8aa531642e161f1cad4752452f9171647
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75636
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
---
M Documentation/releases/coreboot-4.20-relnotes.md
1 file changed, 41 insertions(+), 18 deletions(-)
Approvals:
Felix Singer: Looks good to me, approved
build bot (Jenkins): Verified
Nico Huber: Looks good to me, but someone else must approve
diff --git a/Documentation/releases/coreboot-4.20-relnotes.md b/Documentation/releases/coreboot-4.20-relnotes.md
index 8217ca7..3bfa993 100644
--- a/Documentation/releases/coreboot-4.20-relnotes.md
+++ b/Documentation/releases/coreboot-4.20-relnotes.md
@@ -1,10 +1,16 @@
-Upcoming release - coreboot 4.20
+coreboot 4.20 release
========================================================================
-The 4.20 release is being done on May 15, 2023.
+The 4.20 release was done on May 15, 2023. Unfortunately, a licensing
+issues was found immediately after the release was completed, and it
+was decided to hold the release until that was fixed.
+
+Please do not use the 4.20 tag, and use the 4.20.1 git tag instead. The
+4.20_branch will contain all code for 4.20, 4.20.1, and any further
+changes required for this release.
The coreboot community has done a tremendous amount of work on the
-codebase over the last three and a half month. We've had over 1600
+codebase over the last three and a half months. We've had over 1600
commits in that time period, doing ongoing cleanup and improvement.
It can be hard to remember at times how much the codebase really has
@@ -19,20 +25,23 @@
Many thanks to everyone involved!
-We plan to get the 4.21 release done in mid August, 2023,
+We plan to get the 4.21 release done in mid August, 2023.
+
Significant or interesting changes
----------------------------------
+
### cpu/mp_init.c: Only enable CPUs once they execute code
On some systems the BSP cannot know how many CPUs are present in the
system. A typical use case is a multi socket system. Setting the enable
flag only on CPUs that actually exist makes it more flexible.
+
### cpu/x86/smm: Add PCI resource store functionality
-In certain cases data within protected memmory areas like SMRAM could
+In certain cases data within protected memory areas like SMRAM could
be leaked or modified if an attacker remaps PCI BARs to point within
that area. Add support to the existing SMM runtime to allow storing
PCI resources in SMRAM and then later retrieving them.
@@ -40,10 +49,12 @@
This helps prevent moving BARs around to get SMM to access memory in
areas that shouldn't be accessed.
+
### acpi: Add SRAT x2APIC table support
For platforms using X2APIC mode add SRAT x2APIC table
-generation. This allows to setup proper SRAT tables.
+generation. This allows the setup of proper SRAT tables.
+
### drivers/usb/acpi: Add USB _DSM method to enable/disable USB LPM per port
@@ -57,10 +68,11 @@
to support this feature. Please see
https://git.kernel.org/pub/scm/linux/kernel/git/mnyman/xhci.git/log/?h=port…
+
### drivers/efi: Add EFI variable store option support
Add a driver to read and write EFI variables stored in a region device.
-This is particularly useful for EDK2 as payload and allows to reuse
+This is particularly useful for EDK2 as payload and allows it to reuse
existing EFI tools to set/get options used by the firmware.
The write implementation is fault tolerant and doesn't corrupt the
@@ -89,11 +101,11 @@
previous is marked invalid. This only works on PNOR flash that allow to
clear set bits, but keep cleared bits state.
This mechanisms allows a fault tolerant write, but it also requires to
-"clean" the variable store for time to time. This cleaning would remove
+"clean" the variable store from time to time. This cleaning would remove
variables that have been marked "deleted".
Such cleaning mechanism in turn must be fault tolerant and thus must use
a second partition in the SPI flash as backup/working region.
-For now to cleaning is done in coreboot.
+For now, cleaning is done in coreboot.
Fault checking:
The driver should check if a previous write was successful and if not
@@ -105,6 +117,7 @@
Add EWL (Enhanced Warning Log) driver which handles Intel EWL HOB
and prints EWL type 3 primarily associated with MRC training failures.
+
### Toolchain updates
* Upgrade MPC from version 1.2.1 to 1.3.1
@@ -114,6 +127,7 @@
* Upgrade GCC from version 11.2.0 to 11.3.0
* Upgrade binutils from version 2.37 to 2.40
+
Additional coreboot changes
---------------------------
@@ -135,8 +149,10 @@
* Do initial work on Xeon SPR
* CMOS defaults greater than 128 bytes long now extend to bank 1.
+
New Mainboards
--------------
+
* Asrock: B75M-ITX
* Dell: Latitude E6400
* Google: Aurash
@@ -162,16 +178,21 @@
* System76: oryp10
* System76: oryp9
+
Removed Mainboards
------------------
+
* Intel Icelake U DDR4/LPDDR4 RVP
* Intel Icelake Y LPDDR4 RVP
* Scaleway TAGADA
+
Updated SoCs
------------
+
* Removed soc/intel/icelake
+
Plans to move platform support to a branch
------------------------------------------
@@ -188,21 +209,23 @@
* Intel Quark SoC
* Intel Galileo mainboard
+
Statistics from the 4.19 to the 4.20 release
--------------------------------------------
-Total Commits: ~1625
-Average Commits per day: ~13.71
-Total lines added: ~101911
-Average lines added per commit: ~62.71
-Number of patches adding more than 100 lines: ~126
-Average lines added per small commit: ~37.98
-Total lines removed: ~34756
-Average lines removed per commit: ~21.39
-Total difference between added and removed: ~67155
+Total Commits: 1630
+Average Commits per day: 13.72
+Total lines added: 102592
+Average lines added per commit: 62.94
+Number of patches adding more than 100 lines: 128
+Average lines added per small commit: 37.99
+Total lines removed: 34824
+Average lines removed per commit: 21.36
+Total difference between added and removed: 67768
Total authors: ~170
New authors: ~35
+
Significant Known and Open Issues
---------------------------------
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Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75636?usp=email )
Change subject: Documentation: Finalize 4.20 release notes
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75636/comment/47bd35d6_9c9b823f :
PS1, Line 7: Final
> nit: Finalize
Done
https://review.coreboot.org/c/coreboot/+/75636/comment/af6139a8_642cbd97 :
PS1, Line 12: ,
> That's why I marked it as nit. […]
It's an oxford comma - It can either be used or omitted in a list. I prefer to use the oxford comma, but it's definitely a matter of style (and debate).
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