coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[master]: soc/mediatek/mt8188: Support 4K resolution display
by Yidi Lin (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Hsiao Chien Sung, Hung-Te Lin, Paul Menzel, Yu-Ping Wu, jason-ch chen. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75661?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/mediatek/mt8188: Support 4K resolution display ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/75661/comment/684f75b3_3cfa2762 : PS2, Line 10: to glitch flickering -- To view, visit https://review.coreboot.org/c/coreboot/+/75661?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic40dd28264d03ef7218ff4edd8d4182e0fe74ea3 Gerrit-Change-Number: 75661 Gerrit-PatchSet: 2 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Hsiao Chien Sung <shawn.sung(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Attention: Hsiao Chien Sung <shawn.sung(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 02:10:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/yavilla: Enable wifi SAR
by Shon Wang (Code Review) 07 Jun '23

07 Jun '23

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75673?usp=email ) Change subject: mb/google/nissa/var/yavilla: Enable wifi SAR ...................................................................... mb/google/nissa/var/yavilla: Enable wifi SAR Enable wifi sar function for yavilla/yavilly/yavijo. Use the fw_config to separate SAR setting for different wifi card. BUG=b:273791621 BRANCH=firmware-nissa-15217.B TEST=build, enabled iwlwifi debug, and check dmesg Change-Id: I1bd111a734a250df49535a07ef056d5b68fccb33 Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/yavilla/overridetree.cb M src/mainboard/google/brya/variants/yavilla/variant.c 3 files changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/75673/1 diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 0e32761..0744bd7 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -375,6 +375,7 @@ select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_INTEL_MIPI_CAMERA select HAVE_WWAN_POWER_SEQUENCE + select CHROMEOS_WIFI_SAR if CHROMEOS config BOARD_GOOGLE_GOTHRAX bool "-> Gothrax" diff --git a/src/mainboard/google/brya/variants/yavilla/overridetree.cb b/src/mainboard/google/brya/variants/yavilla/overridetree.cb index 447121b..08439f9 100644 --- a/src/mainboard/google/brya/variants/yavilla/overridetree.cb +++ b/src/mainboard/google/brya/variants/yavilla/overridetree.cb @@ -28,6 +28,15 @@ option MB_1C 0 option MB_1C_2A 1 end + field WIFI_SAR_ID2 16 18 + option INTEL_YAVILLA_LTE 0 + option INTEL_YAVILLA_WIFI 1 + option INTEL_YAVILLY_LTE 2 + option INTEL_YAVILLY_WIFI 3 + option INTEL_YAVIJO_LTE 4 + option INTEL_YAVIJO_WIFI 5 + option UNUSED 7 + end end chip soc/intel/alderlake diff --git a/src/mainboard/google/brya/variants/yavilla/variant.c b/src/mainboard/google/brya/variants/yavilla/variant.c index 60a7c79..9140eb0 100644 --- a/src/mainboard/google/brya/variants/yavilla/variant.c +++ b/src/mainboard/google/brya/variants/yavilla/variant.c @@ -4,6 +4,7 @@ #include <boardid.h> #include <device/device.h> #include <fw_config.h> +#include <sar.h> void variant_devtree_update(void) { @@ -27,3 +28,8 @@ ish->enabled = 0; } } + +const char *get_wifi_sar_cbfs_filename(void) +{ + return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_SAR_ID2)); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/75673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1bd111a734a250df49535a07ef056d5b68fccb33 Gerrit-Change-Number: 75673 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: soc/mediatek/mt8188: Support 4K resolution display
by jason-ch chen (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Hsiao Chien Sung, Hung-Te Lin, Paul Menzel, Yu-Ping Wu. jason-ch chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75661?usp=email ) Change subject: soc/mediatek/mt8188: Support 4K resolution display ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/75661/comment/d7009a15_3e93b13d : PS1, Line 8: > Please elaborate. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75661?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic40dd28264d03ef7218ff4edd8d4182e0fe74ea3 Gerrit-Change-Number: 75661 Gerrit-PatchSet: 2 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Hsiao Chien Sung <shawn.sung(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hsiao Chien Sung <shawn.sung(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 01:53:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/mediatek/mt8188: Support 4K resolution display
by jason-ch chen (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Hsiao Chien Sung, Hung-Te Lin, Yu-Ping Wu, jason-ch chen. Hello Hsiao Chien Sung, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75661?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8188: Support 4K resolution display ...................................................................... soc/mediatek/mt8188: Support 4K resolution display The original clock rate 416MHz is insufficient for 4K resolution and causing the screen to glitch. Set the clock rate to 594MHz to support 4K resolution. BUG=b:236328487 TEST=Glitching screen was fixed after applying this patch Change-Id: Ic40dd28264d03ef7218ff4edd8d4182e0fe74ea3 Signed-off-by: Hsiao Chien Sung <shawn.sung(a)mediatek.com> Signed-off-by: Jason Chen <Jason-ch.Chen(a)mediatek.com> --- M src/soc/mediatek/mt8188/pll.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/75661/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75661?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic40dd28264d03ef7218ff4edd8d4182e0fe74ea3 Gerrit-Change-Number: 75661 Gerrit-PatchSet: 2 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Hsiao Chien Sung <shawn.sung(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hsiao Chien Sung <shawn.sung(a)mediatek.com> Gerrit-Attention: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/nissa: Configure the external V1p05/Vnn/VnnSx rails for joxer
by Derek Huang (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Felix Held, Henry Sun, Kangheui Won, Mark Hsieh, Paul Menzel, Shou-Chieh Hsu, Sumeet R Pawnikar, Tarun Tuli. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75662?usp=email ) Change subject: mb/google/nissa: Configure the external V1p05/Vnn/VnnSx rails for joxer ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/brya/variants/joxer/overridetree.cb: https://review.coreboot.org/c/coreboot/+/75662/comment/5fcf7c57_a3efd814 : PS1, Line 16: use tab https://review.coreboot.org/c/coreboot/+/75662/comment/70bb7b1e_02a016a3 : PS1, Line 17: .configure_ext_fivr = 1, : .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX, : .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, : .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, : .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, : .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE, : .v1p05_voltage_mv = 1050, : .vnn_voltage_mv = 780, : .vnn_sx_voltage_mv = 1050, : .v1p05_icc_max_ma = 500, : .vnn_icc_max_ma = 500, : }" use tab -- To view, visit https://review.coreboot.org/c/coreboot/+/75662?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78d2a885d577f6c1a89ab74c0da7b6544322c0d7 Gerrit-Change-Number: 75662 Gerrit-PatchSet: 1 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 07 Jun 2023 01:47:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/amd/phoenix: Hook up xhci ops in chipset.cb
by Eric Lai (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Felix Held, Fred Reitberger, Jon Murphy, Martin L Roth, Martin Roth, Matt DeVillier, Paul Menzel. Hello Felix Held, Fred Reitberger, Jon Murphy, Karthik Ramasubramanian, Martin Roth, Matt DeVillier, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75659?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/amd/phoenix: Hook up xhci ops in chipset.cb ...................................................................... soc/amd/phoenix: Hook up xhci ops in chipset.cb Add hook up xhci ops for Phoenix xHCI device. BUG=b:285981912 TEST=check coreboot log shows below. [INFO ] \_SB.PCI0.GP41.XHC0.RHUB.SS01: USB3 Type-A Port A0 (MLB) Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Change-Id: Ib59874948725966b04b54def3f6de463afeda709 --- M src/drivers/usb/pci_xhci/pci_xhci.c M src/soc/amd/phoenix/chipset.cb 2 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/75659/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/75659?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib59874948725966b04b54def3f6de463afeda709 Gerrit-Change-Number: 75659 Gerrit-PatchSet: 4 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: drivers/usb/pci_xhci: Add two xhci DID for phoenix
by Eric Lai (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Felix Held, Fred Reitberger, Jon Murphy, Martin L Roth, Martin Roth, Matt DeVillier, Paul Menzel. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75659?usp=email ) Change subject: drivers/usb/pci_xhci: Add two xhci DID for phoenix ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > okay, I see remove the static. Working fine. I'll update the patch. You can help clean up the rest SoC. -- To view, visit https://review.coreboot.org/c/coreboot/+/75659?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib59874948725966b04b54def3f6de463afeda709 Gerrit-Change-Number: 75659 Gerrit-PatchSet: 3 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 07 Jun 2023 01:22:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/inventec: Add Intel SPR server board Inventec Transformers
by Annie Chen (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Angel Pons, Arthur Heymans, David Hendricks, Felix Singer, Lean Sheng Tan, Paul Menzel. Hello Angel Pons, Arthur Heymans, David Hendricks, Hung-Wei Chen, Johnny Lin, Lean Sheng Tan, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75598?usp=email to look at the new patch set (#4). Change subject: mb/inventec: Add Intel SPR server board Inventec Transformers ...................................................................... mb/inventec: Add Intel SPR server board Inventec Transformers CPU: - 2 SPR sockets - 64 total PCIe 5.0 lanes with up to 64 lanes of Flex Bus/CXL per CPU - Up to 32 DDR5 DIMM - 1 Gbase-T NIC port - 1 USB3.0 type A, 1 USB2.0 connector - 1 VGA connector BMC: - ASPEED AST2600 BMC - 1 DDR4 8Gb memory - 1 8GB eMMC Test: The board boots to Linux 4.19.6 with all 192 cores available. Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684 Signed-off-by: Annie Chen <Chen.AnnieET(a)inventec.com> --- A configs/builder/config.transformers A src/mainboard/inventec/Kconfig A src/mainboard/inventec/Kconfig.name A src/mainboard/inventec/transformers/Kconfig A src/mainboard/inventec/transformers/Kconfig.name A src/mainboard/inventec/transformers/Makefile.inc A src/mainboard/inventec/transformers/acpi/platform.asl A src/mainboard/inventec/transformers/board.fmd A src/mainboard/inventec/transformers/board_info.txt A src/mainboard/inventec/transformers/bootblock.c A src/mainboard/inventec/transformers/devicetree.cb A src/mainboard/inventec/transformers/dsdt.asl A src/mainboard/inventec/transformers/include/mainboard_ras.h A src/mainboard/inventec/transformers/include/sprsp_ac_iio.h A src/mainboard/inventec/transformers/include/sprsp_gpio.h A src/mainboard/inventec/transformers/ipmi.c A src/mainboard/inventec/transformers/ipmi.h A src/mainboard/inventec/transformers/ramstage.c A src/mainboard/inventec/transformers/romstage.c 19 files changed, 939 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/75598/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/75598?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684 Gerrit-Change-Number: 75598 Gerrit-PatchSet: 4 Gerrit-Owner: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Hung-Wei Chen <Chen.HW(a)inventec.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: src/mainboard: Add Inventec transfomers setting
by Annie Chen (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Angel Pons, Arthur Heymans, David Hendricks, Felix Singer, Lean Sheng Tan, Paul Menzel. Annie Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75598?usp=email ) Change subject: src/mainboard: Add Inventec transfomers setting ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/75598/comment/912db767_2f234e29 : PS1, Line 7: src/mainboard: Add Inventec setting > Maybe something like: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75598?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684 Gerrit-Change-Number: 75598 Gerrit-PatchSet: 3 Gerrit-Owner: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Hung-Wei Chen <Chen.HW(a)inventec.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 01:16:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: src/mainboard: Add Inventec transfomers setting
by Annie Chen (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Angel Pons, Arthur Heymans, David Hendricks, Felix Singer, Lean Sheng Tan, Paul Menzel. Hello Angel Pons, Arthur Heymans, David Hendricks, Hung-Wei Chen, Johnny Lin, Lean Sheng Tan, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75598?usp=email to look at the new patch set (#3). Change subject: src/mainboard: Add Inventec transfomers setting ...................................................................... src/mainboard: Add Inventec transfomers setting CPU: - 2 SPR sockets - 64 total PCIe 5.0 lanes with up to 64 lanes of Flex Bus/CXL per CPU - Up to 32 DDR5 DIMM - 1 Gbase-T NIC port - 1 USB3.0 type A, 1 USB2.0 connector - 1 VGA connector BMC: - ASPEED AST2600 BMC - 1 DDR4 8Gb memory - 1 8GB eMMC Test: The board boots to Linux 4.19.6 with all 192 cores available. Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684 Signed-off-by: Annie Chen <Chen.AnnieET(a)inventec.com> --- A configs/builder/config.transformers A src/mainboard/inventec/Kconfig A src/mainboard/inventec/Kconfig.name A src/mainboard/inventec/transformers/Kconfig A src/mainboard/inventec/transformers/Kconfig.name A src/mainboard/inventec/transformers/Makefile.inc A src/mainboard/inventec/transformers/acpi/platform.asl A src/mainboard/inventec/transformers/board.fmd A src/mainboard/inventec/transformers/board_info.txt A src/mainboard/inventec/transformers/bootblock.c A src/mainboard/inventec/transformers/devicetree.cb A src/mainboard/inventec/transformers/dsdt.asl A src/mainboard/inventec/transformers/include/mainboard_ras.h A src/mainboard/inventec/transformers/include/sprsp_ac_iio.h A src/mainboard/inventec/transformers/include/sprsp_gpio.h A src/mainboard/inventec/transformers/ipmi.c A src/mainboard/inventec/transformers/ipmi.h A src/mainboard/inventec/transformers/ramstage.c A src/mainboard/inventec/transformers/romstage.c 19 files changed, 939 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/75598/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/75598?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684 Gerrit-Change-Number: 75598 Gerrit-PatchSet: 3 Gerrit-Owner: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Hung-Wei Chen <Chen.HW(a)inventec.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit June 2023