coreboot-gerrit June 2023

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[M] Change in coreboot[master]: acpi: Add a debug option to print out tables in ACPICA compatible hex
by Arthur Heymans (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Kyösti Mälkki, Lance Zhao, Nico Huber, Tim Wawrzynczak. Hello Benjamin Doron, Kyösti Mälkki, Lance Zhao, Lean Sheng Tan, Nico Huber, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75677?usp=email to look at the new patch set (#3). Change subject: acpi: Add a debug option to print out tables in ACPICA compatible hex ...................................................................... acpi: Add a debug option to print out tables in ACPICA compatible hex Sometimes systems don't boot to the OS due to wrong ACPI tables. Printing the tables in an ACPICA compatible format makes analysis of ACPI tables easier. To achieve this capture the coreboot log between "Printing ACPI in ACPICA compatible table" and "Done printing ACPI in ACPICA compatible table". Remove the prefix "[SPEW ] " and then call 'acpixtract -a dump' to extract all the tables. Then use iasl on the .dat files to decompile the tables. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc --- M src/Kconfig M src/acpi/acpi.c 2 files changed, 89 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/75677/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/75677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc Gerrit-Change-Number: 75677 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: acpi: Add a debug option to print out tables in ACPICA compatible hex
by Lean Sheng Tan (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Kyösti Mälkki, Lance Zhao, Nico Huber, Tim Wawrzynczak. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75677?usp=email ) Change subject: acpi: Add a debug option to print out tables in ACPICA compatible hex ...................................................................... Patch Set 2: (1 comment) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/75677/comment/3b8c3ba7_c09f3da9 : PS2, Line 1854: printk(BIOS_SPEW, " %04lX:", i); There is build error here from Jenkins: src/acpi/acpi.c:1854:36: error: format specifies type 'unsigned long' but the argument has type 'size_t' (aka 'unsigned int') [-Werror,-Wformat] printk(BIOS_SPEW, " %04lX:", i); ~~~~~ ^ %04zX -- To view, visit https://review.coreboot.org/c/coreboot/+/75677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc Gerrit-Change-Number: 75677 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 09:32:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: acpi: Add a debug option to print out tables in ACPICA compatible hex
by Arthur Heymans (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Kyösti Mälkki, Lance Zhao, Lean Sheng Tan, Nico Huber, Tim Wawrzynczak. Hello Benjamin Doron, Kyösti Mälkki, Lance Zhao, Lean Sheng Tan, Nico Huber, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75677?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+1 by Lean Sheng Tan Change subject: acpi: Add a debug option to print out tables in ACPICA compatible hex ...................................................................... acpi: Add a debug option to print out tables in ACPICA compatible hex Sometimes systems don't boot to the OS due to wrong ACPI tables. Printing the tables in an ACPICA compatible format makes analysis of ACPI tables easier. To achieve this capture the coreboot log between "Printing ACPI in ACPICA compatible table" and "Done printing ACPI in ACPICA compatible table". Remove the prefix "[SPEW ] " and then call 'acpixtract -a dump' to extract all the tables. Then use iasl on the .dat files to decompile the tables. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc --- M src/Kconfig M src/acpi/acpi.c 2 files changed, 89 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/75677/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc Gerrit-Change-Number: 75677 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: mb/google/dedede: Support variant specific power limits
by ChiaLing (Code Review) 07 Jun '23

07 Jun '23

ChiaLing has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75396?usp=email ) Change subject: mb/google/dedede: Support variant specific power limits ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/75396?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If38a9b7923f19885f6d47b83c92b68ef6dfa88db Gerrit-Change-Number: 75396 Gerrit-PatchSet: 11 Gerrit-Owner: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-CC: Super Ni <super.ni(a)intel.com> Gerrit-CC: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: soc/intel/jasperlake: Add per-SKU power limits
by ChiaLing (Code Review) 07 Jun '23

07 Jun '23

ChiaLing has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75395?usp=email ) Change subject: soc/intel/jasperlake: Add per-SKU power limits ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/75395?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I74affa6bc6ca8203459820f2530b6f20793cf857 Gerrit-Change-Number: 75395 Gerrit-PatchSet: 5 Gerrit-Owner: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-CC: Super Ni <super.ni(a)intel.com> Gerrit-CC: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: soc/intel/common: Add PsysPl1 support
by ChiaLing (Code Review) 07 Jun '23

07 Jun '23

ChiaLing has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75406?usp=email ) Change subject: soc/intel/common: Add PsysPl1 support ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/75406?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51907859956631d5f54ba8237d92586431fe17b7 Gerrit-Change-Number: 75406 Gerrit-PatchSet: 3 Gerrit-Owner: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-CC: Super Ni <super.ni(a)intel.com> Gerrit-CC: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: dedede/variants/dibbi: Update power limit on Dibbi
by ChiaLing (Code Review) 07 Jun '23

07 Jun '23

ChiaLing has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75404?usp=email ) Change subject: dedede/variants/dibbi: Update power limit on Dibbi ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/75404?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic3571ff850cc2ec1a1ffecf39dded004c8cf89e6 Gerrit-Change-Number: 75404 Gerrit-PatchSet: 4 Gerrit-Owner: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Ryan Lin <ryan.lin(a)intel.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-CC: Super Ni <super.ni(a)intel.com> Gerrit-CC: Super Ni <super.ni(a)intel.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: mb/google/dedede/var/dibbi: Update power limits
by ChiaLing (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: ChiaLing. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75681?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/dedede/var/dibbi: Update power limits ...................................................................... mb/google/dedede/var/dibbi: Update power limits Update Dibbi power limit in ramstage BUG=b:281479111 TEST=emerge-dedede coreboot and check psys and PLx on DUT Signed-off-by: Chia-Ling Hou <chia-ling.hou(a)intel.com> Change-Id: Ieaff856b762b546f3e99acb7ba2ce15791193da6 --- M src/mainboard/google/dedede/variants/dibbi/Makefile.inc A src/mainboard/google/dedede/variants/dibbi/ramstage.c 2 files changed, 73 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/75681/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75681?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieaff856b762b546f3e99acb7ba2ce15791193da6 Gerrit-Change-Number: 75681 Gerrit-PatchSet: 2 Gerrit-Owner: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: ChiaLing <chia-ling.hou(a)intel.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: WIP:Revert "amdfwtool: Only use AMD_FW_RECOVERYAB_A on phoenix"
by Bao Zheng (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/75683?usp=email to review the following change. Change subject: WIP:Revert "amdfwtool: Only use AMD_FW_RECOVERYAB_A on phoenix" ...................................................................... WIP:Revert "amdfwtool: Only use AMD_FW_RECOVERYAB_A on phoenix" This reverts commit 9d6008ea5b5acf142f73f3d485c2c196d8a88a59. BUG=285390041 Change-Id: I0474d6e751158d5e3c2199465266ce1af4b4f29d Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 2 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/75683/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 3dc113d..b61348c 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -995,7 +995,6 @@ uint32_t current_table_save; bool recovery_ab = cb_config->recovery_ab; ish_directory_table *ish_a_dir = NULL, *ish_b_dir = NULL; - bool use_only_a = (cb_config->soc_id == PLATFORM_PHOENIX); /* TODO: b:285390041 */ /* This function can create a primary table, a secondary table, or a * flattened table which contains all applicable types. These if-else @@ -1130,12 +1129,10 @@ AMD_FW_RECOVERYAB_A, cb_config->soc_id); if (pspdir2_b != NULL) integrate_psp_ab(ctx, pspdir, pspdir2_b, ish_b_dir, - use_only_a ? AMD_FW_RECOVERYAB_A : AMD_FW_RECOVERYAB_B, - cb_config->soc_id); + AMD_FW_RECOVERYAB_B, cb_config->soc_id); else integrate_psp_ab(ctx, pspdir, pspdir2, ish_a_dir, - use_only_a ? AMD_FW_RECOVERYAB_A : AMD_FW_RECOVERYAB_B, - cb_config->soc_id); + AMD_FW_RECOVERYAB_B, cb_config->soc_id); count = pspdir->header.num_entries; } else if (pspdir2 != NULL) { -- To view, visit https://review.coreboot.org/c/coreboot/+/75683?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0474d6e751158d5e3c2199465266ce1af4b4f29d Gerrit-Change-Number: 75683 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: WIP:amdfwtool: Add psp header backup copy
by Bao Zheng (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/75682?usp=email to review the following change. Change subject: WIP:amdfwtool: Add psp header backup copy ...................................................................... WIP:amdfwtool: Add psp header backup copy For PHX. Change-Id: Ia5a745c86595554c83cd13a35c312c17987b716b Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h 2 files changed, 24 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/75682/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 1b2b005..3dc113d 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -740,6 +740,19 @@ } } +static void fill_psp_directory_backup_to_efs(embedded_firmware *amd_romsig, void *pspdir, + context *ctx, amd_cb_config *cb_config) +{ + switch (cb_config->soc_id) { + case PLATFORM_PHOENIX: + case PLATFORM_GLINDA: + amd_romsig->psp_directory_backup = + BUFF_TO_RUN_MODE(*ctx, pspdir, AMD_ADDR_REL_BIOS); + break; + default: + break; + } +} static ssize_t copy_blob(void *dest, const char *src_file, size_t room) { int fd; @@ -1897,6 +1910,7 @@ char *tmp; embedded_firmware *amd_romsig; psp_directory_table *pspdir = NULL; + psp_directory_table *pspdir_bak = NULL; psp_directory_table *pspdir2 = NULL; psp_directory_table *pspdir2_b = NULL; psp_combo_directory *psp_combo_dir = NULL, *bhd_combo_dir = NULL; @@ -2394,8 +2408,13 @@ pspdir2_b = NULL; /* More explicitly */ } pspdir = new_psp_dir(&ctx, cb_config.multi_level); + if (1) + pspdir_bak = new_psp_dir(&ctx, cb_config.multi_level); integrate_psp_firmwares(&ctx, pspdir, pspdir2, pspdir2_b, amd_psp_fw_table, PSP_COOKIE, &cb_config); + if (pspdir_bak) + memcpy(pspdir_bak, pspdir, + 0x10 * pspdir->header.num_entries + 0x10); } else { /* flat: PSP 1 cookie and no pointer to 2nd table */ pspdir = new_psp_dir(&ctx, cb_config.multi_level); @@ -2405,8 +2424,12 @@ if (!cb_config.use_combo) { fill_psp_directory_to_efs(amd_romsig, pspdir, &ctx, &cb_config); + if (pspdir_bak != NULL) + fill_psp_directory_backup_to_efs(amd_romsig, pspdir_bak, + &ctx, &cb_config); } else { fill_psp_directory_to_efs(amd_romsig, psp_combo_dir, &ctx, &cb_config); + /* TODO: Doc doesn't say how backup copy PSP dir is saved for combo */ /* 0 -Compare PSP ID, 1 -Compare chip family ID */ assert_fw_entry(combo_index, MAX_COMBO_ENTRIES, &ctx); psp_combo_dir->entries[combo_index].id_sel = 0; diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 11b7996..a1fb6cd 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -160,7 +160,7 @@ uint32_t bios2_entry; struct second_gen_efs efs_gen; uint32_t bios3_entry; - uint32_t reserved_2Ch; + uint32_t psp_directory_backup; uint32_t promontory_fw_ptr; uint32_t lp_promontory_fw_ptr; uint32_t reserved_38h; -- To view, visit https://review.coreboot.org/c/coreboot/+/75682?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5a745c86595554c83cd13a35c312c17987b716b Gerrit-Change-Number: 75682 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

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coreboot-gerrit June 2023