coreboot-gerrit June 2023

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[XS] Change in coreboot[master]: mb/google/nissa/var/joxer: disable PCIE RP7
by Felix Held (Code Review) 07 Jun '23

07 Jun '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75658?usp=email ) ( 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/nissa/var/joxer: disable PCIE RP7 ...................................................................... mb/google/nissa/var/joxer: disable PCIE RP7 joxer removed SD card from all SKUs, thus disable pcie_rp7. BUG=b:285477026 TEST=USE="project_joxer emerge-nissa coreboot" Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Change-Id: I3486d665ddb1de521ab4e656addb2209055174c7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75658 Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/joxer/overridetree.cb 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index 5ae8a2f..195e4bd 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -180,6 +180,7 @@ device pci 00.0 on end end end + device ref pcie_rp7 off end # PCIE7 no SD card device ref emmc on probe STORAGE STORAGE_EMMC end -- To view, visit https://review.coreboot.org/c/coreboot/+/75658?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3486d665ddb1de521ab4e656addb2209055174c7 Gerrit-Change-Number: 75658 Gerrit-PatchSet: 6 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: arch/x86/tables.c: Drop placing ACPI and SMBIOS in lower memory
by Lean Sheng Tan (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Maximilian Brune, Nico Huber, Paul Menzel. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75712?usp=email ) Change subject: arch/x86/tables.c: Drop placing ACPI and SMBIOS in lower memory ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75712?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I216e7c713d112ad1012b0beaf26196967988b951 Gerrit-Change-Number: 75712 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 07 Jun 2023 14:40:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: arch/x86/tables.c: Drop placing ACPI and SMBIOS in lower memory
by Arthur Heymans (Code Review) 07 Jun '23

07 Jun '23

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75712?usp=email ) Change subject: arch/x86/tables.c: Drop placing ACPI and SMBIOS in lower memory ...................................................................... arch/x86/tables.c: Drop placing ACPI and SMBIOS in lower memory The codepaths to place ACPI and SMBIOS fully in lower memory are pretty much never reached unless CBMEM overflows, which is very uncommon and likely to have other problems. The unused codepath also lacks any overflow test to check if it remains below 1M. The EBDA setup also writes to 0xf6000 without any check if that overlaps with any of those tables. So it's more sane to never attempt placing the full tables in lower memory. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I216e7c713d112ad1012b0beaf26196967988b951 --- M src/arch/x86/tables.c 1 file changed, 64 insertions(+), 67 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/75712/1 diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c index b4b97b4..9a9b2a6 100644 --- a/src/arch/x86/tables.c +++ b/src/arch/x86/tables.c @@ -94,47 +94,48 @@ */ high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_ACPI, max_acpi_size); - if (high_table_pointer) { - unsigned long acpi_start = high_table_pointer; - unsigned long new_high_table_pointer; - rom_table_end = ALIGN_UP(rom_table_end, 16); - new_high_table_pointer = write_acpi_tables(high_table_pointer); - if (new_high_table_pointer > (high_table_pointer - + max_acpi_size)) - printk(BIOS_ERR, "Increase ACPI size\n"); - printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n", - new_high_table_pointer - high_table_pointer); - - /* Now we need to create a low table copy of the RSDP. */ - - /* First we look for the high table RSDP */ - while (acpi_start < new_high_table_pointer) { - if (memcmp(((acpi_rsdp_t *)acpi_start)->signature, - RSDP_SIG, 8) == 0) - break; - acpi_start++; - } - - /* Now, if we found the RSDP, we take the RSDT and XSDT pointer - * from it in order to write the low RSDP - */ - if (acpi_start < new_high_table_pointer) { - acpi_rsdp_t *low_rsdp = (acpi_rsdp_t *)rom_table_end, - *high_rsdp = (acpi_rsdp_t *)acpi_start; - - /* Technically rsdp length varies but coreboot always - writes longest size available. */ - memcpy(low_rsdp, high_rsdp, sizeof(acpi_rsdp_t)); - } else { - printk(BIOS_ERR, "Didn't find RSDP in high table.\n"); - } - rom_table_end = ALIGN_UP(rom_table_end + sizeof(acpi_rsdp_t), 16); - } else { - rom_table_end = write_acpi_tables(rom_table_end); - rom_table_end = ALIGN_UP(rom_table_end, 1024); + if (high_table_pointer == 0ul) { + printk(BIOS_ERR, "Failing to reserve CBMEM space for ACPI\n"); + return rom_table_end; } + unsigned long acpi_start = high_table_pointer; + unsigned long new_high_table_pointer; + + rom_table_end = ALIGN_UP(rom_table_end, 16); + new_high_table_pointer = write_acpi_tables(high_table_pointer); + if (new_high_table_pointer > (high_table_pointer + + max_acpi_size)) + printk(BIOS_ERR, "Increase ACPI size\n"); + printk(BIOS_DEBUG, "ACPI tables: %ld bytes.\n", + new_high_table_pointer - high_table_pointer); + + /* Now we need to create a low table copy of the RSDP. */ + + /* First we look for the high table RSDP */ + while (acpi_start < new_high_table_pointer) { + if (memcmp(((acpi_rsdp_t *)acpi_start)->signature, + RSDP_SIG, 8) == 0) + break; + acpi_start++; + } + + /* Now, if we found the RSDP, we take the RSDT and XSDT pointer + * from it in order to write the low RSDP + */ + if (acpi_start < new_high_table_pointer) { + acpi_rsdp_t *low_rsdp = (acpi_rsdp_t *)rom_table_end, + *high_rsdp = (acpi_rsdp_t *)acpi_start; + + /* Technically rsdp length varies but coreboot always + writes longest size available. */ + memcpy(low_rsdp, high_rsdp, sizeof(acpi_rsdp_t)); + } else { + printk(BIOS_ERR, "Didn't find RSDP in high table.\n"); + } + rom_table_end = ALIGN_UP(rom_table_end + sizeof(acpi_rsdp_t), 16); + return rom_table_end; } @@ -146,37 +147,33 @@ high_table_pointer = (unsigned long)cbmem_add(CBMEM_ID_SMBIOS, MAX_SMBIOS_SIZE); - if (high_table_pointer) { - unsigned long new_high_table_pointer; - - /* - * Clear the entire region to ensure the unused space doesn't - * contain garbage from a previous boot, like stale table - * signatures that could be found by the OS. - */ - memset((void *)high_table_pointer, 0, MAX_SMBIOS_SIZE); - - new_high_table_pointer = - smbios_write_tables(high_table_pointer); - rom_table_end = ALIGN_UP(rom_table_end, 16); - memcpy((void *)rom_table_end, (void *)high_table_pointer, - sizeof(struct smbios_entry)); - rom_table_end += sizeof(struct smbios_entry); - - if (new_high_table_pointer > (high_table_pointer - + MAX_SMBIOS_SIZE)) - printk(BIOS_ERR, "Increase SMBIOS size\n"); - printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n", - new_high_table_pointer - high_table_pointer); - } else { - unsigned long new_rom_table_end; - - new_rom_table_end = smbios_write_tables(rom_table_end); - printk(BIOS_DEBUG, "SMBIOS size %ld bytes\n", new_rom_table_end - - rom_table_end); - rom_table_end = ALIGN_UP(new_rom_table_end, 16); + if (high_table_pointer == 0ul) { + printk(BIOS_ERR, "Failing to reserve CBMEM space for SMBIOS\n"); + return rom_table_end; } + unsigned long new_high_table_pointer; + + /* + * Clear the entire region to ensure the unused space doesn't + * contain garbage from a previous boot, like stale table + * signatures that could be found by the OS. + */ + memset((void *)high_table_pointer, 0, MAX_SMBIOS_SIZE); + + new_high_table_pointer = + smbios_write_tables(high_table_pointer); + rom_table_end = ALIGN_UP(rom_table_end, 16); + memcpy((void *)rom_table_end, (void *)high_table_pointer, + sizeof(struct smbios_entry)); + rom_table_end += sizeof(struct smbios_entry); + + if (new_high_table_pointer > (high_table_pointer + + MAX_SMBIOS_SIZE)) + printk(BIOS_ERR, "Increase SMBIOS size\n"); + printk(BIOS_DEBUG, "SMBIOS tables: %ld bytes.\n", + new_high_table_pointer - high_table_pointer); + return rom_table_end; } -- To view, visit https://review.coreboot.org/c/coreboot/+/75712?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I216e7c713d112ad1012b0beaf26196967988b951 Gerrit-Change-Number: 75712 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/rex/var/screebo: Enable touchscreen
by Subrata Banik (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Kapil Porwal, Tarun Tuli, zhongtian wu. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75692?usp=email ) Change subject: mb/google/rex/var/screebo: Enable touchscreen ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: shouldn't we use CBI/FW_CONFIG for two different touch vendor device ? -- To view, visit https://review.coreboot.org/c/coreboot/+/75692?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57d55c5f2621d6fafd53b19d12ecad20271cdbb1 Gerrit-Change-Number: 75692 Gerrit-PatchSet: 1 Gerrit-Owner: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-Attention: zhongtian wu <wuzhongtian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 14:27:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: acpi: Add a debug option to print out tables in ACPICA compatible hex
by Lean Sheng Tan (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Kyösti Mälkki, Lance Zhao, Nico Huber, Paul Menzel, Tim Wawrzynczak. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75677?usp=email ) Change subject: acpi: Add a debug option to print out tables in ACPICA compatible hex ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc Gerrit-Change-Number: 75677 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 14:27:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/amd/block/ivrs: Generalize IVRS table generation
by Arthur Heymans (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Felix Held, Felix Singer, Fred Reitberger, Jason Glenesk, Marvin Drees, Matt DeVillier, Naresh Solanki, Raul Rangel. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75451?usp=email ) Change subject: soc/amd/block/ivrs: Generalize IVRS table generation ...................................................................... Patch Set 8: (1 comment) File src/soc/amd/common/block/acpi/ivrs.c: https://review.coreboot.org/c/coreboot/+/75451/comment/b3fa7474_030882cd : PS8, Line 209: else if (dev->link_list->secondary == 0) { : current = _acpi_fill_ivrs_ioapic(current, (u8 *)GNB_IO_APIC_ADDR, : PCI_DEVFN(0, 1), 0); > maybe add a TODO to add this resource with this index on all AMD SOCs? Done in follow-ups- -- To view, visit https://review.coreboot.org/c/coreboot/+/75451?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic471f05d6000c21081d70495b7dbd4350e68b774 Gerrit-Change-Number: 75451 Gerrit-PatchSet: 8 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 07 Jun 2023 13:52:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: acpi: Add a debug option to print out tables in ACPICA compatible hex
by Arthur Heymans (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Benjamin Doron, Kyösti Mälkki, Lance Zhao, Lean Sheng Tan, Nico Huber, Paul Menzel, Tim Wawrzynczak. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75677?usp=email ) Change subject: acpi: Add a debug option to print out tables in ACPICA compatible hex ...................................................................... Patch Set 4: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75677/comment/8d93fae5_76b16c57 : PS4, Line 18: > Add a small note on the implementation. […] Done Patchset: PS4: Thanks for the suggestions File src/Kconfig: https://review.coreboot.org/c/coreboot/+/75677/comment/df6ba2fb_684c4518 : PS4, Line 1302: format. > Add the information from the commit message also to the help text? Done File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/75677/comment/0e96cd0a_6830c925 : PS4, Line 2160: table > format? Done https://review.coreboot.org/c/coreboot/+/75677/comment/4cc24667_87fec1ee : PS4, Line 2161: > Wrap the line instead? (Ignore, if the formatters disagree. […] Done https://review.coreboot.org/c/coreboot/+/75677/comment/47d5cd6e_7dbcad81 : PS4, Line 2168: tabl > format? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc Gerrit-Change-Number: 75677 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 13:52:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: acpi: Add a debug option to print out tables in ACPICA compatible hex
by Arthur Heymans (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Kyösti Mälkki, Lance Zhao, Lean Sheng Tan, Nico Huber, Tim Wawrzynczak. Hello Benjamin Doron, Kyösti Mälkki, Lance Zhao, Lean Sheng Tan, Nico Huber, Tim Wawrzynczak, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75677?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: acpi: Add a debug option to print out tables in ACPICA compatible hex ...................................................................... acpi: Add a debug option to print out tables in ACPICA compatible hex Sometimes systems don't boot to the OS due to wrong ACPI tables. Printing the tables in an ACPICA compatible format makes analysis of ACPI tables easier. The ACPICA format (acpidump, acpixtract) is the following: " FACS @ 0x0000000000000000 0000: 46 41 43 53 40 00 00 00 E8 24 00 00 00 00 00 00 FACS@....$...... 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ " To achieve analyze ACPI tables capture the coreboot log between "Printing ACPI in ACPICA compatible table" and "Done printing ACPI in ACPICA compatible table". Remove the prefix "[SPEW ] " and then call 'acpixtract -a dump' to extract all the tables. Then use 'iasl -d' on the .dat files to decompile the tables. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc --- M src/Kconfig M src/acpi/acpi.c 2 files changed, 93 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/75677/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/75677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc Gerrit-Change-Number: 75677 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[master]: vendorcode/intel: Add edk2-stable202302 support
by Paul Menzel (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Felix Singer, Kapil Porwal, Meera Ravindranath, Ronak Kanabar, Sridhar Siricilla, Subrata Banik, Tarun Tuli. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75663?usp=email ) Change subject: vendorcode/intel: Add edk2-stable202302 support ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75663/comment/630a5981_07824adf : PS3, Line 8: Please start by stating, why the new version is needed. https://review.coreboot.org/c/coreboot/+/75663/comment/5ace200f_cb2ebf66 : PS3, Line 13: >> Use four spaces. -- To view, visit https://review.coreboot.org/c/coreboot/+/75663?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d4deab0bd1d2c6df28e067894875b80413cd905 Gerrit-Change-Number: 75663 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 13:37:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: acpi: Add a debug option to print out tables in ACPICA compatible hex
by Paul Menzel (Code Review) 07 Jun '23

07 Jun '23

Attention is currently required from: Arthur Heymans, Benjamin Doron, Kyösti Mälkki, Lance Zhao, Lean Sheng Tan, Nico Huber, Tim Wawrzynczak. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75677?usp=email ) Change subject: acpi: Add a debug option to print out tables in ACPICA compatible hex ...................................................................... Patch Set 4: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75677/comment/68aed9c8_65e24af8 : PS4, Line 18: Add a small note on the implementation. What format is expected? File src/Kconfig: https://review.coreboot.org/c/coreboot/+/75677/comment/19c289c2_6ce5ad0a : PS4, Line 1302: format. Add the information from the commit message also to the help text? File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/75677/comment/5fe6aee2_fc67a8b2 : PS4, Line 2160: table format? https://review.coreboot.org/c/coreboot/+/75677/comment/3d79c50e_8bf9bf81 : PS4, Line 2161: Wrap the line instead? (Ignore, if the formatters disagree.) https://review.coreboot.org/c/coreboot/+/75677/comment/4c4281f1_835e9126 : PS4, Line 2168: tabl format? -- To view, visit https://review.coreboot.org/c/coreboot/+/75677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b5d879014563f7a2e1f70c45cf871ba72f142dc Gerrit-Change-Number: 75677 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 07 Jun 2023 13:36:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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