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Change subject: mb/google/nissa/var/joxer: Disable storage devices based on fw_config
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75743/comment/df159f30_f01d25be :
PS1, Line 11: this (it
: disables all probed devices when fw_config is unprovisioned).
Please add the period after *this* and another before the ).
File src/mainboard/google/brya/variants/joxer/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/75743/comment/3d8b60b6_f42aa926 :
PS1, Line 3: bootblock-y += variant.c
Please mention the removal in the commit message.
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Change subject: drivers/i2c: Add PI7C9X2G608GP PCIe switch driver (pi608gp)
......................................................................
Patch Set 17:
(1 comment)
File src/drivers/i2c/pi608gp/pi608gp.c:
https://review.coreboot.org/c/coreboot/+/74433/comment/6bbb19d7_29746bb5 :
PS17, Line 59: if (allowed[i].lvl == level_mv.lvl && allowed[i].lvl_10 == level_mv.lvl_10)
> Doesn't look like it (to me it would look like C++ behavior): […]
Done
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Change subject: mb/google/nissa/var/joxer: Disable storage devices based on fw_config
......................................................................
Patch Set 1:
This change is ready for review.
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Change subject: soc/mediatek/mt8183: Force reduce DRAM speed for debug[DONOT MERGE]
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Please abandon, if it’s not needed anymore.
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Change subject: soc/intel/spr-sp: Remove HWP related settings
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75741/comment/cba4159c_f50f8036 :
PS1, Line 2: wanghao11
Please use your full name and not the user name:
$ git config --global user.name "Wang Hao" # if correct
$ git commit --amend --author="Wang Hao <wanghao11(a)inspur.com>" -s
https://review.coreboot.org/c/coreboot/+/75741/comment/ab260a93_7a6e4059 :
PS1, Line 11:
coreboot tries to be as much as independent from FSP as possible. What is the downside of doing this in coreboot (possible again)?
https://review.coreboot.org/c/coreboot/+/75741/comment/1e65aec5_8917ea0b :
PS1, Line 13: wanghao11
Ditto.
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Change subject: drivers/ipmi: retry ipmi_get_device_id in ipmi_kcs_init
......................................................................
Patch Set 2:
(7 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75739/comment/04f9afb9_08303387 :
PS2, Line 9: our test
Please elaborate, how you tested things.
https://review.coreboot.org/c/coreboot/+/75739/comment/719683d9_db8cf507 :
PS2, Line 9: fails
How exactly?
https://review.coreboot.org/c/coreboot/+/75739/comment/e000da48_d510b039 :
PS2, Line 10: this retry mechanism
Please elaborate. How many tries, and why did you choose this heuristic?
https://review.coreboot.org/c/coreboot/+/75739/comment/a74cea63_b9fdc21a :
PS2, Line 13: Signed-off-by: wanghao11 <wanghao11(a)inspur.com>
Please use the full name.
Patchset:
PS2:
Please elaborate much more in the commit message.
File src/drivers/ipmi/ipmi_kcs_ops.c:
https://review.coreboot.org/c/coreboot/+/75739/comment/2fbab825_5fe6b35f :
PS2, Line 124: if (!wait_ms(IPMI_GET_DID_RETRY_MS, !ipmi_get_device_id(dev, &rsp))) {
: printk(BIOS_ERR, "IPMI: BMC does not respond to get device id even "
: "after %d ms.\n", IPMI_GET_DID_RETRY_MS);
: dev->enabled = 0;
: return;
: }
Isn’t this code trying to do exactly the same, and shouldn’t you need to just increase IPMI_GET_DID_RETRY_MS?
https://review.coreboot.org/c/coreboot/+/75739/comment/db1d10b4_28108846 :
PS2, Line 139: mdelay(1000);
That’s too much of a delay for coreboot.
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Change subject: soc/intel/xeon_sp: Fix HEST table length
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75738/comment/faf924a8_7103a1e6 :
PS1, Line 11:
Please document, how you found the error and how you tested it.
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Change subject: soc/intel/xeon_sp/spr: Fix memory max capacity per processor
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75740/comment/e1752ec5_3d11bdf9 :
PS1, Line 2: wanghao11
Please use your full name and not the user name:
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$ git commit --amend --author="Wang Hao <wanghao11(a)inspur.com>" -s
https://review.coreboot.org/c/coreboot/+/75740/comment/b34026d4_95f36a43 :
PS1, Line 10:
Was there a user visible problem? If yes, please describe it, and also document how you tested your fix.
https://review.coreboot.org/c/coreboot/+/75740/comment/eb551238_11af8265 :
PS1, Line 12: Signed-off-by: wanghao11 <wanghao11(a)inspur.com>
Ditto.
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Change subject: cpu/intel: update model 306ax microcode from 0x20 to 0x21
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Any idea, if this is fixed now?
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Change subject: soc/intel/xeon_sp: Fix HEST table length
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
The change looks correct and the surrounding code should work.
I have serious doubts, though, that it would pass ubsan.
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