coreboot-gerrit June 2023

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[L] Change in coreboot[master]: mb/system76/rpl: Add Adder WS 3 as a variant
by Jeremy Soller (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Paul Menzel, Tim Crawford. Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73975?usp=email ) Change subject: mb/system76/rpl: Add Adder WS 3 as a variant ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73975?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I165a434fe18f8c0aac49cb872bb87f98551d8f2c Gerrit-Change-Number: 73975 Gerrit-PatchSet: 6 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 30 Jun 2023 16:30:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/system76/tgl-u: Enable reporting CPU C10 state over eSPI
by Jeremy Soller (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Tim Crawford. Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73689?usp=email ) Change subject: mb/system76/tgl-u: Enable reporting CPU C10 state over eSPI ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73689?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I58c03d91466b869d53c9ee2cbbe50adc32539494 Gerrit-Change-Number: 73689 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Comment-Date: Fri, 30 Jun 2023 16:30:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: mb/system76/adl: Add Gazelle 17 as a variant
by Jeremy Soller (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Tim Crawford. Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63990?usp=email ) Change subject: mb/system76/adl: Add Gazelle 17 as a variant ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63990?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib12ac47e8f34004f72e6234039823530511baea7 Gerrit-Change-Number: 63990 Gerrit-PatchSet: 11 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Comment-Date: Fri, 30 Jun 2023 16:29:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/system76/tgl-h: Disable D3cold
by Jeremy Soller (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Paul Menzel, Tim Crawford. Jeremy Soller has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61980?usp=email ) Change subject: mb/system76/tgl-h: Disable D3cold ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61980?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib4362783546aa01f0f8f5baaad817ee76be9c39c Gerrit-Change-Number: 61980 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 30 Jun 2023 16:29:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/*: Utilize get_fmap_value() Makefile function where possible
by Matt DeVillier (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Eric Lai, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel. Hello Eric Lai, Felix Held, Fred Reitberger, Jason Glenesk, Raul Rangel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/76168?usp=email to look at the new patch set (#3). Change subject: soc/amd/*: Utilize get_fmap_value() Makefile function where possible ...................................................................... soc/amd/*: Utilize get_fmap_value() Makefile function where possible Replace: $(shell awk '$$2 == "xyz" {print $$3}' $(obj)/fmap_config.h) with: $(call get_fmap_value,xyz) to improve code readability/maintainability. Change-Id: If6859108c7d5611a63fc38909dc75195bfb1d59a Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> --- M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/glinda/Makefile.inc M src/soc/amd/mendocino/Makefile.inc M src/soc/amd/phoenix/Makefile.inc M src/soc/amd/picasso/Makefile.inc 5 files changed, 39 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/76168/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/76168?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6859108c7d5611a63fc38909dc75195bfb1d59a Gerrit-Change-Number: 76168 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd/*: Utilize get_fmap_value() Makefile function where possible
by Matt DeVillier (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Eric Lai, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel. Hello Eric Lai, Felix Held, Fred Reitberger, Jason Glenesk, Raul Rangel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/76168?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Eric Lai Change subject: soc/amd/*: Utilize get_fmap_value() Makefile function where possible ...................................................................... soc/amd/*: Utilize get_fmap_value() Makefile function where possible Replace: $(shell awk '$$2 == "xyz" {print $$3}' $(obj)/fmap_config.h) with: $(call get_fmap_value,xyz) to improve code readability/maintainability. Change-Id: If6859108c7d5611a63fc38909dc75195bfb1d59a Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> --- M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/glinda/Makefile.inc M src/soc/amd/mendocino/Makefile.inc M src/soc/amd/phoenix/Makefile.inc M src/soc/amd/picasso/Makefile.inc 5 files changed, 41 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/76168/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76168?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6859108c7d5611a63fc38909dc75195bfb1d59a Gerrit-Change-Number: 76168 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: cpu/x86: Add some notes about XAPIC/X2APIC
by Kyösti Mälkki (Code Review) 30 Jun '23

30 Jun '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76196?usp=email ) Change subject: cpu/x86: Add some notes about XAPIC/X2APIC ...................................................................... cpu/x86: Add some notes about XAPIC/X2APIC At the time of writing SMM runtime does not make register accesses to LAPIC registers, but such breakage has been reported. S3 resume failure, where OS switched back from X2APIC to XAPIC mode, can be reproduced with a sandybridge SKU that has VT-d disabled. Change-Id: I300ba87c3d8fde548dbaf95703bd7e2fe54cff57 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/Kconfig 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/76196/1 diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 1e1b2ac..4e17690 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -50,16 +50,26 @@ config XAPIC_ONLY prompt "Set XAPIC mode" bool + help + coreboot and SMM runtime only use XAPIC mode. + FIXME: DMAR should have X2APIC optout bit set. config X2APIC_ONLY prompt "Set X2APIC mode" bool depends on PARALLEL_MP + help + coreboot and SMM runtime only use X2APIC mode. + Note: OS switches back to XAPIC mode if VT-d is disabled. + FIXME: S3 resume (and SMM runtime) will break if OS makes the switch. config X2APIC_RUNTIME prompt "Support both XAPIC and X2APIC" bool depends on PARALLEL_MP + help + The switch to X2APIC mode happens early in ramstage. SMM runtime can + support either mode in case the OS switches back to XAPIC. config X2APIC_LATE_WORKAROUND prompt "Use XAPIC for AP bringup, then change to X2APIC" -- To view, visit https://review.coreboot.org/c/coreboot/+/76196?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I300ba87c3d8fde548dbaf95703bd7e2fe54cff57 Gerrit-Change-Number: 76196 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: cpu/x86/lapic: Fix X2APIC_ONLY regression
by Kyösti Mälkki (Code Review) 30 Jun '23

30 Jun '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76195?usp=email ) Change subject: cpu/x86/lapic: Fix X2APIC_ONLY regression ...................................................................... cpu/x86/lapic: Fix X2APIC_ONLY regression Some ancient CPUs may have had LAPIC disabled at power-up, so semantically enable_lapic() should always come before attempting to access the register banks. With X2APIC_ONLY option it is necessary to ensure enable_lapic() is called prior to any other lapic register space accesses, since the XAPIC mode MMIO accessors are optimised away build-time and CPU's do not yet initialise for X2APIC mode at reset. Change-Id: I96eaa5c43108c802375e184e0c68b5091ca0198f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/mtrr/mtrr.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/76195/1 diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index a3a89fe..f467145 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -806,6 +806,8 @@ { int address_size; + enable_lapic(); + x86_setup_fixed_mtrrs(); address_size = cpu_phys_address_size(); printk(BIOS_DEBUG, "apic_id 0x%x setup mtrr for CPU physical address size: %d bits\n", -- To view, visit https://review.coreboot.org/c/coreboot/+/76195?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96eaa5c43108c802375e184e0c68b5091ca0198f Gerrit-Change-Number: 76195 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: arch/x86: Ensure LAPIC mode for exception handler
by Kyösti Mälkki (Code Review) 30 Jun '23

30 Jun '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76194?usp=email ) Change subject: arch/x86: Ensure LAPIC mode for exception handler ...................................................................... arch/x86: Ensure LAPIC mode for exception handler Attempting to use X2APIC MSRs before the call to enable_lapic() is made raises exception and double-faults. Change-Id: Ib97889466af0fbe639bec2be730784acc015b525 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/arch/x86/exception.c M src/include/cpu/x86/lapic.h 2 files changed, 14 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/76194/1 diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c index 5f6c0fc..e9234ad 100644 --- a/src/arch/x86/exception.c +++ b/src/arch/x86/exception.c @@ -488,7 +488,6 @@ #else /* !CONFIG_GDB_STUB */ int logical_processor = 0; - u32 apic_id = CONFIG(SMP) ? lapicid() : 0; if (info->vector == DEBUG_VECTOR) { if (breakpoint_dispatch_handler(info) == 0) @@ -513,7 +512,7 @@ "r10: %016llx r11: %016llx\n" "r12: %016llx r13: %016llx\n" "r14: %016llx r15: %016llx\n", - logical_processor, apic_id, + logical_processor, early_lapicid(), info->vector, info->cs, info->rip, info->error_code, info->rflags, read_cr2(), info->rax, info->rbx, info->rcx, info->rdx, @@ -530,7 +529,7 @@ "Code: %d eflags: %08x cr2: %08x\n" "eax: %08x ebx: %08x ecx: %08x edx: %08x\n" "edi: %08x esi: %08x ebp: %08x esp: %08x\n", - logical_processor, apic_id, + logical_processor, early_lapicid(), info->vector, info->cs, info->eip, info->error_code, info->eflags, read_cr2(), info->eax, info->ebx, info->ecx, info->edx, diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index f7fecf1..87cf3c7 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -184,4 +184,16 @@ void disable_lapic(void); void setup_lapic_interrupts(void); +static inline unsigned int early_lapicid(void) +{ + if (!CONFIG(SMP)) + return 0; + + if (!ENV_RAMSTAGE) + return 0; + + enable_lapic(); + return lapicid(); +} + #endif /* CPU_X86_LAPIC_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/76194?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib97889466af0fbe639bec2be730784acc015b525 Gerrit-Change-Number: 76194 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: cpu/x86: Reduce scope of MTRR functions used locally
by Kyösti Mälkki (Code Review) 30 Jun '23

30 Jun '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76193?usp=email ) Change subject: cpu/x86: Reduce scope of MTRR functions used locally ...................................................................... cpu/x86: Reduce scope of MTRR functions used locally Change-Id: Ic00358ee5b05d011a95d85ec355adef71c39a529 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/mtrr/mtrr.c M src/include/cpu/x86/mtrr.h 2 files changed, 3 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/76193/1 diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index d156d41..a3a89fe 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -346,13 +346,13 @@ fixed_mtrrs_hide_amd_rwdram(); } -void x86_setup_fixed_mtrrs_no_enable(void) +static void x86_setup_fixed_mtrrs_no_enable(void) { calc_fixed_mtrrs(); commit_fixed_mtrrs(); } -void x86_setup_fixed_mtrrs(void) +static void x86_setup_fixed_mtrrs(void) { x86_setup_fixed_mtrrs_no_enable(); diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h index 298947a..5741afb 100644 --- a/src/include/cpu/x86/mtrr.h +++ b/src/include/cpu/x86/mtrr.h @@ -95,9 +95,7 @@ void fixed_mtrrs_expose_amd_rwdram(void); /* Hide Rd/WrDram bits and allow modification for AMD. */ void fixed_mtrrs_hide_amd_rwdram(void); -void x86_setup_fixed_mtrrs(void); -/* Set up fixed MTRRs but do not enable them. */ -void x86_setup_fixed_mtrrs_no_enable(void); + void x86_mtrr_check(void); /* Insert a temporary MTRR range for the duration of coreboot's runtime. -- To view, visit https://review.coreboot.org/c/coreboot/+/76193?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic00358ee5b05d011a95d85ec355adef71c39a529 Gerrit-Change-Number: 76193 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit June 2023