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Change subject: acpi: Add SPCR table
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
> The checksum was fixed in the meantime.
See CB:76158
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Change subject: acpi.c: Guard FACS generation
......................................................................
Patch Set 1:
(1 comment)
File src/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/76178/comment/5a8141bb_18c38c17 :
PS1, Line 2053: current = ALIGN_UP(current, 64);
> It's right there in the second paragraph: "The platform boot firmware aligns the […]
Whoops brain fart there.
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Change subject: soc/amd/phoenix/Makefile.inc: Pass APOB_NV address as offset
......................................................................
Patch Set 3:
(1 comment)
File src/soc/amd/phoenix/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/76162/comment/e9a07ef0_249fd76c :
PS2, Line 138: $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h))
> does it make sense to split this line out / save as a variable since it's being used twice (potentia […]
see followup (CB:76197)
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Change subject: soc/amd/phoenix/Makefile.inc: Refactor repeated lines to a variable
......................................................................
soc/amd/phoenix/Makefile.inc: Refactor repeated lines to a variable
Rather than repeat the same line multiple times, save it in a variable
once and use that variable in the rest of the file.
Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Change-Id: I4eb262adb3bbda04add79b2e2b8bee9a609a1e5b
---
M src/soc/amd/phoenix/Makefile.inc
1 file changed, 7 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/76197/1
diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc
index 440c1d5..81ac8e6 100644
--- a/src/soc/amd/phoenix/Makefile.inc
+++ b/src/soc/amd/phoenix/Makefile.inc
@@ -69,6 +69,9 @@
PHOENIX_FW_B_POSITION=$(call int-add, \
$(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION))
+
+FMAP_FLASH_START=$(call get_fmap_value,FMAP_SECTION_FLASH_START)
+
#
# PSP Directory Table items
#
@@ -132,16 +135,14 @@
# The flashmap section used for this is expected to be named RW_MRC_CACHE
APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE)
APOB_NV_BASE=$(call int-subtract, \
- $(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) \
- $(call get_fmap_value,FMAP_SECTION_FLASH_START))
+ $(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START) $(FMAP_FLASH_START))
ifeq ($(CONFIG_HAS_RECOVERY_MRC_CACHE),y)
# On boards with recovery MRC cache, point type 0x63 entry to RECOVERY_MRC_CACHE.
# Else use RW_MRC_CACHE. This entry will be added in the RO section.
APOB_NV_RO_SIZE=$(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_SIZE)
APOB_NV_RO_BASE=$(call int-subtract, \
- $(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_START) \
- $(call get_fmap_value,FMAP_SECTION_FLASH_START))
+ $(call get_fmap_value,FMAP_SECTION_RECOVERY_MRC_CACHE_START) $(FMAP_FLASH_START))
else
APOB_NV_RO_SIZE=$(APOB_NV_SIZE)
APOB_NV_RO_BASE=$(APOB_NV_BASE)
@@ -165,11 +166,9 @@
ifeq ($(CONFIG_SEPARATE_SIGNED_PSPFW),y)
SIGNED_AMDFW_A_POSITION=$(call int-subtract, \
- $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_A_START) \
- $(call get_fmap_value,FMAP_SECTION_FLASH_START))
+ $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_A_START) $(FMAP_FLASH_START))
SIGNED_AMDFW_B_POSITION=$(call int-subtract, \
- $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_B_START) \
- $(call get_fmap_value,FMAP_SECTION_FLASH_START))
+ $(call get_fmap_value,FMAP_SECTION_SIGNED_AMDFW_B_START) $(FMAP_FLASH_START))
SIGNED_AMDFW_A_FILE=$(obj)/amdfw_a.rom.signed
SIGNED_AMDFW_B_FILE=$(obj)/amdfw_b.rom.signed
endif # CONFIG_SEPARATE_SIGNED_PSPFW
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Change subject: soc/amd/phoenix/Makefile.inc: Pass APOB_NV address as offset
......................................................................
soc/amd/phoenix/Makefile.inc: Pass APOB_NV address as offset
Pass the APOB NV address as a flash offset instead of x86 address.
TEST=boot birman and verify APOB_NV is working
Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com>
Change-Id: I0f710f12cc5d933a75840dbce1c4bad0c2ea04cc
---
M src/soc/amd/phoenix/Makefile.inc
1 file changed, 6 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/76162/3
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Change subject: (Please Test)payloads/U-Boot: Upgrade from U-Boot "v2021.07" to "v2023.04"
......................................................................
(Please Test)payloads/U-Boot: Upgrade from U-Boot "v2021.07" to "v2023.04"
U-Boot v2023.04 was released on Mon 03 April 2023.
https://source.denx.de/u-boot/u-boot/-/blob/master/doc/develop/release_cycl…
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---
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CoolStar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76159?usp=email )
Change subject: mb/google/link: rework TP/TS ACPI to add support for new Windows I2C driver
......................................................................
Patch Set 7:
(3 comments)
File src/mainboard/google/link/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/76159/comment/f45b6d7a_31c12272 :
PS7, Line 50: LINK
> Can't find LINK here: https://uefi.org/acpi_id_list […]
I2C bus driver code: https://github.com/coolstar/gmbusi2c
Atmel IDs are used for the touchpad/touch screen devices/drivers, which are separate, and hence would not suffice
https://review.coreboot.org/c/coreboot/+/76159/comment/1347968e_ad001387 :
PS7, Line 62: VGA
> Doesn't really matter, but I find VGA a bit confusing. What does it mean […]
the I2C bus is literally on the VGA DDC pins
https://review.coreboot.org/c/coreboot/+/76159/comment/8417335f_e1e8eb14 :
PS7, Line 82: ISTP
> Where is this used? For the OS, ATML0000 already identifies as touchpad.
code was based off Samus, where that is present
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