coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

1 participants
5387 discussions

[XS] Change in coreboot[master]: UNTESTED arch/x86/tables.c: Carve out ACPI as separate bootmem range
by Nico Huber (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Arthur Heymans, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76133?usp=email ) Change subject: UNTESTED arch/x86/tables.c: Carve out ACPI as separate bootmem range ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Is there maybe a more common-code place where we could add it? -- To view, visit https://review.coreboot.org/c/coreboot/+/76133?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1bd0ef2b1a36f101ecf89237eddcf07a79d0a9ec Gerrit-Change-Number: 76133 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 30 Jun 2023 12:43:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/intel/common/block/oc_wdt: Add OC watchdog common block
by Michał Żygowski (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Angel Pons, Arthur Heymans, Benjamin Doron, Martin L Roth, Maximilian Brune, Michał Kopeć, Michał Żygowski, Nico Huber, Werner Zeh. Hello Angel Pons, Arthur Heymans, Benjamin Doron, Maximilian Brune, Michał Kopeć, Nico Huber, Paul Menzel, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68944?usp=email to look at the new patch set (#18). The following approvals got outdated and were removed: Code-Review+1 by Nico Huber Change subject: soc/intel/common/block/oc_wdt: Add OC watchdog common block ...................................................................... soc/intel/common/block/oc_wdt: Add OC watchdog common block Add new block for handling overcloking watchdog. The watchdog is present since Skylake or maybe even earlier so it is safe to use with most of the microarchitectures utilizing intelblocks. The patch adds the common block for initializing and feeding the watchdog. Timeout is defined statically in Kconfig and should be set high enough by the board or SoC Kconfig to let the board boot with full memory training and avoid reset loops. Full training of 128GB DDR5 DIMM memory on AlderLake takes about 5 minutes. Newer SoCs with newer memory technologies and higher RAM capacity may take more. THe default has been set to 10 minutes. The patch also adds support for feeding watchdog in driverless mode, i.e. it utilizies periodic SMI to reload the timeout value and restart the watchdog timer. This is optional and selectable by Kconfig option as well. If the option is not enabled, payload and/or software must ensure to keep feeding the watchdog, otherwise the platform will reset. TEST=Enable watchdog on MSI PRO Z690-A and see the platform resets after some time. Enable the watchdog in driverless mode and see the platform no longer resets and periodic SMI keeps feeding the watchdog. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: Ib494aa0c7581351abca8b496fc5895b2c7cbc5bc --- A src/soc/intel/common/block/include/intelblocks/oc_wdt.h A src/soc/intel/common/block/oc_wdt/Kconfig A src/soc/intel/common/block/oc_wdt/Makefile.inc A src/soc/intel/common/block/oc_wdt/oc_wdt.c M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/block/smm/smm.c 6 files changed, 163 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/68944/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/68944?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib494aa0c7581351abca8b496fc5895b2c7cbc5bc Gerrit-Change-Number: 68944 Gerrit-PatchSet: 18 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: soc/intel/alderlake: Hook up the OC watchdog
by Michał Żygowski (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Angel Pons, Michał Kopeć, Nico Huber, Paul Menzel, Subrata Banik, Tarun Tuli, Werner Zeh. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68945?usp=email ) Change subject: soc/intel/alderlake: Hook up the OC watchdog ...................................................................... Patch Set 18: (1 comment) File src/soc/intel/alderlake/romstage/romstage.c: https://review.coreboot.org/c/coreboot/+/68945/comment/63322722_adb72337 : PS16, Line 169: CONFIG_SOC_INTEL_COMMON_OC_WDT_TIMEOUT_SECONDS > Ping, Subrata Patch CB:68944 set high-enough default and does not allow to set the timeout by user in menuconfig anymore (instead SOCs may ovverride the default in their own Kconfig). -- To view, visit https://review.coreboot.org/c/coreboot/+/68945?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c2c640d48b7e03ad8cd8d6cdf6aac447e93cd86 Gerrit-Change-Number: 68945 Gerrit-PatchSet: 18 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 30 Jun 2023 12:40:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: [SKETCH] acpigen: Pipe data in acpigen_dsm_uuid_enum_functions()
by Nico Huber (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Lance Zhao. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76092?usp=email ) Change subject: [SKETCH] acpigen: Pipe data in acpigen_dsm_uuid_enum_functions() ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Do we want to go along with this instead of the warning override? […] May be best to get the other one in first. -- To view, visit https://review.coreboot.org/c/coreboot/+/76092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad15af08c39d0ddb477216bc3e93bc799899bb0e Gerrit-Change-Number: 76092 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Comment-Date: Fri, 30 Jun 2023 12:40:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: acpi/acpigen.c: Ignore compiler warning about stack overflowing
by Nico Huber (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Arthur Heymans, Felix Held, Lance Zhao, Paul Menzel. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76007?usp=email ) Change subject: acpi/acpigen.c: Ignore compiler warning about stack overflowing ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/76007?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5d445d151db5e6cc7b6e13bf74ce81007d819f1d Gerrit-Change-Number: 76007 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 30 Jun 2023 12:39:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: [SKETCH] acpigen: Pipe data in acpigen_dsm_uuid_enum_functions()
by Nico Huber (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Lance Zhao. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76092?usp=email ) Change subject: [SKETCH] acpigen: Pipe data in acpigen_dsm_uuid_enum_functions() ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Do we want to go along with this instead of the warning override? Then we should find somebody to test this, I guess? -- To view, visit https://review.coreboot.org/c/coreboot/+/76092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad15af08c39d0ddb477216bc3e93bc799899bb0e Gerrit-Change-Number: 76092 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Comment-Date: Fri, 30 Jun 2023 12:35:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[master]: soc/intel/apollolake/include/soc/pmc.h: Add file
by Michał Żygowski (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Angel Pons, Nico Huber. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69900?usp=email ) Change subject: soc/intel/apollolake/include/soc/pmc.h: Add file ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69900/comment/7a71cb82_bb867998 : PS5, Line 10: pm.h > Ping, Angel Ping -- To view, visit https://review.coreboot.org/c/coreboot/+/69900?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2726aaae1ce60d15a3944dadcf793def2dcb3a1c Gerrit-Change-Number: 69900 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 30 Jun 2023 12:28:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel: Add human-readble names to RPL-S ESPI PCI IDs
by Michał Żygowski (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: Subrata Banik, Tarun Tuli. Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76192?usp=email ) Change subject: soc/intel: Add human-readble names to RPL-S ESPI PCI IDs ...................................................................... soc/intel: Add human-readble names to RPL-S ESPI PCI IDs Change-Id: I68416e1633c3d67070790a9db2cd9a13a8981042 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/lpc/lpc.c 3 files changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/76192/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index fca9b0d..b311991 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2980,9 +2980,9 @@ #define PCI_DID_INTEL_RPP_S_ESPI_1 0x7a01 #define PCI_DID_INTEL_RPP_S_ESPI_2 0x7a02 #define PCI_DID_INTEL_RPP_S_ESPI_3 0x7a03 -#define PCI_DID_INTEL_RPP_S_ESPI_4 0x7a04 -#define PCI_DID_INTEL_RPP_S_ESPI_5 0x7a05 -#define PCI_DID_INTEL_RPP_S_ESPI_6 0x7a06 +#define PCI_DID_INTEL_RPP_S_ESPI_Z790 0x7a04 +#define PCI_DID_INTEL_RPP_S_ESPI_H770 0x7a05 +#define PCI_DID_INTEL_RPP_S_ESPI_B760 0x7a06 #define PCI_DID_INTEL_RPP_S_ESPI_7 0x7a07 #define PCI_DID_INTEL_RPP_S_ESPI_8 0x7a08 #define PCI_DID_INTEL_RPP_S_ESPI_9 0x7a09 diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index de5af21..034cd1c 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -107,9 +107,9 @@ { PCI_DID_INTEL_RPP_S_ESPI_1, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_2, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_3, "Raptorlake-S SKU" }, - { PCI_DID_INTEL_RPP_S_ESPI_4, "Raptorlake-S Z790" }, - { PCI_DID_INTEL_RPP_S_ESPI_5, "Raptorlake-S H770" }, - { PCI_DID_INTEL_RPP_S_ESPI_6, "Raptorlake-S B760" }, + { PCI_DID_INTEL_RPP_S_ESPI_Z790, "Raptorlake-S Z790" }, + { PCI_DID_INTEL_RPP_S_ESPI_H770, "Raptorlake-S H770" }, + { PCI_DID_INTEL_RPP_S_ESPI_B760, "Raptorlake-S B760" }, { PCI_DID_INTEL_RPP_S_ESPI_7, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_8, "Raptorlake-S SKU" }, { PCI_DID_INTEL_RPP_S_ESPI_9, "Raptorlake-S SKU" }, diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 1d8d748..0de3154 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -182,9 +182,9 @@ PCI_DID_INTEL_RPP_S_ESPI_1, PCI_DID_INTEL_RPP_S_ESPI_2, PCI_DID_INTEL_RPP_S_ESPI_3, - PCI_DID_INTEL_RPP_S_ESPI_4, - PCI_DID_INTEL_RPP_S_ESPI_5, - PCI_DID_INTEL_RPP_S_ESPI_6, + PCI_DID_INTEL_RPP_S_ESPI_Z790, + PCI_DID_INTEL_RPP_S_ESPI_H770, + PCI_DID_INTEL_RPP_S_ESPI_B760, PCI_DID_INTEL_RPP_S_ESPI_7, PCI_DID_INTEL_RPP_S_ESPI_8, PCI_DID_INTEL_RPP_S_ESPI_9, -- To view, visit https://review.coreboot.org/c/coreboot/+/76192?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68416e1633c3d67070790a9db2cd9a13a8981042 Gerrit-Change-Number: 76192 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[master]: soc/intel: Fix W790 chipset name
by Michał Żygowski (Code Review) 30 Jun '23

30 Jun '23

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76191?usp=email ) Change subject: soc/intel: Fix W790 chipset name ...................................................................... soc/intel: Fix W790 chipset name In newer ADL/RPL PCH EDS 619362 revision 2.1 the ESPI ID 0x7A8A belongs to the W790 chipset. Earlier revisions had the chipset with ID 0x7A8A named W685, which was probably just a temporary name. Change the naming throughout the tree to W790, which is the real existing chipset. Change-Id: I87603298d655e9bf898b34acdd5b403f5affaee3 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/lpc/lpc.c 3 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/76191/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 939f717..fca9b0d 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3018,7 +3018,7 @@ #define PCI_DID_INTEL_ADP_S_ESPI_H610 0x7a87 #define PCI_DID_INTEL_ADP_S_ESPI_W680 0x7a88 #define PCI_DID_INTEL_ADP_S_ESPI_9 0x7a89 -#define PCI_DID_INTEL_ADP_S_ESPI_W685 0x7a8a +#define PCI_DID_INTEL_ADP_S_ESPI_W790 0x7a8a #define PCI_DID_INTEL_ADP_S_ESPI_11 0x7a8b #define PCI_DID_INTEL_ADP_S_ESPI_HM670 0x7a8c #define PCI_DID_INTEL_ADP_S_ESPI_WM690 0x7a8d diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index f118a89..de5af21 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -100,7 +100,7 @@ { PCI_DID_INTEL_ADP_S_ESPI_Q670, "AlderLake-S Q670" }, { PCI_DID_INTEL_ADP_S_ESPI_Z690, "AlderLake-S Z690" }, { PCI_DID_INTEL_ADP_S_ESPI_W680, "AlderLake-S W680" }, - { PCI_DID_INTEL_ADP_S_ESPI_W685, "AlderLake-S W685" }, + { PCI_DID_INTEL_ADP_S_ESPI_W790, "AlderLake-S W790" }, { PCI_DID_INTEL_ADP_S_ESPI_WM690, "AlderLake-S WM690" }, { PCI_DID_INTEL_ADP_S_ESPI_HM670, "AlderLake-S HM670" }, { PCI_DID_INTEL_RPP_S_ESPI_0, "Raptorlake-S SKU" }, diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index ef5a0c1..1d8d748 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -310,7 +310,7 @@ PCI_DID_INTEL_JSP_SUPER_ESPI, PCI_DID_INTEL_ADP_S_ESPI_WM690, PCI_DID_INTEL_ADP_S_ESPI_HM670, - PCI_DID_INTEL_ADP_S_ESPI_W685, + PCI_DID_INTEL_ADP_S_ESPI_W790, PCI_DID_INTEL_ADP_S_ESPI_W680, PCI_DID_INTEL_ADP_S_ESPI_H610, PCI_DID_INTEL_ADP_S_ESPI_B660, -- To view, visit https://review.coreboot.org/c/coreboot/+/76191?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87603298d655e9bf898b34acdd5b403f5affaee3 Gerrit-Change-Number: 76191 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: mb/google/link: rework TP/TS ACPI to add support for new Windows I2C ...
by Nico Huber (Code Review) 30 Jun '23

30 Jun '23

Attention is currently required from: CoolStar, Martin Roth, Matt DeVillier, Stefan Reinauer. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76159?usp=email ) Change subject: mb/google/link: rework TP/TS ACPI to add support for new Windows I2C driver ...................................................................... Patch Set 7: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/76159/comment/61f128c6_bf513471 : PS7, Line 7: to add support If you'd drop `to add support `, it would fit the line without losing valuable information. https://review.coreboot.org/c/coreboot/+/76159/comment/8e4decf0_c8c05f29 : PS7, Line 24: or changing display resolutions with the i2c driver attached. What happens when the touchpad is used while an external display is attached/probed? I would further test how DP cascades behave, e.g. daisy- chained displays, multi-port docking hubs... File src/mainboard/google/link/acpi/mainboard.asl: https://review.coreboot.org/c/coreboot/+/76159/comment/227948fc_495b0b8b : PS7, Line 49: ){ Missing space before `{`. Same below. https://review.coreboot.org/c/coreboot/+/76159/comment/c8a838eb_0b68f281 : PS7, Line 50: LINK Can't find LINK here: https://uefi.org/acpi_id_list If it's not going to be registered, we should find a propper way to identify a custom device. If necessary at all, it seems possible that the Atmel IDs would already suffice? Could you link to the code of the Windows driver? https://review.coreboot.org/c/coreboot/+/76159/comment/42b3b2b5_9238e17f : PS7, Line 51: Method (_STA, 0, NotSerialized) // _STA: Status : { : Return (0x0F) : } This seems superfluous, 0xf should be the default w/o _STA. Same below. https://review.coreboot.org/c/coreboot/+/76159/comment/a4b0800a_a5646730 : PS7, Line 56: MMIO I don't see this being used, I guess that would be the Windows driver? Should this be a _DSM? https://review.coreboot.org/c/coreboot/+/76159/comment/f39d28cb_7da1d18c : PS7, Line 62: VGA Doesn't really matter, but I find VGA a bit confusing. What does it mean in this context? https://review.coreboot.org/c/coreboot/+/76159/comment/a594bcbd_906e2a9d : PS7, Line 82: ISTP Where is this used? For the OS, ATML0000 already identifies as touchpad. -- To view, visit https://review.coreboot.org/c/coreboot/+/76159?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If7ee05d15bc17d335cf8c1a8e80bea62800de475 Gerrit-Change-Number: 76159 Gerrit-PatchSet: 7 Gerrit-Owner: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Comment-Date: Fri, 30 Jun 2023 12:00:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2023