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Change subject: soc/amd: Add Merlin Falcon video, AGESA and PSP
......................................................................
Patch Set 3: Verified+1
(1 comment)
Patchset:
PS3:
Is this still relevant?
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Change subject: intel: update microcode: fix most of the shellsheck warning
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/blobs/+/35660/comment/4b046adc_0bcc90f4 :
PS1, Line 7: intel: update microcode: fix most of the shellsheck warning
shellcheck
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Change subject: 00730F01/binaryPI: fix firmware table lookup
......................................................................
00730F01/binaryPI: fix firmware table lookup
The bug was discussed in CB:31074, referred to as "off-by-one" error.
AGESA looks for ROM signature of the firmware table at 5 offsets
instead of all 6 possible offsets. As a result placing the AMD firmware
with amdfwtool at offset FFFA0000 will lead to the incorrect xHCI
controller initialization by not loading the xHCI firmware from the
firmware table.
Increase the loop iterations to 6 in order to allow offset FFFA0000 to
be checked for ROM signature presence. The goal is to save even more
space in the SPI flash by putting the AMD firmware at the highest possible
address. The bug was present in both AGESA 1.0.0.A and 1.0.0.4 used by
PC Engines apu2 platforms.
TEST=Set the AMD FW offset to FFFA0000, build apu2 firmware and check
whether xHCI controller appears in lspci on Linux and USB 3.0 devices get
enumerated properly.
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: I7d81998b34c24d8294c81631224d92133bb67f24
---
M mainboard/pcengines/apu2/AGESA.bin
M pi/amd/00730F01/FT3b/AGESA.bin
2 files changed, 0 insertions(+), 0 deletions(-)
Approvals:
Stefan Reinauer: Verified; Looks good to me, approved
diff --git a/mainboard/pcengines/apu2/AGESA.bin b/mainboard/pcengines/apu2/AGESA.bin
index 71d8dba..12b57e8 100644
--- a/mainboard/pcengines/apu2/AGESA.bin
+++ b/mainboard/pcengines/apu2/AGESA.bin
Binary files differ
diff --git a/pi/amd/00730F01/FT3b/AGESA.bin b/pi/amd/00730F01/FT3b/AGESA.bin
index f307daa..cbae8c5 100644
--- a/pi/amd/00730F01/FT3b/AGESA.bin
+++ b/pi/amd/00730F01/FT3b/AGESA.bin
Binary files differ
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Change subject: 00730F01/binaryPI: fix firmware table lookup
......................................................................
Patch Set 3: Verified+1
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Change subject: 00730F01/binaryPI: fix firmware table lookup
......................................................................
Patch Set 3: Code-Review+2
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(
3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: cpu/intel/stm: Use URLs so a link is generated
......................................................................
cpu/intel/stm: Use URLs so a link is generated
Change-Id: I21b1f681a3e6def66149b74c62eb9b0c52bd7249
Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de>
---
M cpu/intel/stm/README.md
1 file changed, 2 insertions(+), 2 deletions(-)
Approvals:
Stefan Reinauer: Verified; Looks good to me, approved
diff --git a/cpu/intel/stm/README.md b/cpu/intel/stm/README.md
index 361fecf..ed62c19 100644
--- a/cpu/intel/stm/README.md
+++ b/cpu/intel/stm/README.md
@@ -39,7 +39,7 @@
SMI Transfer Monitor (STM) User Guide, August 2015
-The above document can be obtained from firmware.intel.com.
+The above document can be obtained from https://firmware.intel.com.
The STM-PE interface is defined in the Readme.STMPE file found on
-the stmpe branch of review.coreboot.org/STM.
+the stmpe branch of https://review.coreboot.org/STM.
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Change subject: cpu/intel/stm: Use URLs so a link is generated
......................................................................
Patch Set 4: Verified+1
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Change subject: cpu/intel/stm: Mark up file name as code/monospace
......................................................................
cpu/intel/stm: Mark up file name as code/monospace
Change-Id: Ib86fb06d5b1824ae445fac2ba11a6cc54974e0f0
Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de>
---
M cpu/intel/stm/README.md
1 file changed, 2 insertions(+), 2 deletions(-)
Approvals:
Stefan Reinauer: Verified; Looks good to me, approved
diff --git a/cpu/intel/stm/README.md b/cpu/intel/stm/README.md
index 99566d2..361fecf 100644
--- a/cpu/intel/stm/README.md
+++ b/cpu/intel/stm/README.md
@@ -16,8 +16,8 @@
## Instructions:
-This folder serves as the location for the stm.bin file. The developer
-can use the default stm.bin provided or replace it with one that has
+This folder serves as the location for the `stm.bin` file. The developer
+can use the default `stm.bin` provided or replace it with one that has
been custom built. The coreboot build system will look here for the
STM binary when the STM has been configured.
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Change subject: cpu/intel/stm: Mark up file name as code/monospace
......................................................................
Patch Set 4: Verified+1
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Change subject: cpu/intel/stm: Mark up file name as code/monospace
......................................................................
Patch Set 4: Code-Review+2
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