coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: mb/google/rex/var/rex0: add HID over SPI ACPI driver
by Elyes Haouas (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Eran Mitrani, Matt DeVillier, Paul Menzel, Tarun Tuli. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74885?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/rex/var/rex0: add HID over SPI ACPI driver ...................................................................... Patch Set 17: (1 comment) File src/mainboard/google/rex/variants/rex0/include/variant/acpi/hid_spi_elan.asl: https://review.coreboot.org/c/coreboot/+/74885/comment/e0f867e5_715227a3 : PS17, Line 56: (LEqual(Arg0,ToUUID("6E2AC436-0FC please use ASL2.0 syntax -- To view, visit https://review.coreboot.org/c/coreboot/+/74885?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id51d385ce350cef23da4184b044c74569f4dd3f0 Gerrit-Change-Number: 74885 Gerrit-PatchSet: 17 Gerrit-Owner: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 12 Jun 2023 18:00:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: drivers/pc80/tpm: Add Infineon SLB 9672 ID
by Tim Crawford (Code Review) 12 Jun '23

12 Jun '23

Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75807?usp=email ) Change subject: drivers/pc80/tpm: Add Infineon SLB 9672 ID ...................................................................... drivers/pc80/tpm: Add Infineon SLB 9672 ID Allows the new Infineon TPM chip used on Clevo laptops to be recognized. Change-Id: I2ee31b787d80c0b9c24c748b1b28906a22a1dee7 Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/drivers/pc80/tpm/tis.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/75807/1 diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c index ce88ae0..7e5f5e5 100644 --- a/src/drivers/pc80/tpm/tis.c +++ b/src/drivers/pc80/tpm/tis.c @@ -114,6 +114,7 @@ #if CONFIG(TPM2) {0x001a, "SLB9665 TT 2.0"}, {0x001b, "SLB9670 TT 2.0"}, + {0x001d, "SLB9672 TT 2.0"}, #else {0x001a, "SLB9660 TT 1.2"}, {0x001b, "SLB9670 TT 1.2"}, -- To view, visit https://review.coreboot.org/c/coreboot/+/75807?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2ee31b787d80c0b9c24c748b1b28906a22a1dee7 Gerrit-Change-Number: 75807 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: soc/amd/stoney: Expand the SMM region for cache
by Felix Held (Code Review) 12 Jun '23

12 Jun '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69782?usp=email ) Change subject: soc/amd/stoney: Expand the SMM region for cache ...................................................................... soc/amd/stoney: Expand the SMM region for cache Currently the data to be put to cache region is 0x14FF90. With the limit size 0x150000, the data for S3 can not be put into. So we expand it a little. Change-Id: If6b03b713059c54c7dae8f2db0f6426d8aa1aab1 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69782 Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/stoneyridge/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Felix Held: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 1e35d76..4ae08d2 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -260,7 +260,7 @@ config SMM_RESERVED_SIZE hex - default 0x150000 + default 0x160000 config SMM_MODULE_STACK_SIZE hex -- To view, visit https://review.coreboot.org/c/coreboot/+/69782?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6b03b713059c54c7dae8f2db0f6426d8aa1aab1 Gerrit-Change-Number: 69782 Gerrit-PatchSet: 6 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: acpi/acpi.h: Remove global acpi_fill_ivrs_ioapic()
by Naresh (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel. Naresh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75711?usp=email ) Change subject: acpi/acpi.h: Remove global acpi_fill_ivrs_ioapic() ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75711?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic403fd84cb9cd5805fbc6f0c5a64cefbf4b0cd81 Gerrit-Change-Number: 75711 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Naresh <naresh.solanki.2011(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 12 Jun 2023 17:28:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/amd/stoney: Expand the SMM region for cache
by Felix Held (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Arthur Heymans, Bao Zheng, Matt DeVillier, Zheng Bao. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69782?usp=email ) Change subject: soc/amd/stoney: Expand the SMM region for cache ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69782?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6b03b713059c54c7dae8f2db0f6426d8aa1aab1 Gerrit-Change-Number: 69782 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 12 Jun 2023 17:28:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/acpi/ivrs: Use specific IOMMU resource index on all SOC
by Naresh (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Naresh Solanki, Raul Rangel. Naresh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75710?usp=email ) Change subject: soc/amd/acpi/ivrs: Use specific IOMMU resource index on all SOC ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75710?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I10345e2337dcb709c2c1a8e57a1b7dd9c04adb9e Gerrit-Change-Number: 75710 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Naresh <naresh.solanki.2011(a)gmail.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 12 Jun 2023 17:28:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common: Introduce configs for TME exclusion range and new k...
by Pratikkumar V Prajapati (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Paul Menzel, Subrata Banik. Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75625?usp=email ) Change subject: soc/intel/common: Introduce configs for TME exclusion range and new key generation ...................................................................... Patch Set 3: (1 comment) Patchset: PS1: > > This is common code change, shouldn't we keep this patch separate from MTL specific patch? […] Sure. Updated commit msg. -- To view, visit https://review.coreboot.org/c/coreboot/+/75625?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5008fee07b97faadc7dd585f445295425173782 Gerrit-Change-Number: 75625 Gerrit-PatchSet: 3 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 12 Jun 2023 17:24:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/common: Introduce configs for TME exclusion range and new k...
by Pratikkumar V Prajapati (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Paul Menzel, Pratikkumar V Prajapati. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75625?usp=email to look at the new patch set (#3). Change subject: soc/intel/common: Introduce configs for TME exclusion range and new key generation ...................................................................... soc/intel/common: Introduce configs for TME exclusion range and new key generation Add following config options. 1. INTEL_TME_GEN_NEW_KEY_EACH_WARM_REBOOT Program Intel TME to generate a new key for each warm reboot. TME always generates a new key on each cold reboot. With this option enabled TME generates a new key even in warm reboot. Without this option TME reuses the key for warm reboot. 2. INTEL_TME_EXCLUDE_CBMEM Allows CBMEM to get excluded from being encrypted by Intel TME. When TME is enabled it encrypts whole DRAM. TME provides option to carve out a region of physical memory to get excluded from encryption. With this config enabled, CBMEM does not get encrypted by TME. If TME is not programmed to generate a new key in warm reboot, exclusion range does not need be programmed due to the fact that TME uses same key in warm reboot if INTEL_TME_GEN_NEW_KEY_EACH_WARM_REBOOT is not set. But if TME is programmed to generate a new key in warm reboot, contents of the CBMEM get encrypted with a new key in each warm reboot case and that leads to loss of CBMEM data from previous warm boot. So enabling this config allows CBMEM to get excluded from being encrypted and can be accessed in warm reboot case also. These configs are planned to be used by Intel Meteor Lake SOCs onwards. Bug=b:276120526 TEST=Able to build rex Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: Id5008fee07b97faadc7dd585f445295425173782 --- M src/soc/intel/common/block/cpu/Kconfig 1 file changed, 29 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/75625/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/75625?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5008fee07b97faadc7dd585f445295425173782 Gerrit-Change-Number: 75625 Gerrit-PatchSet: 3 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: soc/intel/meteorlake: Add support for crashlog
by Pratikkumar V Prajapati (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Eric Lai, Kane Chen, Kapil Porwal, Paul Menzel, Subrata Banik, Tarun Tuli. Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74769?usp=email ) Change subject: soc/intel/meteorlake: Add support for crashlog ...................................................................... Patch Set 23: (1 comment) File src/soc/intel/meteorlake/crashlog.c: https://review.coreboot.org/c/coreboot/+/74769/comment/c537a62a_9d823e37 : PS23, Line 14: static bool m_pmc_crashLog_support; > > Better create a struct for support,present,size ;) […] Yes, agree. After adding new SOC support and many other changes it's time to refactor this code. Let's get this code merged to enable MTL, then i will fix the code with more optimization with separate CLs. Marking this comment as resolved for now. -- To view, visit https://review.coreboot.org/c/coreboot/+/74769?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0abd697fba35edf1c03d2a3a325b7785b985cd5 Gerrit-Change-Number: 74769 Gerrit-PatchSet: 23 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Comment-Date: Mon, 12 Jun 2023 17:21:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/soc/intel/xeon_sp/ras/hest.c: fix HEST table length
by Paul Menzel (Code Review) 12 Jun '23

12 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, Jeff Li, Johnny Lin, Tim Chu. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69500?usp=email ) Change subject: src/soc/intel/xeon_sp/ras/hest.c: fix HEST table length ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69500/comment/32494a83_8ecf78c6 : PS7, Line 7: src/ Please remove. -- To view, visit https://review.coreboot.org/c/coreboot/+/69500?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4780785bac782aa966def3f042f365a1ead9d9d8 Gerrit-Change-Number: 69500 Gerrit-PatchSet: 7 Gerrit-Owner: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 12 Jun 2023 17:04:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit June 2023