coreboot-gerrit April 2023

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[M] Change in coreboot[master]: soc/amd/stoneyridge: factor out P-state utils to link in all stages
by Felix Held (Code Review) 01 Apr '23

01 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74145 ) Change subject: soc/amd/stoneyridge: factor out P-state utils to link in all stages ...................................................................... soc/amd/stoneyridge: factor out P-state utils to link in all stages tsc_freq.c gets built into all stages, but the tsc_freq_mhz function it implements calls the get_pstate_0_reg function which was only built into ramstage. Since tsc_freq_mhz was only called in ramstage, commit 2323acab6a7a ("soc/amd/stoneyridge: implement and use get_pstate_0_reg") didn't cause the build to fail, but better factor out the P-state- related utility functions into a separate compilation unit and include it in all stages that also include tsc_freq.c. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Id3a3ee218f495be5e60a888944487704e7e8a1a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74145 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/soc/amd/stoneyridge/Makefile.inc M src/soc/amd/stoneyridge/cpu.c A src/soc/amd/stoneyridge/pstate_util.c 3 files changed, 86 insertions(+), 54 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, but someone else must approve Martin Roth: Looks good to me, approved diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 1e8e794..65edea0 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -46,10 +46,12 @@ ramstage-y += psp.c all-y += monotonic_timer.c +all-y += pstate_util.c all-y += reset.c all-y += tsc_freq.c all-y += uart.c +smm-y += pstate_util.c smm-y += monotonic_timer.c smm-y += smihandler.c smm-y += tsc_freq.c diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index c5c2f68..3aedd0e 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -4,7 +4,6 @@ #include <amdblocks/iomap.h> #include <amdblocks/mca.h> #include <amdblocks/reset.h> -#include <amdblocks/smn.h> #include <cpu/amd/msr.h> #include <cpu/cpu.h> #include <cpu/x86/mp.h> @@ -15,7 +14,6 @@ #include <soc/pci_devs.h> #include <soc/cpu.h> #include <soc/iomap.h> -#include <soc/msr.h> #include <console/console.h> #include <types.h> @@ -72,55 +70,3 @@ .ops = &cpu_dev_ops, .id_table = cpu_table, }; - -uint32_t get_pstate_0_reg(void) -{ - return (pci_read_config32(SOC_PM_DEV, CORE_PERF_BOOST_CTRL) >> 2) & 0x7; -} - -static bool all_pstates_have_same_frequency_id(void) -{ - union pstate_msr pstate_reg; - size_t i; - bool first = true; - uint32_t frequency_id; - - for (i = 0; i < 7; i++) { - pstate_reg.raw = rdmsr(PSTATE_MSR(i)).raw; - - if (!pstate_reg.pstate_en) - continue; - - if (first) { - frequency_id = pstate_reg.cpu_fid_0_5; - first = false; - } else if (frequency_id != pstate_reg.cpu_fid_0_5) { - return false; - } - } - - return true; -} - -#define CLK_PLL_LOCK_TIMER 0xD82220B8 -#define CLK_GATER_SEQUENCE_REGISTER 0xD8222114 - -uint32_t get_pstate_latency(void) -{ - uint32_t latency = 0; - uint32_t smn_data; - uint32_t gaters_on_time, gaters_off_time; - - smn_data = smn_read32(CLK_GATER_SEQUENCE_REGISTER); - gaters_on_time = (smn_data & 0xff) * 10; - gaters_off_time = (smn_data >> 8 & 0xff) * 10; - latency += DIV_ROUND_UP(15 * gaters_on_time, 1000); - latency += DIV_ROUND_UP(15 * gaters_off_time, 1000); - - if (!all_pstates_have_same_frequency_id()) { - smn_data = smn_read32(CLK_PLL_LOCK_TIMER); - latency += DIV_ROUND_UP(smn_data & 0x1fff, 100); - } - - return latency; -} diff --git a/src/soc/amd/stoneyridge/pstate_util.c b/src/soc/amd/stoneyridge/pstate_util.c new file mode 100644 index 0000000..097a913 --- /dev/null +++ b/src/soc/amd/stoneyridge/pstate_util.c @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/cpu.h> +#include <amdblocks/smn.h> +#include <cpu/amd/msr.h> +#include <cpu/x86/msr.h> +#include <device/pci_ops.h> +#include <soc/msr.h> +#include <soc/pci_devs.h> +#include <types.h> + +uint32_t get_pstate_0_reg(void) +{ + return (pci_read_config32(SOC_PM_DEV, CORE_PERF_BOOST_CTRL) >> 2) & 0x7; +} + +static bool all_pstates_have_same_frequency_id(void) +{ + union pstate_msr pstate_reg; + size_t i; + bool first = true; + uint32_t frequency_id; + + for (i = 0; i < 7; i++) { + pstate_reg.raw = rdmsr(PSTATE_MSR(i)).raw; + + if (!pstate_reg.pstate_en) + continue; + + if (first) { + frequency_id = pstate_reg.cpu_fid_0_5; + first = false; + } else if (frequency_id != pstate_reg.cpu_fid_0_5) { + return false; + } + } + + return true; +} + +#define CLK_PLL_LOCK_TIMER 0xD82220B8 +#define CLK_GATER_SEQUENCE_REGISTER 0xD8222114 + +uint32_t get_pstate_latency(void) +{ + uint32_t latency = 0; + uint32_t smn_data; + uint32_t gaters_on_time, gaters_off_time; + + smn_data = smn_read32(CLK_GATER_SEQUENCE_REGISTER); + gaters_on_time = (smn_data & 0xff) * 10; + gaters_off_time = (smn_data >> 8 & 0xff) * 10; + latency += DIV_ROUND_UP(15 * gaters_on_time, 1000); + latency += DIV_ROUND_UP(15 * gaters_off_time, 1000); + + if (!all_pstates_have_same_frequency_id()) { + smn_data = smn_read32(CLK_PLL_LOCK_TIMER); + latency += DIV_ROUND_UP(smn_data & 0x1fff, 100); + } + + return latency; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/74145 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id3a3ee218f495be5e60a888944487704e7e8a1a1 Gerrit-Change-Number: 74145 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/amd/stoneyridge/Makefile: use all target for more compilation units
by Felix Held (Code Review) 01 Apr '23

01 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74144 ) Change subject: soc/amd/stoneyridge/Makefile: use all target for more compilation units ...................................................................... soc/amd/stoneyridge/Makefile: use all target for more compilation units monotonic_timer.c, tsc_freq.c and uart.c get added to all stage targets, so just add those to the all stage targets. They still need to be added to the smm stage target, since the all target doesn't add things to the smm stage. TEST=Timeless build results in identical image for Gardenia. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I16c02bc0ff54553f212b94d110abef6a7bdedbb4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74144 Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/amd/stoneyridge/Makefile.inc 1 file changed, 23 insertions(+), 15 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 656fa2e..1e8e794 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -5,15 +5,12 @@ subdirs-y += ../../../cpu/amd/mtrr/ bootblock-y += aoac.c -bootblock-y += uart.c bootblock-y += BiosCallOuts.c bootblock-y += bootblock.c bootblock-y += early_fch.c bootblock-y += gpio.c bootblock-y += i2c.c bootblock-y += enable_usbdebug.c -bootblock-y += monotonic_timer.c -bootblock-y += tsc_freq.c romstage-y += BiosCallOuts.c romstage-y += i2c.c @@ -21,24 +18,15 @@ romstage-y += enable_usbdebug.c romstage-y += fch_agesa.c romstage-y += gpio.c -romstage-y += monotonic_timer.c romstage-y += smbus_spd.c romstage-y += memmap.c -romstage-y += uart.c -romstage-y += tsc_freq.c romstage-y += psp.c verstage-y += gpio.c verstage-y += i2c.c -verstage-y += monotonic_timer.c -verstage-y += uart.c -verstage-y += tsc_freq.c -postcar-y += monotonic_timer.c -postcar-y += uart.c postcar-y += memmap.c postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c -postcar-y += tsc_freq.c ramstage-y += BiosCallOuts.c ramstage-y += i2c.c @@ -51,16 +39,16 @@ ramstage-y += fch_agesa.c ramstage-y += gpio.c ramstage-y += graphics.c -ramstage-y += monotonic_timer.c ramstage-y += northbridge.c ramstage-y += sata.c ramstage-y += memmap.c -ramstage-y += uart.c ramstage-y += usb.c -ramstage-y += tsc_freq.c ramstage-y += psp.c +all-y += monotonic_timer.c all-y += reset.c +all-y += tsc_freq.c +all-y += uart.c smm-y += monotonic_timer.c smm-y += smihandler.c -- To view, visit https://review.coreboot.org/c/coreboot/+/74144 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16c02bc0ff54553f212b94d110abef6a7bdedbb4 Gerrit-Change-Number: 74144 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: Makefile.inc: introduce all_x86 target
by Felix Held (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Martin L Roth, Kyösti Mälkki. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74150 ) Change subject: Makefile.inc: introduce all_x86 target ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > https://review.coreboot.org/c/coreboot/+/42062/9/src/cpu/x86/lapic/Makefile… […] CB:74152 uses this in src/cpu where the verstage_x86 target and the other stage targets were used. the scope where thta's used can and probably should be expanded, but it was already later yesterday when i wrote the patches and i mainly wanted to push a proof of concept before the weekend. not sure how to treat makefile targets differently depending on where in the tree they are; unusual makefile things aren't exactly what i'm very familiar with -- To view, visit https://review.coreboot.org/c/coreboot/+/74150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d0184182b931185990094d0874b49c0b5cb9f7e Gerrit-Change-Number: 74150 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Apr 2023 15:05:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/*/Makefile: use all_x86 target
by Felix Held (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74151 ) Change subject: soc/amd/*/Makefile: use all_x86 target ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: looks like i missed something here. will look into this again next week -- To view, visit https://review.coreboot.org/c/coreboot/+/74151 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94de6de5a4c7723065a4eb1b7149f9933ef134a1 Gerrit-Change-Number: 74151 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Apr 2023 14:56:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/crossgcc/buildgcc: Allow building CMake with multiple threads
by Felix Singer (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Nico Huber, Martin L Roth, Michael Niewöhner, Elyes Haouas. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74156 ) Change subject: util/crossgcc/buildgcc: Allow building CMake with multiple threads ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74156/comment/d5963a92_12ba7fe6 PS1, Line 7: Allow building CMake with multiple threads > Not sure, what you mean. make -j is already there (line 899), handled by $JOBS. […] Lol. I guess I can not read today. Maybe I should get off my computer before I hurt anyone :P Thanks :) Will adjust the commit message later. -- To view, visit https://review.coreboot.org/c/coreboot/+/74156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89d6728a0985946b702f83770bedf767afb12690 Gerrit-Change-Number: 74156 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Apr 2023 14:10:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/crossgcc/buildgcc: Allow building CMake with multiple threads
by Michael Niewöhner (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Felix Singer, Nico Huber, Martin L Roth, Elyes Haouas. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74156 ) Change subject: util/crossgcc/buildgcc: Allow building CMake with multiple threads ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74156/comment/4b1edd39_5a93c4fa PS1, Line 7: Allow building CMake with multiple threads > Looked again, you are right :) Not sure what made me thinking that. […] Not sure, what you mean. make -j is already there (line 899), handled by $JOBS. The commit message just isn't 100% right, since the change only influences the bootstrap part 😊 Maybe something like that: ``` util/crossgcc/buildgcc: Allow bootstrapping CMake with multiple threads The main build process already runs multi-threaded, when requested. Apply the same setting to the bootstrap / configure step. ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/74156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89d6728a0985946b702f83770bedf767afb12690 Gerrit-Change-Number: 74156 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Apr 2023 13:45:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/crossgcc/buildgcc: Allow building CMake with multiple threads
by Felix Singer (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Nico Huber, Martin L Roth, Michael Niewöhner, Elyes Haouas. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74156 ) Change subject: util/crossgcc/buildgcc: Allow building CMake with multiple threads ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74156/comment/5b87d668_7d5eac77 PS1, Line 7: Allow building CMake with multiple threads > > I have tested this before uploading the patch. […] Looked again, you are right :) Not sure what made me thinking that. Though, I think since we are bootstrapping CMake we should configure that as well. Should I create a separate commit or can I do this in one commit for `make -j`? -- To view, visit https://review.coreboot.org/c/coreboot/+/74156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89d6728a0985946b702f83770bedf767afb12690 Gerrit-Change-Number: 74156 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Apr 2023 13:37:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: tree: Replace `egrep` with `grep -E`
by Felix Singer (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Martin L Roth, Michael Niewöhner, Elyes Haouas. Hello build bot (Jenkins), Martin L Roth, Michael Niewöhner, Elyes Haouas, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74171 to look at the new patch set (#3). Change subject: tree: Replace `egrep` with `grep -E` ...................................................................... tree: Replace `egrep` with `grep -E` For compatibility reasons, egrep is just a wrapper around grep today. Thus, replace it with `grep -E`. Change-Id: Ief08a22e4cd7211a3fee278492c95d37f9e058fa Signed-off-by: Felix Singer <felix.singer(a)secunet.com> --- M payloads/libpayload/curses/PDCurses/aclocal.m4 M util/lint/lint-000-license-headers M util/lint/lint-001-no-global-config-in-romstage M util/lint/lint-stable-009-old-licenses M util/scripts/cross-repo-cherrypick 5 files changed, 18 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/74171/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/74171 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief08a22e4cd7211a3fee278492c95d37f9e058fa Gerrit-Change-Number: 74171 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: util/crossgcc/buildgcc: Allow building CMake with multiple threads
by Michael Niewöhner (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Felix Singer, Nico Huber, Martin L Roth, Elyes Haouas. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74156 ) Change subject: util/crossgcc/buildgcc: Allow building CMake with multiple threads ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74156/comment/a3e650f9_ac04faf2 PS1, Line 7: Allow building CMake with multiple threads > I have tested this before uploading the patch. --parallel also seems to configure the threads which are used during the compilation. With --parallel=1 only one thread was used, while --parallel=32 made it using 32 threads. > > If there is a configure flag for it, I rather want to use that instead of make -j . Though, I have to say I didn't check what the flag does :) Well, I have tested it as well and my results strongly disagree ;) The help text disagrees as well: `--parallel=n bootstrap cmake in parallel, where n is ` `--parallel` sets `cmake_parallel_make` which is only used during bootstrap (configure), not during the actual build, where `-j` is the right thing. -- To view, visit https://review.coreboot.org/c/coreboot/+/74156 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89d6728a0985946b702f83770bedf767afb12690 Gerrit-Change-Number: 74156 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Sat, 01 Apr 2023 13:25:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: arch/x86/smbios: Avoid buffer overflows
by Utkarsh Verma (Code Review) 01 Apr '23

01 Apr '23

Attention is currently required from: Paul Menzel. Utkarsh Verma has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74128 ) Change subject: arch/x86/smbios: Avoid buffer overflows ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74128/comment/a95a41f5_cbc27c13 PS3, Line 9: The format specifiers for numbers in snprintf() calls are updated to be > Possible unwrapped commit description (prefer a maximum 72 chars per line) Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/74128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibbf93fd113791b6faa1e5128da8e692f7f00ac73 Gerrit-Change-Number: 74128 Gerrit-PatchSet: 3 Gerrit-Owner: Utkarsh Verma <utkarsh(a)bitbanged.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Sat, 01 Apr 2023 12:48:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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