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Change subject: 3rdparty/fsp: Update pointer from 6f2f17f3d339 to cf40b9ec6c7b
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74242/comment/a2118ad8_0c10b6d5
PS1, Line 8:
> Please add a summary.
we have a tool to update submodules.
just run "./util/scripts/update_submodules -R 3rdparty/fsp"
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Change subject: payloads/edk2: Set max variable size to 0x8000 for SMMSTORE
......................................................................
Patch Set 3:
(1 comment)
File payloads/external/edk2/Makefile:
https://review.coreboot.org/c/coreboot/+/74176/comment/c512243c_a5f4ff62
PS3, Line 65: 8000
> just wondering. […]
From memory, no. I've confirmed this with the build report too. Good catch
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Hello Felix Singer, build bot (Jenkins), Jason Glenesk, Martin L Roth, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72621
to look at the new patch set (#7).
Change subject: Documentation/releases/coreboot-4.20: Add toolchain updates section
......................................................................
Documentation/releases/coreboot-4.20: Add toolchain updates section
Change-Id: I5fff8b97f6b85165a71aa2a86417f27986fd25fe
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M Documentation/releases/coreboot-4.20-relnotes.md
1 file changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/72621/7
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Change subject: sb/intel/i82371eb/chip.h: Use 'bool' instead of 'int'
......................................................................
Patch Set 7:
(2 comments)
File src/southbridge/intel/i82371eb/chip.h:
https://review.coreboot.org/c/coreboot/+/73794/comment/a9ab103e_f3c04ac8
PS7, Line 19: int gpo22:1;
: int gpo23:1;
They should be unsigned.
As they are not used, let keep them as they are ...
File src/southbridge/intel/i82371eb/chip.h:
https://review.coreboot.org/c/coreboot/+/73794/comment/3182c4ef_1dd92d71
PS3, Line 9: unsigned int ide0_enable:1;
: unsigned int ide0_drive0_udma33_enable:1;
: unsigned int ide0_drive1_udma33_enable:1;
: unsigned int ide1_enable:1;
: unsigned int ide1_drive0_udma33_enable:1;
: unsigned int ide1_drive1_udma33_enable:1;
: unsigned int ide_legacy_enable:1;
: unsigned int usb_enable:1;
: unsigned int gpo22_enable:1; /* GPO22/GPO23 (1) vs. XDIR#/XOE# (0) */
: unsigned int gpo22:1;
: unsigned int gpo23:1;
> I prefer changing multiple files and using bool instead.
Done
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Change subject: crossgcc: Upgrade IASL from 20221020 to 20230331
......................................................................
Patch Set 2:
(1 comment)
File util/crossgcc/buildgcc:
https://review.coreboot.org/c/coreboot/+/74272/comment/d2e5da59_9471380f
PS2, Line 42: R10_20_22
This is just a tag and not a release version
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Change subject: crossgcc: Upgrade IASL from 20221020 to 20230331
......................................................................
Patch Set 2:
(2 comments)
Patchset:
PS2:
> Let's wait with this until the release is done, so that we don't get any surprises.
Done
File util/crossgcc/buildgcc:
https://review.coreboot.org/c/coreboot/+/74272/comment/536e3e65_ce6f7b15
PS2, Line 74: IASL_BASE_URL="https://acpica.org/sites/acpica/files"
> I would like to keep using GitHub. acpica.org turned out as pretty unreliable in the past.
github tag was only a workaround
This point was/is discussed here: https://github.com/acpica/acpica/issues/810
I clearly prefer acpica.org where hosted the tarballs.
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Change subject: mb/google/myst: Enable chromeOS EC
......................................................................
Patch Set 17:
(2 comments)
File src/mainboard/google/myst/variants/baseboard/include/baseboard/ec.h:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173573):
https://review.coreboot.org/c/coreboot/+/74099/comment/aa5b5917_ccc04a97
PS17, Line 71: #define SIO_EC_PS2K_IRQ Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {1}
space prohibited between function name and open parenthesis '('
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173573):
https://review.coreboot.org/c/coreboot/+/74099/comment/dc1e3af6_543ec61a
PS17, Line 71: #define SIO_EC_PS2K_IRQ Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {1}
Macros with complex values should be enclosed in parentheses
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Change subject: mb/google/myst: Add new mainboard
......................................................................
Patch Set 11:
(1 comment)
File src/mainboard/google/myst/port_descriptors.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-173567):
https://review.coreboot.org/c/coreboot/+/74093/comment/b2d389ae_fedaf446
PS11, Line 7: const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
need consistent spacing around '*' (ctx:WxO)
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