coreboot-gerrit April 2023

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[S] Change in coreboot[master]: soc/intel/meteorlake: Hook UPD CnviWifiCore
by Kapil Porwal (Code Review) 12 Apr '23

12 Apr '23

Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74306 ) Change subject: soc/intel/meteorlake: Hook UPD CnviWifiCore ...................................................................... soc/intel/meteorlake: Hook UPD CnviWifiCore Hook the newly created/exposed CnviWifiCore UPD using chip driver. Enable this option by default to maintain the existing behavior. BUG=b:270985197 TEST=Verified by enabling/disabling the UPD on google/rex Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> Change-Id: I5b4662c2a064f7c9074797c8a2541dcf1dd686fe --- M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/chipset.cb M src/soc/intel/meteorlake/fsp_params.c 3 files changed, 24 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/74306/1 diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 9d9a600..2ded40e 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -242,6 +242,9 @@ */ uint8_t serial_io_gspi_cs_state[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]; + /* CNVi WiFi Core Enable/Disable */ + bool cnvi_wifi_core; + /* CNVi BT Core Enable/Disable */ bool cnvi_bt_core; diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb index 0962a7c..7752b63 100644 --- a/src/soc/intel/meteorlake/chipset.cb +++ b/src/soc/intel/meteorlake/chipset.cb @@ -18,6 +18,10 @@ # putting it under register "common_soc_config" in overridetree.cb file. register "common_soc_config.pch_thermal_trip" = "130" + + # Enable CNVi WiFi + register "cnvi_wifi_core" = "true" + device domain 0 on device pci 00.0 alias system_agent on end device pci 01.0 alias pcie_rp12 off end diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index d345f1b..6be7887 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -562,6 +562,7 @@ { /* CNVi */ s_cfg->CnviMode = is_devfn_enabled(PCI_DEVFN_CNVI_WIFI); + s_cfg->CnviWifiCore = config->cnvi_wifi_core; s_cfg->CnviBtCore = config->cnvi_bt_core; s_cfg->CnviBtAudioOffload = config->cnvi_bt_audio_offload; /* Assert if CNVi BT is enabled without CNVi being enabled. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/74306 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b4662c2a064f7c9074797c8a2541dcf1dd686fe Gerrit-Change-Number: 74306 Gerrit-PatchSet: 1 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: [DEBUG ONLY for weekly check] Add scripts and snapshot.txt to facilit...
by Johnny Lin (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Arthur Heymans, Patrick Rudolph, Jonathan Zhang, Simon Chou, Jingle Hsu, Nill Ge, TangYiwei, Anjaneya "Reddy" Chagam, David Hendricks, Naresh, Shuo Liu, Shuming Chu (Shuming), Srinidhi N Kaushik, Juan Sanchez, Shelly Chang. Hello Arthur Heymans, build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Simon Chou, Jingle Hsu, Nill Ge, TangYiwei, Anjaneya "Reddy" Chagam, David Hendricks, Naresh, Shuo Liu, Shuming Chu (Shuming), Srinidhi N Kaushik, Juan Sanchez, Shelly Chang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73622 to look at the new patch set (#11). Change subject: [DEBUG ONLY for weekly check] Add scripts and snapshot.txt to facilitate SPR build ...................................................................... [DEBUG ONLY for weekly check] Add scripts and snapshot.txt to facilitate SPR build * Test date: Wed Apr 12 02:27:10 UTC 2023 * Based on upstream tip: 134566395f mb/google/myst: Add smihandler * Tested on SPR platforms: AC CRB and OCP Crater Lake, tested on CPX platform OCP Delta Lake to check there's no regression. The CB numbers in pick-upstream-spr-list.sh are changes under review, list1 are the changes that are defconfig for ArcherCity, list2 are the changes for 2S enabling changes. restore-from-snapshot.sh will restore a coreboot repo to a certain status according to snapshot.txt, usage: 1. git checkout the corresponding upstream tip, for this snapshot.txt it is 3b5d9ee516 drivers/spi/spi_flash.c: Prefer 'if' over '#if" 2. Run ./restore-from-snapshot.sh ./snapshot.txt pick-upstream-spr-list.sh will cherry-pick the latest open changes from public coreboot repo for SPR build, and generate a snapshot.txt. Please make sure you have the correct Intel binaries for your AC CRB and place them to the right location according to configs/builder/config.intel.crb.ac: CONFIG_FSP_T_FILE="site-local/archercity/Server_T.fd" CONFIG_FSP_M_FILE="site-local/archercity/Server_M.fd" CONFIG_FSP_S_FILE="site-local/archercity/Server_S.fd" CONFIG_IFD_BIN_PATH="site-local/archercity/descriptor.bin" CONFIG_ME_BIN_PATH="site-local/archercity/me.bin" CONFIG_CPU_UCODE_BINARIES="site-local/archercity/mbf806f8.mcb" The current merged FSP header files and Hob structures in CB:71948 is based on 2022 WW43 git tag EGLSTRM.0.RPB.0090.D.03, you need to make sure your FSP is compatible with it otherwise you need to adjust the FSP headers and Hob structures accordingly. Below is LinuxBoot payload, you need to build it by yourself CONFIG_PAYLOAD_FILE="site-local/archercity/linuxboot_bzImage" The x86_64 qemu example can build a working LinuxBoot payload: git clone https://github.com/linuxboot/osf-builder cd examples/qemu; make kernel Change-Id: Id61afff221f33c8b16c2d3b6323e8c8cd5895e52 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- A pick-upstream-spr-list.sh A restore-from-snapshot.sh A snapshot.txt 3 files changed, 230 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/73622/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/73622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id61afff221f33c8b16c2d3b6323e8c8cd5895e52 Gerrit-Change-Number: 73622 Gerrit-PatchSet: 11 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Juan Sanchez Gerrit-Reviewer: Naresh <naresh.solanki.2011(a)gmail.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-Reviewer: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Simon Chou <simonchou(a)supermicro.com.tw> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Naresh <naresh.solanki.2011(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Attention: Juan Sanchez Gerrit-Attention: Shelly Chang <Shelly_Chang(a)wiwynn.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/common: Update cpu_apic_info_type struct
by Sridhar Siricilla (Code Review) 12 Apr '23

12 Apr '23

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74305 ) Change subject: soc/intel/common: Update cpu_apic_info_type struct ...................................................................... soc/intel/common: Update cpu_apic_info_type struct The patch updates total cpu count variable and total P-core count in cpu_apic_info_type structure to `unsigned short int` to address more cores. TEST=Verify the build on Rex Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I46239cc7ad9870e7134955af56b9f6625be2b002 --- M src/soc/intel/common/block/acpi/cpu_hybrid.c 1 file changed, 18 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/74305/1 diff --git a/src/soc/intel/common/block/acpi/cpu_hybrid.c b/src/soc/intel/common/block/acpi/cpu_hybrid.c index e18c288..6e8b641 100644 --- a/src/soc/intel/common/block/acpi/cpu_hybrid.c +++ b/src/soc/intel/common/block/acpi/cpu_hybrid.c @@ -28,14 +28,14 @@ int32_t apic_ids[CONFIG_MAX_CPUS]; /* Total CPU count */ - uint8_t total_cpu_cnt; + uint16_t total_cpu_cnt; /* * Total Performance core count. This will be used * to identify the start of Efficient Cores's * APIC ID list */ - uint8_t perf_cpu_cnt; + uint16_t perf_cpu_cnt; }; static struct cpu_apic_info_type cpu_apic_info; -- To view, visit https://review.coreboot.org/c/coreboot/+/74305 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I46239cc7ad9870e7134955af56b9f6625be2b002 Gerrit-Change-Number: 74305 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: soc/amd: Use ACPI_COMMON_MADT_IOAPIC
by Kyösti Mälkki (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held. Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74354 ) Change subject: soc/amd: Use ACPI_COMMON_MADT_IOAPIC ...................................................................... soc/amd: Use ACPI_COMMON_MADT_IOAPIC Change IRQ #0 to GSI #2 override to positive edge trigger from the bus ISA default (positive edge). Change-Id: I2de941071fca6f7208646a065a271fbf47ac2696 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/amd/cezanne/acpi.c M src/soc/amd/common/block/acpi/Kconfig M src/soc/amd/glinda/acpi.c M src/soc/amd/mendocino/acpi.c M src/soc/amd/phoenix/acpi.c M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c 7 files changed, 15 insertions(+), 61 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/74354/1 diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 6bcc605..9073d8a 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -21,19 +21,10 @@ unsigned long acpi_fill_madt(unsigned long current) { - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, GNB_IO_APIC_ADDR); - /* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, 0, 2, - MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT); - /* SCI IRQ type override */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ, - MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW); current = acpi_fill_madt_irqoverride(current); return current; diff --git a/src/soc/amd/common/block/acpi/Kconfig b/src/soc/amd/common/block/acpi/Kconfig index 289efbc..9355f7d 100644 --- a/src/soc/amd/common/block/acpi/Kconfig +++ b/src/soc/amd/common/block/acpi/Kconfig @@ -2,7 +2,9 @@ bool depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO select ACPI_AMD_HARDWARE_SLEEP_VALUES + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC + select ACPI_CUSTOM_MADT help Select this option to use the AcpiMmio ACPI registers. diff --git a/src/soc/amd/glinda/acpi.c b/src/soc/amd/glinda/acpi.c index 6cf5536..31f1c6e 100644 --- a/src/soc/amd/glinda/acpi.c +++ b/src/soc/amd/glinda/acpi.c @@ -24,19 +24,9 @@ unsigned long acpi_fill_madt(unsigned long current) { - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, GNB_IO_APIC_ADDR); - /* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, 0, 2, - MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT); - /* SCI IRQ type override */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ, - MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW); current = acpi_fill_madt_irqoverride(current); return current; diff --git a/src/soc/amd/mendocino/acpi.c b/src/soc/amd/mendocino/acpi.c index f459388..9370041 100644 --- a/src/soc/amd/mendocino/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -23,19 +23,9 @@ unsigned long acpi_fill_madt(unsigned long current) { - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, GNB_IO_APIC_ADDR); - /* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, 0, 2, - MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT); - /* SCI IRQ type override */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ, - MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW); current = acpi_fill_madt_irqoverride(current); return current; diff --git a/src/soc/amd/phoenix/acpi.c b/src/soc/amd/phoenix/acpi.c index 9ebe353..57e783b 100644 --- a/src/soc/amd/phoenix/acpi.c +++ b/src/soc/amd/phoenix/acpi.c @@ -24,19 +24,9 @@ unsigned long acpi_fill_madt(unsigned long current) { - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, GNB_IO_APIC_ADDR); - /* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, 0, 2, - MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT); - /* SCI IRQ type override */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ, - MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW); current = acpi_fill_madt_irqoverride(current); return current; diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 33defac..b97b2c2 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -28,20 +28,9 @@ unsigned long acpi_fill_madt(unsigned long current) { - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, GNB_IO_APIC_ADDR); - /* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, 0, 2, - MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT); - /* SCI IRQ type override */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ, - MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW); - current = acpi_fill_madt_irqoverride(current); return current; diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index 97d2dce..eefafc4 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -27,19 +27,8 @@ unsigned long acpi_fill_madt(unsigned long current) { /* Write Kern IOAPIC, only one */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC2_ADDR); - /* PIT is connected to legacy IRQ 0, but IOAPIC GSI 2 */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, 0, 2, - MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT); - /* SCI IRQ type override */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, - MP_BUS_ISA, ACPI_SCI_IRQ, ACPI_SCI_IRQ, - MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW); - return current; } -- To view, visit https://review.coreboot.org/c/coreboot/+/74354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2de941071fca6f7208646a065a271fbf47ac2696 Gerrit-Change-Number: 74354 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: emulation/qemu-i440fx: Use ACPI_COMMON_MADT_IOAPIC
by Kyösti Mälkki (Code Review) 12 Apr '23

12 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74353 ) Change subject: emulation/qemu-i440fx: Use ACPI_COMMON_MADT_IOAPIC ...................................................................... emulation/qemu-i440fx: Use ACPI_COMMON_MADT_IOAPIC For uni-processor platforms, SMP=n implies IOAPIC=n, and the IOAPIC MADT entries are now removed from MADT. Change-Id: I8777f4e3b37fe7b564189c6bf48e3988026b2361 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/mainboard/emulation/qemu-i440fx/acpi_tables.c M src/southbridge/intel/i82371eb/Kconfig 2 files changed, 15 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/74353/1 diff --git a/src/mainboard/emulation/qemu-i440fx/acpi_tables.c b/src/mainboard/emulation/qemu-i440fx/acpi_tables.c deleted file mode 100644 index 593cbc7..0000000 --- a/src/mainboard/emulation/qemu-i440fx/acpi_tables.c +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi.h> -#include <arch/ioapic.h> -#include <arch/smp/mpspec.h> -#include <device/device.h> - -#include "fw_cfg.h" -#include "acpi.h" - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0); - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH); - - return current; -} diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig index 08ffb00..777e8f1 100644 --- a/src/southbridge/intel/i82371eb/Kconfig +++ b/src/southbridge/intel/i82371eb/Kconfig @@ -1,5 +1,7 @@ config SOUTHBRIDGE_INTEL_I82371EB + select ACPI_COMMON_MADT_IOAPIC if IOAPIC select ACPI_COMMON_MADT_LAPIC + select ACPI_NO_CUSTOM_MADT select ACPI_INTEL_HARDWARE_SLEEP_VALUES select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RTC -- To view, visit https://review.coreboot.org/c/coreboot/+/74353 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8777f4e3b37fe7b564189c6bf48e3988026b2361 Gerrit-Change-Number: 74353 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: aopen/dxplplusu: Use ACPI_COMMON_MADT_IOAPIC
by Kyösti Mälkki (Code Review) 12 Apr '23

12 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74352 ) Change subject: aopen/dxplplusu: Use ACPI_COMMON_MADT_IOAPIC ...................................................................... aopen/dxplplusu: Use ACPI_COMMON_MADT_IOAPIC IRQ override from IRQ #0 to GSI #2 is changed from MP_BUS_EISA to MP_BUS_ISA. Change-Id: I115df037fd79e120b04e6aff9e53f963f045b997 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/aopen/dxplplusu/Kconfig M src/mainboard/aopen/dxplplusu/acpi_tables.c M src/southbridge/intel/i82801dx/Kconfig 3 files changed, 15 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/74352/1 diff --git a/src/mainboard/aopen/dxplplusu/Kconfig b/src/mainboard/aopen/dxplplusu/Kconfig index 5c0ca2b..7d374f4 100644 --- a/src/mainboard/aopen/dxplplusu/Kconfig +++ b/src/mainboard/aopen/dxplplusu/Kconfig @@ -2,6 +2,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y + select ACPI_CUSTOM_MADT select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7505 select SOUTHBRIDGE_INTEL_I82870 diff --git a/src/mainboard/aopen/dxplplusu/acpi_tables.c b/src/mainboard/aopen/dxplplusu/acpi_tables.c index ba9d3c8..e22b454 100644 --- a/src/mainboard/aopen/dxplplusu/acpi_tables.c +++ b/src/mainboard/aopen/dxplplusu/acpi_tables.c @@ -8,9 +8,6 @@ struct device *bdev, *dev = NULL; struct resource *res = NULL; - /* Southbridge IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, 0xfec00000); - bdev = pcidev_on_root(2, 0); /* P64H2 Bus B IOAPIC */ if (bdev) @@ -28,11 +25,5 @@ current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, res->base); } - /* Map ISA IRQ 0 to IRQ 2 */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 1, 0, 2, 0); - - /* IRQ9 differs from ISA standard - ours is active high, level-triggered */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)current, 0, 9, 9, 0xD); - return current; } diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index 2be911d..8393f38 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -2,6 +2,7 @@ config SOUTHBRIDGE_INTEL_I82801DX bool + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select HAVE_SMI_HANDLER -- To view, visit https://review.coreboot.org/c/coreboot/+/74352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I115df037fd79e120b04e6aff9e53f963f045b997 Gerrit-Change-Number: 74352 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/baytrail,braswell: Use COMMON_MADT_IOAPIC
by Kyösti Mälkki (Code Review) 12 Apr '23

12 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74351 ) Change subject: soc/intel/baytrail,braswell: Use COMMON_MADT_IOAPIC ...................................................................... soc/intel/baytrail,braswell: Use COMMON_MADT_IOAPIC Change IRQ #0 to GSI #2 override to positive edge trigger from the bus ISA default (positive edge). Change-Id: I3a61a0ceb0e6e4a09570beef6d0170354eb498ac Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/acpi.c M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/acpi.c 4 files changed, 15 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/74351/1 diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 0f908b6..958af34 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -7,6 +7,7 @@ config CPU_SPECIFIC_OPTIONS def_bool y + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ARCH_X86 diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 6433e2c..e2cb12b 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -283,15 +283,3 @@ /* Add a method to notify processor nodes */ acpigen_write_processor_cnot(pattrs->num_cpus); } - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0); - current += acpi_create_madt_sci_override((void *)current); - - return current; -} diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 8d540f3..f618118 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -7,6 +7,7 @@ config CPU_SPECIFIC_OPTIONS def_bool y + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ARCH_X86 diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 59aaca3..afd7e9d 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -314,18 +314,6 @@ acpigen_write_processor_cnot(pattrs->num_cpus); } -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0); - current += acpi_create_madt_sci_override((void *)current); - - return current; -} - unsigned long southcluster_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp) { -- To view, visit https://review.coreboot.org/c/coreboot/+/74351 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a61a0ceb0e6e4a09570beef6d0170354eb498ac Gerrit-Change-Number: 74351 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: intel/bd82x6x,broadwell,lynxpoint: Use ACPI_COMMON_MADT_IOAPIC
by Kyösti Mälkki (Code Review) 12 Apr '23

12 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74350 ) Change subject: intel/bd82x6x,broadwell,lynxpoint: Use ACPI_COMMON_MADT_IOAPIC ...................................................................... intel/bd82x6x,broadwell,lynxpoint: Use ACPI_COMMON_MADT_IOAPIC Change IRQ #0 to GSI #2 override to positive edge trigger from the bus ISA default (positive edge). Change-Id: Iab3d38da9610ede1d338440b4a8ec0f1537c17e6 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/broadwell/pch/Kconfig M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/common/Kconfig.common M src/southbridge/intel/common/Makefile.inc D src/southbridge/intel/common/madt.c M src/southbridge/intel/lynxpoint/Kconfig 6 files changed, 16 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/74350/1 diff --git a/src/soc/intel/broadwell/pch/Kconfig b/src/soc/intel/broadwell/pch/Kconfig index 63f0439..bd1bea5 100644 --- a/src/soc/intel/broadwell/pch/Kconfig +++ b/src/soc/intel/broadwell/pch/Kconfig @@ -4,6 +4,7 @@ config PCH_SPECIFIC_OPTIONS def_bool y + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_SOC_NVS @@ -17,7 +18,6 @@ select INTEL_DESCRIPTOR_MODE_CAPABLE select INTEL_LYNXPOINT_LP select RTC - select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RTC diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index a0d8605..5ba913d 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -10,6 +10,7 @@ config SOUTH_BRIDGE_OPTIONS def_bool y + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_SOC_NVS @@ -34,7 +35,6 @@ select RTC select HAVE_INTEL_CHIPSET_LOCKDOWN select SOUTHBRIDGE_INTEL_COMMON_SMM - select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG select TCO_SPACE_NOT_YET_SPLIT diff --git a/src/southbridge/intel/common/Kconfig.common b/src/southbridge/intel/common/Kconfig.common index 0caf964..2da6971 100644 --- a/src/southbridge/intel/common/Kconfig.common +++ b/src/southbridge/intel/common/Kconfig.common @@ -61,9 +61,6 @@ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select SOUTHBRIDGE_INTEL_COMMON_PMBASE -config SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT - bool - config SOUTHBRIDGE_INTEL_COMMON_FINALIZE bool diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index fe61af1..2f4c777 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -50,8 +50,6 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smi.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM) += pmutil.c smihandler.c -ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT) += madt.c - smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c diff --git a/src/southbridge/intel/common/madt.c b/src/southbridge/intel/common/madt.c deleted file mode 100644 index 2482391..0000000 --- a/src/southbridge/intel/common/madt.c +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi.h> -#include <arch/ioapic.h> -#include <arch/smp/mpspec.h> - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, 0); - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH); - - return current; -} diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 9cea74b..af346ab 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -7,6 +7,7 @@ config SOUTH_BRIDGE_OPTIONS def_bool y + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_SOC_NVS @@ -14,7 +15,6 @@ select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 - select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_PMCLIB select SOUTHBRIDGE_INTEL_COMMON_PMBASE -- To view, visit https://review.coreboot.org/c/coreboot/+/74350 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab3d38da9610ede1d338440b4a8ec0f1537c17e6 Gerrit-Change-Number: 74350 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: sb/intel: Use ACPI_COMMON_MADT_IOAPIC
by Kyösti Mälkki (Code Review) 12 Apr '23

12 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74349 ) Change subject: sb/intel: Use ACPI_COMMON_MADT_IOAPIC ...................................................................... sb/intel: Use ACPI_COMMON_MADT_IOAPIC i82801gx, i82801ix, i82801jx: Maintain IRQ #0 to GSI #2 override as positive edge trigger. ibexpeak, emulation/qemu-q35: Change IRQ #0 to GSI #2 override to positive edge trigger from the bus ISA default (positive edge). Change-Id: Ia8a04daf3a79d9f2f4801dc85e4975278e30dc8a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/emulation/qemu-q35/Kconfig M src/southbridge/intel/i82801gx/Kconfig M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/Kconfig M src/southbridge/intel/i82801ix/Makefile.inc D src/southbridge/intel/i82801ix/madt.c M src/southbridge/intel/i82801jx/Kconfig M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/ibexpeak/Makefile.inc D src/southbridge/intel/ibexpeak/madt.c 11 files changed, 21 insertions(+), 78 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/74349/1 diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index a20092f..3105069 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -14,7 +14,6 @@ select MAINBOARD_FORCE_NATIVE_VGA_INIT if !CHROMEOS select MEMORY_MAPPED_TPM select MAINBOARD_HAS_CHROMEOS - select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select BOOT_DEVICE_NOT_SPI_FLASH select BOOT_DEVICE_MEMORY_MAPPED diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 330915f..2467e39 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -2,6 +2,7 @@ config SOUTHBRIDGE_INTEL_I82801GX bool + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_SOC_NVS diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 2871453..cacfbfb 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -349,20 +349,6 @@ i82801gx_fixups(dev); } -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE); - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL); - - return current; -} - static void i82801gx_lpc_read_resources(struct device *dev) { struct resource *res; diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index d93afa6..fb33474 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -2,6 +2,7 @@ config SOUTHBRIDGE_INTEL_I82801IX bool + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_SOC_NVS diff --git a/src/southbridge/intel/i82801ix/Makefile.inc b/src/southbridge/intel/i82801ix/Makefile.inc index 0000913..8db30ad 100644 --- a/src/southbridge/intel/i82801ix/Makefile.inc +++ b/src/southbridge/intel/i82801ix/Makefile.inc @@ -22,10 +22,6 @@ smm-y += smihandler.c -ifneq ($(CONFIG_BOARD_EMULATION_QEMU_X86_Q35),y) -ramstage-y += madt.c -endif - CPPFLAGS_common += -I$(src)/southbridge/intel/i82801ix/include endif diff --git a/src/southbridge/intel/i82801ix/madt.c b/src/southbridge/intel/i82801ix/madt.c deleted file mode 100644 index 1ac8149..0000000 --- a/src/southbridge/intel/i82801ix/madt.c +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi.h> -#include <arch/ioapic.h> -#include <arch/smp/mpspec.h> - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE); - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL); - - return current; -} diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index 62684ec..3f0ab10 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -2,6 +2,7 @@ config SOUTHBRIDGE_INTEL_I82801JX bool + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select AZALIA_PLUGIN_SUPPORT diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 8ff7926..e93502f 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -379,20 +379,6 @@ i82801jx_set_acpi_mode(dev); } -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_EDGE); - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, MP_IRQ_POLARITY_HIGH | MP_IRQ_TRIGGER_LEVEL); - - return current; -} - static void i82801jx_lpc_read_resources(struct device *dev) { int i, io_index = 0; diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index ffeef5d..adc3842 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -7,6 +7,7 @@ config SOUTH_BRIDGE_OPTIONS def_bool y + select ACPI_COMMON_MADT_IOAPIC select ACPI_COMMON_MADT_LAPIC select ACPI_INTEL_HARDWARE_SLEEP_VALUES select AZALIA_PLUGIN_SUPPORT diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc index b81792b..99968f8 100644 --- a/src/southbridge/intel/ibexpeak/Makefile.inc +++ b/src/southbridge/intel/ibexpeak/Makefile.inc @@ -20,7 +20,6 @@ ramstage-y += ../bd82x6x/me_status.c ramstage-$(CONFIG_ELOG) += ../bd82x6x/elog.c -ramstage-y += madt.c smm-y += smihandler.c diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c deleted file mode 100644 index c5b1f0b..0000000 --- a/src/southbridge/intel/ibexpeak/madt.c +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <arch/ioapic.h> -#include <acpi/acpi.h> -#include <arch/smp/mpspec.h> -#include <device/device.h> -#include <device/pci.h> - -unsigned long acpi_fill_madt(unsigned long current) -{ - /* IOAPIC */ - current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); - - /* INT_SRC_OVR */ - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 0, 2, - MP_IRQ_POLARITY_DEFAULT | - MP_IRQ_TRIGGER_DEFAULT); - current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, - MP_IRQ_POLARITY_HIGH | - MP_IRQ_TRIGGER_LEVEL); - - return current; -} -- To view, visit https://review.coreboot.org/c/coreboot/+/74349 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia8a04daf3a79d9f2f4801dc85e4975278e30dc8a Gerrit-Change-Number: 74349 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: ACPI: Add COMMON_ACPI_MADT_IOAPIC and CUSTOM_ACPI_MADT
by Kyösti Mälkki (Code Review) 12 Apr '23

12 Apr '23

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74348 ) Change subject: ACPI: Add COMMON_ACPI_MADT_IOAPIC and CUSTOM_ACPI_MADT ...................................................................... ACPI: Add COMMON_ACPI_MADT_IOAPIC and CUSTOM_ACPI_MADT Add Kconfig COMMON_ACPI_MADT_IOAPIC to replace platforms' implementations of adding IOAPIC and IRQ override entries for ACPI MADT tables. Platforms that have a more complex MADT may continue to add custom entries using CUSTOM_ACPI_MADT. Change-Id: I0b77769f89cc319ad228eb37bc341e2150b8a892 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/Kconfig M src/acpi/acpi.c M src/mainboard/asus/p2b/Kconfig M src/soc/intel/quark/Kconfig 4 files changed, 47 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/74348/1 diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig index 5af8b22..3b02070 100644 --- a/src/acpi/Kconfig +++ b/src/acpi/Kconfig @@ -31,13 +31,22 @@ Set to indicate <soc/nvs.h> exists for the platform with a definition for global_nvs. +config ACPI_CUSTOM_MADT + bool + default n if ACPI_NO_CUSTOM_MADT + default y + help + Selected by platforms that need to expose custom MADT entries. + +config ACPI_NO_CUSTOM_MADT + bool + default y if ACPI_COMMON_MADT_LAPIC && ACPI_COMMON_MADT_IOAPIC + config ACPI_COMMON_MADT_LAPIC bool -config ACPI_NO_MADT +config ACPI_COMMON_MADT_IOAPIC bool - help - Selected by platforms that don't expose a useful MADT. config ACPI_NO_PCAT_8259 bool diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index cf96aee..9107bbf 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -257,6 +257,18 @@ return irqoverride->length; } +static unsigned long acpi_create_madt_ioapic_gsi0_default(unsigned long current) +{ + current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR); + + current += acpi_create_madt_irqoverride((void *)current, MP_BUS_ISA, 0, 2, + MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH); + + current += acpi_create_madt_sci_override((void *)current); + + return current; +} + static int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu, u16 flags, u8 lint) { @@ -334,7 +346,10 @@ if (CONFIG(ACPI_COMMON_MADT_LAPIC)) current = acpi_create_madt_lapics_with_nmis(current); - if (!CONFIG(ACPI_NO_MADT)) + if (CONFIG(ACPI_COMMON_MADT_IOAPIC)) + current = acpi_create_madt_ioapic_gsi0_default(current); + + if (CONFIG(ACPI_CUSTOM_MADT)) current = acpi_fill_madt(current); /* (Re)calculate length and checksum. */ diff --git a/src/mainboard/asus/p2b/Kconfig b/src/mainboard/asus/p2b/Kconfig index 986cfde..a645bcc 100644 --- a/src/mainboard/asus/p2b/Kconfig +++ b/src/mainboard/asus/p2b/Kconfig @@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select ACPI_NO_MADT + select ACPI_NO_CUSTOM_MADT select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 58f01da..631755c 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -9,7 +9,7 @@ config CPU_SPECIFIC_OPTIONS def_bool y - select ACPI_NO_MADT + select ACPI_NO_CUSTOM_MADT select ARCH_X86 select NO_ECAM_MMCONF_SUPPORT select NO_SMM -- To view, visit https://review.coreboot.org/c/coreboot/+/74348 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0b77769f89cc319ad228eb37bc341e2150b8a892 Gerrit-Change-Number: 74348 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2023