coreboot-gerrit April 2023

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[S] Change in coreboot[master]: Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SU...
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73903 ) Change subject: Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT" ...................................................................... Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT" This reverts commit 655f7362e13ca49e3e13a822c916c7dc52573d74. Reason for revert: Apparently, the change was not properly reviewed. It not only contains conflicting name and description of the D3COLD Kconfig, but also creates a conflict between existing devicetree and Kconfig options for D3Cold/S3/S0ix. Change-Id: I56ce8f59f8548fc58bc2b3b07c1314e2eed7061c Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73903 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M src/device/Kconfig 1 file changed, 20 insertions(+), 13 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/device/Kconfig b/src/device/Kconfig index 30fcd38..ef73c40 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -998,19 +998,6 @@ help Provides xHCI utility functions. -config NO_S0IX_SUPPORT - bool "Don't support S0IX suspend" - default n - help - Select if the board only supports S3 and/or S4 and not S0IX - -config D3COLD_SUPPORT - bool "Don't support D3Cold" - default n if NO_S0IX_SUPPORT - default y - help - Select if any devices don't support D3Cold state - source "src/device/dram/Kconfig" endmenu -- To view, visit https://review.coreboot.org/c/coreboot/+/73903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56ce8f59f8548fc58bc2b3b07c1314e2eed7061c Gerrit-Change-Number: 73903 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: Revert "soc/intel/rtd3: Hook up supported states to Kconfig"
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73904 ) Change subject: Revert "soc/intel/rtd3: Hook up supported states to Kconfig" ...................................................................... Revert "soc/intel/rtd3: Hook up supported states to Kconfig" This reverts commit dbb97c3243e55a0fd00e692d150c9d38d09b57af. Reason for revert: dependency for revert CB:73903 Change-Id: Ibc81483239a13f456d20631725641b7219af4ef8 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73904 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/common/block/pcie/rtd3/rtd3.c 1 file changed, 18 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/soc/intel/common/block/pcie/rtd3/rtd3.c b/src/soc/intel/common/block/pcie/rtd3/rtd3.c index 8b372ed..5067ac3 100644 --- a/src/soc/intel/common/block/pcie/rtd3/rtd3.c +++ b/src/soc/intel/common/block/pcie/rtd3/rtd3.c @@ -511,10 +511,7 @@ acpigen_write_device(acpi_device_name(dev)); acpigen_write_ADR(0); acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON); - if (CONFIG(D3COLD_SUPPORT)) - acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_COLD); - else - acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_HOT); + acpigen_write_name_integer("_S0W", ACPI_DEVICE_SLEEP_D3_COLD); acpi_device_add_storage_d3_enable(NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/73904 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc81483239a13f456d20631725641b7219af4ef8 Gerrit-Change-Number: 73904 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT"
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73902 ) Change subject: Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT" ...................................................................... Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT" This reverts commit 6bfca1b689e48be4f72e8fa401f3558d845fc282. Reason for revert: dependency for revert CB:73903 Change-Id: I56bab4d85d04e90cacfe77db59d0cde6a8a75949 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73902 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M src/mainboard/prodrive/atlas/Kconfig M src/mainboard/starlabs/starbook/Kconfig M src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/tigerlake/fsp_params.c 5 files changed, 23 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig index a779b30..914ce9f 100644 --- a/src/mainboard/prodrive/atlas/Kconfig +++ b/src/mainboard/prodrive/atlas/Kconfig @@ -9,9 +9,9 @@ select MAINBOARD_HAS_TPM2 select MAINBOARD_USES_IFD_EC_REGION select MEMORY_MAPPED_TPM - select NO_S0IX_SUPPORT select PCIEXP_SUPPORT_RESIZABLE_BARS select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 if BOARD_PRODRIVE_ATLAS_BASEBOARD diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig index b2dfe12..3b55a86 100644 --- a/src/mainboard/starlabs/starbook/Kconfig +++ b/src/mainboard/starlabs/starbook/Kconfig @@ -10,7 +10,6 @@ select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_TPM2 - select NO_S0IX_SUPPORT select NO_UART_ON_SUPERIO select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SYSTEM_TYPE_LAPTOP @@ -49,6 +48,7 @@ select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_TIGERLAKE + select SOC_INTEL_TIGERLAKE_S3 select SPI_FLASH_WINBOND select TPM_MEASURED_BOOT @@ -62,6 +62,7 @@ select MEMORY_MAPPED_TPM select SOC_INTEL_ALDERLAKE select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 select SPI_FLASH_WINBOND select TPM_MEASURED_BOOT select PCIEXP_SUPPORT_RESIZABLE_BARS diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb index c3a3f45..cd8c480 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb @@ -19,6 +19,7 @@ register "CnviBtAudioOffload" = "1" register "enable_c6dram" = "1" register "SaGv" = "SaGv_Enabled" + register "TcssD3ColdDisable" = "1" # FSP Silicon # Serial I/O diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 704f910..9b360e7 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -648,7 +648,7 @@ /* D3Hot and D3Cold for TCSS */ s_cfg->D3HotEnable = !config->tcss_d3_hot_disable; - s_cfg->D3ColdEnable = CONFIG(D3COLD_SUPPORT) && !config->tcss_d3_cold_disable; + s_cfg->D3ColdEnable = !CONFIG(SOC_INTEL_ALDERLAKE_S3) && !config->tcss_d3_cold_disable; s_cfg->UsbTcPortEn = 0; for (int i = 0; i < MAX_TYPE_C_PORTS; i++) { diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index a10db87..b823f50 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -323,12 +323,11 @@ /* D3Hot and D3Cold for TCSS */ params->D3HotEnable = !config->TcssD3HotDisable; - cpu_id = cpu_get_cpuid(); if (cpu_id == CPUID_TIGERLAKE_A0) params->D3ColdEnable = 0; else - params->D3ColdEnable = CONFIG(D3COLD_SUPPORT); + params->D3ColdEnable = !config->TcssD3ColdDisable; params->UsbTcPortEn = config->UsbTcPortEn; params->TcssAuxOri = config->TcssAuxOri; -- To view, visit https://review.coreboot.org/c/coreboot/+/73902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56bab4d85d04e90cacfe77db59d0cde6a8a75949 Gerrit-Change-Number: 73902 Gerrit-PatchSet: 5 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol"
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73901 ) Change subject: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol" ...................................................................... Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol" This reverts commit fd4ad29f1824ad5d8df67f3e30d3908d24cbd8a4. Reason for revert: dependency for revert CB:73903 Change-Id: I5ed5e3e267032d62d65aef7fb246a075dccc9cf6 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73901 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/acpi/tcss.asl M src/soc/intel/alderlake/acpi/tcss_dma.asl M src/soc/intel/alderlake/acpi/tcss_pcierp.asl M src/soc/intel/alderlake/acpi/tcss_xhci.asl M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/acpi/tcss.asl M src/soc/intel/tigerlake/acpi/tcss_dma.asl M src/soc/intel/tigerlake/acpi/tcss_pcierp.asl M src/soc/intel/tigerlake/acpi/tcss_xhci.asl 10 files changed, 64 insertions(+), 35 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 2887439..480ee0b 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -331,6 +331,12 @@ int default 8 +config SOC_INTEL_ALDERLAKE_S3 + bool + default n + help + Select if using S3 instead of S0ix to disable D3Cold. + config ENABLE_SATA_TEST_MODE bool "Enable test mode for SATA margining" default n diff --git a/src/soc/intel/alderlake/acpi/tcss.asl b/src/soc/intel/alderlake/acpi/tcss.asl index 5c95997..1f626fc 100644 --- a/src/soc/intel/alderlake/acpi/tcss.asl +++ b/src/soc/intel/alderlake/acpi/tcss.asl @@ -583,7 +583,7 @@ } } -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Method (TCON, 0) { /* Reset IOM D3 cold bit if it is in D3 cold now. */ @@ -654,7 +654,7 @@ STAT = 0 } } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 /* * TCSS xHCI device diff --git a/src/soc/intel/alderlake/acpi/tcss_dma.asl b/src/soc/intel/alderlake/acpi/tcss_dma.asl index ca47bd0..1483c0b 100644 --- a/src/soc/intel/alderlake/acpi/tcss_dma.asl +++ b/src/soc/intel/alderlake/acpi/tcss_dma.asl @@ -28,16 +28,16 @@ Method (_S0W, 0x0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Return (0x04) #else Return (0x03) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -49,12 +49,12 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR3) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -66,7 +66,7 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } /* diff --git a/src/soc/intel/alderlake/acpi/tcss_pcierp.asl b/src/soc/intel/alderlake/acpi/tcss_pcierp.asl index 6dbde46..4f1eec5 100644 --- a/src/soc/intel/alderlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/alderlake/acpi/tcss_pcierp.asl @@ -247,16 +247,16 @@ Method (_S0W, 0x0, NotSerialized) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Return (0x4) #else Return (0x3) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -268,12 +268,12 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR3) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -285,7 +285,7 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } /* diff --git a/src/soc/intel/alderlake/acpi/tcss_xhci.asl b/src/soc/intel/alderlake/acpi/tcss_xhci.asl index ddc5a66..c0dc141 100644 --- a/src/soc/intel/alderlake/acpi/tcss_xhci.asl +++ b/src/soc/intel/alderlake/acpi/tcss_xhci.asl @@ -30,11 +30,11 @@ Method (_S0W, 0x0, NotSerialized) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Return (0x4) #else Return (0x3) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } /* @@ -43,7 +43,7 @@ */ Name (SD3C, 0) -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Method (_PR0) { Return (Package () { \_SB.PCI0.D3C }) @@ -53,7 +53,7 @@ { Return (Package () { \_SB.PCI0.D3C }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 /* * XHCI controller _DSM method diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 84425cc..fca4f79 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -207,6 +207,12 @@ int default 6 +config SOC_INTEL_TIGERLAKE_S3 + bool + default n + help + Select if using S3 instead of S0ix to disable D3Cold + config SOC_INTEL_UART_DEV_MAX int default 3 diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index 98337a3..be9d306 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -676,7 +676,7 @@ } } -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) Method (TCON, 0) { /* Reset IOM D3 cold bit if it is in D3 cold now. */ @@ -787,7 +787,7 @@ STAT = 0 } } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 /* * TCSS xHCI device diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl index bbb0b6a..3c19ef6 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl @@ -27,11 +27,11 @@ Method (_S0W, 0x0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) Return (0x04) #else Return (0x03) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 } /* @@ -40,7 +40,7 @@ */ Method (_PR0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -52,12 +52,12 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 } Method (_PR3) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -69,7 +69,7 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 } /* diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl index a8e19ed..fda58e7 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl @@ -247,7 +247,7 @@ Method (_S0W, 0x0, NotSerialized) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) Return (0x4) #else Return (0x3) @@ -256,7 +256,7 @@ Method (_PR0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -268,12 +268,12 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 } Method (_PR3) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -285,7 +285,7 @@ } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 } /* diff --git a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl index ddc5a66..a3b8c8f 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl @@ -30,11 +30,11 @@ Method (_S0W, 0x0, NotSerialized) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) Return (0x4) #else Return (0x3) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 } /* @@ -43,7 +43,7 @@ */ Name (SD3C, 0) -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) Method (_PR0) { Return (Package () { \_SB.PCI0.D3C }) @@ -53,7 +53,7 @@ { Return (Package () { \_SB.PCI0.D3C }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_TIGERLAKE_S3 /* * XHCI controller _DSM method -- To view, visit https://review.coreboot.org/c/coreboot/+/73901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ed5e3e267032d62d65aef7fb246a075dccc9cf6 Gerrit-Change-Number: 73901 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SU...
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Sean Rhodes, Angel Pons, Michael Niewöhner, Martin Roth, Lean Sheng Tan. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73903 ) Change subject: Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT" ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > Discussion on one of the changes: https://review.coreboot.org/c/coreboot/+/72800/4.. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/73903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56ce8f59f8548fc58bc2b3b07c1314e2eed7061c Gerrit-Change-Number: 73903 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 12 Apr 2023 15:19:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/cmd/block: Implement an API to get firmware partition details
by Sridhar Siricilla (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Subrata Banik, Haribalaraman Ramasubramanian, Dinesh Gehlot, Paul Menzel, Rizwan Qureshi, Reka Norman. Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74005 ) Change subject: soc/intel/cmd/block: Implement an API to get firmware partition details ...................................................................... Patch Set 29: (1 comment) File src/soc/intel/common/block/cse/cse.c: https://review.coreboot.org/c/coreboot/+/74005/comment/054ddc86_fbb5697b PS29, Line 1259: nfo request denied, request during recovery mode > I agree, there are other ways to convey the same information. […] I do agree with you, but given warning doesn't indicate what is denied. The developer has to dig through code to identify the information. -- To view, visit https://review.coreboot.org/c/coreboot/+/74005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0582010bbb836bd4734f843a8c74dee49d203fd8 Gerrit-Change-Number: 74005 Gerrit-PatchSet: 29 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: SRIDHAR SIRICILLA Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Wed, 12 Apr 2023 15:08:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Dinesh Gehlot <digehlot(a)google.com> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SU...
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Sean Rhodes, Angel Pons, Michael Niewöhner, Martin Roth, Lean Sheng Tan. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73903 ) Change subject: Revert "device: Add Kconfig options for D3COLD_SUPPORT and NO_S0IX_SUPPORT" ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56ce8f59f8548fc58bc2b3b07c1314e2eed7061c Gerrit-Change-Number: 73903 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 12 Apr 2023 15:08:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "soc/intel/rtd3: Hook up supported states to Kconfig"
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Sean Rhodes, Matt DeVillier, Angel Pons, Michael Niewöhner, Martin Roth, Eric Lai, Lean Sheng Tan. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73904 ) Change subject: Revert "soc/intel/rtd3: Hook up supported states to Kconfig" ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73904 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc81483239a13f456d20631725641b7219af4ef8 Gerrit-Change-Number: 73904 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 12 Apr 2023 15:08:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT"
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Sean Rhodes, Tarun Tuli, Subrata Banik, Christian Walter, Maximilian Brune, Angel Pons, Michael Niewöhner, Martin Roth, Lean Sheng Tan. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73902 ) Change subject: Revert "soc/intel/{tgl,adl}: Hook up D3ColdEnable UPD to D3COLD_SUPPORT" ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I56bab4d85d04e90cacfe77db59d0cde6a8a75949 Gerrit-Change-Number: 73902 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 12 Apr 2023 15:08:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol"
by Felix Singer (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Sean Rhodes, Tarun Tuli, Subrata Banik, Michael Niewöhner, Martin Roth, Lean Sheng Tan, Felix Held. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73901 ) Change subject: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol" ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ed5e3e267032d62d65aef7fb246a075dccc9cf6 Gerrit-Change-Number: 73901 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 12 Apr 2023 15:08:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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