coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

1 participants
5761 discussions

[M] Change in coreboot[master]: src/mb/purism/librem_cnl: Enable Librem 14 jack detect with fixed EC
by Jonathon Hall (Code Review) 12 Apr '23

12 Apr '23

Jonathon Hall has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74364 ) Change subject: src/mb/purism/librem_cnl: Enable Librem 14 jack detect with fixed EC ...................................................................... src/mb/purism/librem_cnl: Enable Librem 14 jack detect with fixed EC Use verbs enabling jack detect if the EC firmware has been updated with fixed jack detection. Provide system76_ec_cmd() to send arbitrary commands to the EC. Provide librem_ec_has_jack_detect() to probe for the jack detect fix. Test: Build Librem 14 and boot with latest EC, test headset jack detection. Change-Id: I57a27b1d51e4f6c7c712bcb2823d21692b9c5ce6 Signed-off-by: Jonathon Hall <jonathon.hall(a)puri.sm> --- M src/ec/purism/librem-ec/Makefile.inc A src/ec/purism/librem-ec/librem_ec.c A src/ec/purism/librem-ec/librem_ec.h M src/ec/system76/ec/system76_ec.c A src/ec/system76/ec/system76_ec.h M src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c 6 files changed, 147 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/74364/1 diff --git a/src/ec/purism/librem-ec/Makefile.inc b/src/ec/purism/librem-ec/Makefile.inc index 5e2b2df..464371f 100644 --- a/src/ec/purism/librem-ec/Makefile.inc +++ b/src/ec/purism/librem-ec/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_EC_LIBREM_EC),y) all-y += ../../system76/ec/system76_ec.c +all-y += librem_ec.c smm-$(CONFIG_DEBUG_SMI) += ../../system76/ec/system76_ec.c endif diff --git a/src/ec/purism/librem-ec/librem_ec.c b/src/ec/purism/librem-ec/librem_ec.c new file mode 100644 index 0000000..93cc2fb --- /dev/null +++ b/src/ec/purism/librem-ec/librem_ec.c @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "librem_ec.h" +#include "../../system76/ec/system76_ec.h" +#include <stddef.h> + +#define CMD_PROBE 1 + +bool librem_ec_has_jack_detect(void) +{ + /* The 'flags' field in the probe command reply was added in an update. + * Send 4 bytes of zeroes in the "request" to zero out the field if the + * EC does not set it for its reply. */ + const uint8_t request_data[4] = {0}; + uint8_t reply_data[4] = {0}; + if (!system76_ec_cmd(CMD_PROBE, request_data, ARRAY_SIZE(request_data), + reply_data, ARRAY_SIZE(reply_data))) + return false; + /* Byte 3 is flags, bit 0 is the jack detect flag */ + return reply_data[3] & 0x01; +} diff --git a/src/ec/purism/librem-ec/librem_ec.h b/src/ec/purism/librem-ec/librem_ec.h new file mode 100644 index 0000000..90548c6 --- /dev/null +++ b/src/ec/purism/librem-ec/librem_ec.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef LIBREM_EC_H +#define LIBREM_EC_H + +#include <stdbool.h> + +/* Check whether librem-ec has working jack detect. This was fixed in an + * update, so we only use the verbs with jack detect if the EC has been updated. + */ +bool librem_ec_has_jack_detect(void); + +#endif diff --git a/src/ec/system76/ec/system76_ec.c b/src/ec/system76/ec/system76_ec.c index ddcb602..b1a053d 100644 --- a/src/ec/system76/ec/system76_ec.c +++ b/src/ec/system76/ec/system76_ec.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include "system76_ec.h" #include <arch/io.h> #include <console/system76_ec.h> +#include <console/console.h> #include <timer.h> // This is the command region for System76 EC firmware. It must be @@ -11,10 +13,13 @@ #define REG_CMD 0 #define REG_RESULT 1 +#define REG_DATA 2 // Start of command data // When command register is 0, command is complete #define CMD_FINISHED 0 +#define RESULT_OK 0 + // Print command. Registers are unique for each command #define CMD_PRINT 4 #define CMD_PRINT_REG_FLAGS 2 @@ -59,3 +64,47 @@ if (byte == '\n' || len >= (SYSTEM76_EC_SIZE - CMD_PRINT_REG_DATA)) system76_ec_flush(); } + +bool system76_ec_cmd(uint8_t cmd, const uint8_t *request_data, + uint8_t request_size, uint8_t *reply_data, uint8_t reply_size) +{ + if (request_size > SYSTEM76_EC_SIZE - REG_DATA || + reply_size > SYSTEM76_EC_SIZE - REG_DATA) { + printk(BIOS_ERR, "EC command %d too long - request size %d, reply size %d\n", + cmd, request_size, reply_size); + return false; + } + + /* If any data were buffered by system76_ec_print(), flush it first */ + uint8_t buffered_len = system76_ec_read(CMD_PRINT_REG_LEN); + if (buffered_len > 0) + system76_ec_flush(); + + /* Write the data */ + uint8_t i; + for (i = 0; i < request_size; ++i) + system76_ec_write(REG_DATA+i, request_data[i]); + + /* Write the command */ + system76_ec_write(REG_CMD, cmd); + + /* Wait for the command to complete */ + bool ret = true; + int elapsed = wait_ms(1000, system76_ec_read(REG_CMD) == CMD_FINISHED); + if (elapsed == 0) { + /* Timed out: fail the command, don't attempt to read a reply. */ + ret = false; + } else { + /* Read the reply */ + for (i = 0; i < reply_size; ++i) + reply_data[i] = system76_ec_read(REG_DATA+i); + /* Check the reply status */ + ret = (system76_ec_read(REG_RESULT) == RESULT_OK); + } + + /* Reset the flags and length so we can buffer console prints again */ + system76_ec_write(CMD_PRINT_REG_FLAGS, 0); + system76_ec_write(CMD_PRINT_REG_LEN, 0); + + return ret; +} diff --git a/src/ec/system76/ec/system76_ec.h b/src/ec/system76/ec/system76_ec.h new file mode 100644 index 0000000..aea7bf1 --- /dev/null +++ b/src/ec/system76/ec/system76_ec.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SYSTEM76_EC_H +#define SYSTEM76_EC_H + +#include <stdbool.h> +#include <stdint.h> + +/* Send a command to the EC. request_data/request_size are the request payload, + * request_data can be NULL if request_size is 0. reply_data/reply_size are + * the reply payload, reply_data can be NULL if reply_size is 0. */ +bool system76_ec_cmd(uint8_t cmd, const uint8_t *request_data, + uint8_t request_size, uint8_t *reply_data, uint8_t reply_size); + +#endif diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c b/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c index 1256c17..b9aecf0 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c +++ b/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c @@ -1,6 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <device/azalia_device.h> +#include <ec/purism/librem-ec/librem_ec.h> +#include <console/console.h> const u32 cim_verb_data[] = { 0x10ec0256, /* Codec Vendor/Device ID: Realtek ALC256 */ @@ -14,12 +16,12 @@ AZALIA_PIN_CFG(0, 0x13, 0x411111f0), /* NC */ AZALIA_PIN_CFG(0, 0x14, 0x90170110), /* Internal speakers */ AZALIA_PIN_CFG(0, 0x18, 0x411111f0), /* NC */ - AZALIA_PIN_CFG(0, 0x19, 0x04a11130), /* Jack analog mic */ + AZALIA_PIN_CFG(0, 0x19, 0x02a11030), /* Jack analog mic */ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* NC */ AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* NC */ AZALIA_PIN_CFG(0, 0x1d, 0x411111f0), /* NC */ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), /* NC */ - AZALIA_PIN_CFG(0, 0x21, 0x04211120), /* Jack analog out */ + AZALIA_PIN_CFG(0, 0x21, 0x02211020), /* Jack analog out */ /* Hidden SW reset */ 0x0205001a, @@ -58,3 +60,27 @@ const u32 pc_beep_verbs[] = {}; AZALIA_ARRAY_SIZES; + +/* Older verbs with no jack detect - needed if an older Librem EC is in use that + * lacks jack detect. Headphones can be selected manually. */ +static const u32 no_jack_detect_verbs[] = { + AZALIA_PIN_CFG(0, 0x19, 0x04a11130), /* Jack analog mic */ + AZALIA_PIN_CFG(0, 0x21, 0x04211120), /* Jack analog out */ +}; + +void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid) +{ + if (viddid == 0x10ec0256) { + /* Now that the codec is configured, we can check if the EC has + * jack detect. */ + if (librem_ec_has_jack_detect()) { + printk(BIOS_INFO, "EC jack detect enabled\n"); + } else { + printk(BIOS_WARNING, "EC firmware lacks jack detect, applying workaround\n"); + /* The EC firmware lacks jack detect. Program the + * older workaround verbs with no jack detect. */ + azalia_program_verb_table(base, no_jack_detect_verbs, + ARRAY_SIZE(no_jack_detect_verbs)); + } + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/74364 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57a27b1d51e4f6c7c712bcb2823d21692b9c5ce6 Gerrit-Change-Number: 74364 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on
by Paul Menzel (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Angel Pons, Jonathon Hall, Felix Held. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74363 ) Change subject: mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on ...................................................................... Patch Set 2: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74363/comment/42663ddb_7b560f69 PS2, Line 9: Control Mini v1/v2 automatic power on by adding a 'board_settings' file : to CBFS. This allows us to use one build each for Mini v1/v2 that is : configured differently for different uses. By default, the EC setting is : not configured by coreboot, and the OS could configure it. : : Add ITE SuperIO configuration to device tree and configure base address : of BRAM1. (BRAM1 contains the EC firmware setting for automatic power : on.) : : Test: Build Mini v2, boot with no settings in CBFS. Add board_settings : configured for automatic power-on, flash, boot, confirm EC now powers : on automatically when power applied. Please reflow for 72 characters per line. Patchset: PS2: Can the hunk hooking up the Super I/O be separate? (Is there a change in behavior regarding fan control for example?) Isn’t that auto power on setting already run-time configured using CMOS, which can be easily controlled with `nvramtool` from the OS (instead of reflashing a system) and the cmos default values, which are in CBFS? File src/mainboard/purism/librem_cnl/variants/librem_mini/mainboard.c: https://review.coreboot.org/c/coreboot/+/74363/comment/f9eefe3d_8aff9306 PS2, Line 7: /* Create a cbfs file called 'board_settings' to configure settings: : * Byte 0: EC automatic power on (EC_POWER_ON_*) : */ Please use the recommended multi-line comment styles from the coding style. https://review.coreboot.org/c/coreboot/+/74363/comment/26ee5170_81c69fc5 PS2, Line 21: uint8_t ec_power_on = 0; Any reason to limit the size? Why not `unsigned int` or `bool`? https://notabs.org/coding/smallIntsBigPenalty.htm https://review.coreboot.org/c/coreboot/+/74363/comment/315494b2_497719a0 PS2, Line 24: /* The board settings size can be larger for forward compatibility with : * future settings, which are ignored */ Please use the recommended multi-line comment styles from the coding style. -- To view, visit https://review.coreboot.org/c/coreboot/+/74363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0a4ea02d71f6f99e344484726a629e0552e4941 Gerrit-Change-Number: 74363 Gerrit-PatchSet: 2 Gerrit-Owner: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 12 Apr 2023 17:21:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol"
by Lean Sheng Tan (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Michael Niewöhner. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73901 ) Change subject: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol" ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > 5 days > 24h ;) So same goes to Sean's patches: > 2 weeks. But you keep saying they were not "reviewed properly" :) So what is really considered as "reviewed properly" then, even those has been tested, waited for >2 weeks? -- To view, visit https://review.coreboot.org/c/coreboot/+/73901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ed5e3e267032d62d65aef7fb246a075dccc9cf6 Gerrit-Change-Number: 73901 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Comment-Date: Wed, 12 Apr 2023 17:21:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol"
by Michael Niewöhner (Code Review) 12 Apr '23

12 Apr '23

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73901 ) Change subject: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol" ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > As a record, this patch was merged without following 24h rule (this is not even urgent fix), there w […] 5 days > 24h ;) -- To view, visit https://review.coreboot.org/c/coreboot/+/73901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ed5e3e267032d62d65aef7fb246a075dccc9cf6 Gerrit-Change-Number: 73901 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 12 Apr 2023 17:16:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/amd/birman/port_descriptors_*: use DDI_DP_W_TYPEC type for DDI 2..4
by Felix Held (Code Review) 12 Apr '23

12 Apr '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74299 ) Change subject: mb/amd/birman/port_descriptors_*: use DDI_DP_W_TYPEC type for DDI 2..4 ...................................................................... mb/amd/birman/port_descriptors_*: use DDI_DP_W_TYPEC type for DDI 2..4 DDI 2..4 are the display outputs multiplexed onto the 3 USB type C ports as DisplayPort alternate function, so use the DDI_DP_W_TYPEC connector type for those. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I659d62bfb426e3e47214203490c34e9c200beee2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74299 Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/amd/birman/port_descriptors_glinda.c M src/mainboard/amd/birman/port_descriptors_phoenix.c 2 files changed, 25 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/mainboard/amd/birman/port_descriptors_glinda.c b/src/mainboard/amd/birman/port_descriptors_glinda.c index a2c4557..df961bf 100644 --- a/src/mainboard/amd/birman/port_descriptors_glinda.c +++ b/src/mainboard/amd/birman/port_descriptors_glinda.c @@ -63,17 +63,17 @@ .hdp_index = DDI_HDP2 }, { /* DDI2 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX3, .hdp_index = DDI_HDP3, }, { /* DDI3 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX4, .hdp_index = DDI_HDP4, }, - { /* DDI4 - unused */ - .connector_type = DDI_UNUSED_TYPE, + { /* DDI4 - DP (type C) */ + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX5, .hdp_index = DDI_HDP5, } diff --git a/src/mainboard/amd/birman/port_descriptors_phoenix.c b/src/mainboard/amd/birman/port_descriptors_phoenix.c index a2c4557..df961bf 100644 --- a/src/mainboard/amd/birman/port_descriptors_phoenix.c +++ b/src/mainboard/amd/birman/port_descriptors_phoenix.c @@ -63,17 +63,17 @@ .hdp_index = DDI_HDP2 }, { /* DDI2 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX3, .hdp_index = DDI_HDP3, }, { /* DDI3 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX4, .hdp_index = DDI_HDP4, }, - { /* DDI4 - unused */ - .connector_type = DDI_UNUSED_TYPE, + { /* DDI4 - DP (type C) */ + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX5, .hdp_index = DDI_HDP5, } -- To view, visit https://review.coreboot.org/c/coreboot/+/74299 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I659d62bfb426e3e47214203490c34e9c200beee2 Gerrit-Change-Number: 74299 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[master]: device: Correct D3Cold Kconfig option
by Maximilian Brune (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Felix Singer, Sean Rhodes, Nico Huber. Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74328 ) Change subject: device: Correct D3Cold Kconfig option ...................................................................... Patch Set 4: (1 comment) File src/device/Kconfig: https://review.coreboot.org/c/coreboot/+/74328/comment/e81a75b6_4936b234 PS2, Line 1007: config D3COLD_SUPPORT > We had a discussion about that on IRC today, and it's still ongoing it seems. […] Are there any specific reasons for that? At least S0IX_SUPPORT is just an ACPI "hint" that S0IX_SUPPORT is supported right? What the OS actually does should not matter to coreboot. The OS should be able to use S0IX and/or S3 whenever it wants. I mean they don't even contradict each other (I think). On Linux I think it only impacts what Linux "prefers" to use (/sys/power/state/mem_sleep). Windows on the other hand I have no clue, but I guess you can also change the preference there. -- To view, visit https://review.coreboot.org/c/coreboot/+/74328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9bdb6589e98ac81d0ce25df52fb916b5c2fd0157 Gerrit-Change-Number: 74328 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Wed, 12 Apr 2023 17:06:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol"
by Lean Sheng Tan (Code Review) 12 Apr '23

12 Apr '23

Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73901 ) Change subject: Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol" ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: As a record, this patch was merged without following 24h rule (this is not even urgent fix), there was discussion per coreboot IRC but it was not visible to everyone - and no consensus was achieved. This is setting a wrong precedent. -- To view, visit https://review.coreboot.org/c/coreboot/+/73901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5ed5e3e267032d62d65aef7fb246a075dccc9cf6 Gerrit-Change-Number: 73901 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 12 Apr 2023 17:02:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: device: Change NO_S0IX_SUPPORT default to def_bool
by Maximilian Brune (Code Review) 12 Apr '23

12 Apr '23

Attention is currently required from: Nico Huber, Sean Rhodes. Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74331 ) Change subject: device: Change NO_S0IX_SUPPORT default to def_bool ...................................................................... Patch Set 3: Code-Review-1 (1 comment) Patchset: PS3: > It works for me with the parent of this change checked out. Just like I would expect. […] It should not change the behaviour, since its just a short notation so that you can write: ``` bool default n ``` as ``` def_bool n ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/74331 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc824c3e06019c8922616c1cb83df95c10e285fc Gerrit-Change-Number: 74331 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 12 Apr 2023 16:56:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on
by Jonathon Hall (Code Review) 12 Apr '23

12 Apr '23

Jonathon Hall has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/74363 ) Change subject: mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on ...................................................................... mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on Control Mini v1/v2 automatic power on by adding a 'board_settings' file to CBFS. This allows us to use one build each for Mini v1/v2 that is configured differently for different uses. By default, the EC setting is not configured by coreboot, and the OS could configure it. Add ITE SuperIO configuration to device tree and configure base address of BRAM1. (BRAM1 contains the EC firmware setting for automatic power on.) Test: Build Mini v2, boot with no settings in CBFS. Add board_settings configured for automatic power-on, flash, boot, confirm EC now powers on automatically when power applied. Change-Id: Ib0a4ea02d71f6f99e344484726a629e0552e4941 Signed-off-by: Jonathon Hall <jonathon.hall(a)puri.sm> --- M src/mainboard/purism/librem_cnl/Kconfig.name M src/mainboard/purism/librem_cnl/variants/librem_mini/Makefile.inc A src/mainboard/purism/librem_cnl/variants/librem_mini/mainboard.c M src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb 4 files changed, 96 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/74363/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0a4ea02d71f6f99e344484726a629e0552e4941 Gerrit-Change-Number: 74363 Gerrit-PatchSet: 2 Gerrit-Owner: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on
by Jonathon Hall (Code Review) 12 Apr '23

12 Apr '23

Jonathon Hall has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74363 ) Change subject: mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on ...................................................................... mb/purism/librem_cnl: Provide CBFS setting for Mini auto power on Control Mini v2 automatic power on by adding a 'board_settings' file to CBFS. This allows us to use one build for Mini v1/v2 that is just configured differently. By default, the EC setting is not configured by coreboot, and the OS could configure it. Add ITE SuperIO configuration to device tree and configure base address of BRAM1. (BRAM1 contains the EC firmware setting for automatic power on.) Test: Build Mini v2, boot with no settings in CBFS. Add board_settings configured for automatic power-on, flash, boot, confirm EC now powers on automatically when power applied. Change-Id: Ib0a4ea02d71f6f99e344484726a629e0552e4941 Signed-off-by: Jonathon Hall <jonathon.hall(a)puri.sm> --- M src/mainboard/purism/librem_cnl/Kconfig.name M src/mainboard/purism/librem_cnl/variants/librem_mini/Makefile.inc A src/mainboard/purism/librem_cnl/variants/librem_mini/mainboard.c M src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb 4 files changed, 96 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/74363/1 diff --git a/src/mainboard/purism/librem_cnl/Kconfig.name b/src/mainboard/purism/librem_cnl/Kconfig.name index ad22009..a575e44 100644 --- a/src/mainboard/purism/librem_cnl/Kconfig.name +++ b/src/mainboard/purism/librem_cnl/Kconfig.name @@ -2,11 +2,13 @@ bool "Librem Mini" select BOARD_PURISM_BASEBOARD_LIBREM_CNL select SOC_INTEL_WHISKEYLAKE + select SUPERIO_ITE_IT8528E config BOARD_PURISM_LIBREM_MINI_V2 bool "Librem Mini v2" select BOARD_PURISM_BASEBOARD_LIBREM_CNL select SOC_INTEL_COMETLAKE_1 + select SUPERIO_ITE_IT8528E config BOARD_PURISM_LIBREM_14 bool "Librem 14" diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/Makefile.inc b/src/mainboard/purism/librem_cnl/variants/librem_mini/Makefile.inc index 20ff438..c583603 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/Makefile.inc +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/Makefile.inc @@ -2,3 +2,4 @@ all-y += die.c smm-y += die.c +ramstage-y += mainboard.c diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/mainboard.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/mainboard.c new file mode 100644 index 0000000..3401c43 --- /dev/null +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/mainboard.c @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <arch/io.h> +#include <device/device.h> +#include <cbfs.h> + +/* Create a cbfs file called 'board_settings' to configure settings: + * Byte 0: EC automatic power on (EC_POWER_ON_*) + */ + +/* Unconfigured: Don't change the EC BRAM. The OS can configure if desired.*/ +#define EC_POWER_ON_UNCONFIGURED 0 +/* Enable: Configure the EC to power on automatically. */ +#define EC_POWER_ON_ENABLE 1 +/* Disable: Configure the EC to stay off. */ +#define EC_POWER_ON_DISABLE 2 + +static void mainboard_final(void *chip_info) +{ + /* There is just one setting currently */ + uint8_t ec_power_on = 0; + size_t board_settings_size = 0; + void *board_settings = cbfs_map("board_settings", &board_settings_size); + /* The board settings size can be larger for forward compatibility with + * future settings, which are ignored */ + if (board_settings && board_settings_size > 0) + memcpy(&ec_power_on, board_settings, 1); + + printk(BIOS_DEBUG, "ec_power_on=%d\n", ec_power_on); + switch (ec_power_on) { + case EC_POWER_ON_ENABLE: + outb(0x29, 0x360); /* Select offset 29h in BRAM bank 1 */ + outb(0x00, 0x361); /* Write 0 = automatic power on */ + break; + case EC_POWER_ON_DISABLE: + outb(0x29, 0x360); + outb(0x01, 0x361); /* Write 1 = stay off */ + break; + default: + break; + } +} + +struct chip_operations mainboard_ops = { + .final = mainboard_final +}; diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb index 9270313..cab254a 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/overridetree.cb @@ -150,5 +150,29 @@ register "PcieClkSrcClkReq[1]" = "1" smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X" end + device pci 1f.0 on # LPC Bridge + chip superio/ite/it8528e + device pnp 2e.1 on # UART1 + io 0x60 = 0x3F8 + irq 0x70 = 0x04 + end + device pnp 2e.2 off end # UART2 + device pnp 2e.4 off end # System Wake-Up Control (SWUC) + device pnp 2e.5 off end # KBC/Mouse + device pnp 2e.6 off end # KBC/Keyboard + device pnp 2e.a off end # Consumer IR + device pnp 2e.f off end # Shared Memory/Flash Interface (SMFI) + device pnp 2e.10 on # RTC-like Timer + io 0x62 = 0x360 # BRAM1 I/O base address + end + device pnp 2e.11 off end # Power Management I/F Channel 1 (PMC1) + device pnp 2e.12 off end # Power Management I/F Channel 2 (PMC2) + device pnp 2e.13 off end # Serial Peripheral Interface (SSPI) + device pnp 2e.14 off end # Platform Environment Control Interface (PECI) + device pnp 2e.17 off end # Power Management I/F Channel 3 (PMC3) + device pnp 2e.18 off end # Power Management I/F Channel 4 (PMC4) + device pnp 2e.19 off end # Power Management I/F Channel 5 (PMC5) + end + end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/74363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0a4ea02d71f6f99e344484726a629e0552e4941 Gerrit-Change-Number: 74363 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-MessageType: newchange

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2023