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Change subject: mb/starlabs/starbook/adl: Remove the display entries from the verb table
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74431/comment/1bb18faa_78b04016
PS1, Line 9: They prevent displays
: returning after S3 when it's initiated from a display manager (systemd
: is unaffected),
Is that bug publicly documented? What Linux kernel versions, and what display managers?
Do you have a Linux log with `drm.debug=0xe`? This can also be set in sysfs in `/sys/module/drm/parameters/debug`.
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Change subject: mb/starlabs/starbook/adl: Remove the display entries from the verb table
......................................................................
Patch Set 1:
This change is ready for review.
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Jakub Czapiga has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74370 )
Change subject: soc/intel/meteorlake: Replace assert with error message
......................................................................
soc/intel/meteorlake: Replace assert with error message
Avoid asserts related to CNVi UPDs which are not boot critical.
Instead, add error messages which are more helpful in identifying
the issue.
BUG=none
TEST=Boot to the OS on google/rex
Signed-off-by: Kapil Porwal <kapilporwal(a)google.com>
Change-Id: I49a988b7eda009456d438ba7be0d2918826e1c36
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74370
Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
---
M src/soc/intel/meteorlake/fsp_params.c
1 file changed, 34 insertions(+), 6 deletions(-)
Approvals:
build bot (Jenkins): Verified
Subrata Banik: Looks good to me, approved
Eric Lai: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index 4127ff7..3c14b75 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -565,12 +565,19 @@
s_cfg->CnviWifiCore = config->cnvi_wifi_core;
s_cfg->CnviBtCore = config->cnvi_bt_core;
s_cfg->CnviBtAudioOffload = config->cnvi_bt_audio_offload;
- /* Assert if CNVi WiFi is enabled without CNVi being enabled. */
- assert(s_cfg->CnviMode || !s_cfg->CnviWifiCore);
- /* Assert if CNVi BT is enabled without CNVi being enabled. */
- assert(s_cfg->CnviMode || !s_cfg->CnviBtCore);
- /* Assert if CNVi BT offload is enabled without CNVi BT being enabled. */
- assert(s_cfg->CnviBtCore || !s_cfg->CnviBtAudioOffload);
+ if (!s_cfg->CnviMode && s_cfg->CnviWifiCore) {
+ printk(BIOS_ERR, "CNVi WiFi is enabled without CNVi being enabled\n");
+ s_cfg->CnviWifiCore = 0;
+ }
+ if (!s_cfg->CnviBtCore && s_cfg->CnviBtAudioOffload) {
+ printk(BIOS_ERR, "BT offload is enabled without CNVi BT being enabled\n");
+ s_cfg->CnviBtAudioOffload = 0;
+ }
+ if (!s_cfg->CnviMode && s_cfg->CnviBtCore) {
+ printk(BIOS_ERR, "CNVi BT is enabled without CNVi being enabled\n");
+ s_cfg->CnviBtCore = 0;
+ s_cfg->CnviBtAudioOffload = 0;
+ }
}
static void fill_fsps_vmd_params(FSP_S_CONFIG *s_cfg,
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Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73905 )
Change subject: drivers/efi: Fix linker error when SMM phase uses option API
......................................................................
drivers/efi: Fix linker error when SMM phase uses option API
For security reasons, removing the efivars implementation of the option
API was considered. However, this use-case is not the "None"
option-backend (CONFIG_OPTION_BACKEND_NONE), so the SMM phase also does
not use the no-op in option.h. This causes linker errors when the
option API is called.
For example, src/soc/intel/common/block/pmc/pmclib.c and
src/console/init.c use `get_uint_option`.
Minimising code in SMM can be implemented as a follow-up.
Change-Id: Ief3b52965d8fde141c12266a716f254dd45559d5
Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73905
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com>
---
M src/drivers/efi/Makefile.inc
1 file changed, 26 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Lean Sheng Tan: Looks good to me, approved
diff --git a/src/drivers/efi/Makefile.inc b/src/drivers/efi/Makefile.inc
index e2251b2..2597c09 100644
--- a/src/drivers/efi/Makefile.inc
+++ b/src/drivers/efi/Makefile.inc
@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
all-$(CONFIG_DRIVERS_EFI_VARIABLE_STORE) += efivars.c
+smm-$(CONFIG_DRIVERS_EFI_VARIABLE_STORE) += efivars.c
all-$(CONFIG_USE_UEFI_VARIABLE_STORE) += option.c
+smm-$(CONFIG_USE_UEFI_VARIABLE_STORE) += option.c
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Change subject: drivers/efi: Fix linker error when SMM phase uses option API
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Discussed with Arthur, will submit this first to prevent build error but still need to implement this https://review.coreboot.org/c/coreboot/+/73906/3
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74430 )
Change subject: ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/intel/cmn/cse: Move API to get FW partition info into cse_lite.c
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74382/comment/7ce8da1f_ae35d5cc
PS1, Line 9: The patch moves API that gets the CSE FW partition information into
: CSE Lite specific file aka cse_lite.c because the consumer of this API
: is the cse_lite specific ChromeOS devices hence, it's meaningful to
: move the cse lite specific implementation inside cse_lite.c file.
> > cse.c represents library, provides API. […]
>> cse.c can't be a library because it has other pci ops entries. Today the R&R of cse. c and cse_lite.c are not very clear.
Portion of code sets up the communication with CSE while most of the code represents CSE command handlers and helper other functions which can be consumed by all CSE SKUs. The CSE.C file size increased significantly, it's better CSE command handlers/helper functions need to be maintained in a separate file while leaving CSE driver code into this file.
>> Coming to the reason why i moved this API into cse_lite.c. seems like this whole patchsets and incremental patch train is very specific to CSE lite implementation and chromeos use case, where we would like to store the cse rw version after CSE sync being done (either in romstage or ramstage)
You can still make GET IMAGE FW Version command handler public so that you can refer it from cse_lite.c.
But, you may go ahead with your current implementation. Anyways cse code needs to be refactored to prepare a pristine cse lib.
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74255 )
Change subject: soc/intel/cmd/block/cse: Add config option for storing fw version info
......................................................................
Patch Set 13:
(1 comment)
File src/soc/intel/common/block/cse/Kconfig:
https://review.coreboot.org/c/coreboot/+/74255/comment/b5da5037_5fdef95b
PS13, Line 48: config SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION
: bool
: default n
: depends on DRIVERS_INTEL_ISH
: help
: This configuration option stores CSE FPT partitions' version in CBMEM memory.
: This information can be used to identify the currently running firmware partition
: version.
Sorry, for bringing this up again. No idea, if it was answered in another change-set comment, but I think, it should be clear from the Kconfig description.
1. Why does this need to be configurable, and cannot be enable unconditionally?
2. Why does this information need to be stored in CBMEM? If the firmware is updated in coreboot, why can’t coreboot read the version information directly? Is it some boundaries between stages? I thought mainly CBMEM is used to pass information to later programs like payloads or the OS (CBMEM console).
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