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Change subject: mb/google/brya/var/constitution: Generate SPD ID for supported parts
......................................................................
mb/google/brya/var/constitution: Generate SPD ID for supported parts
Add supported memory part in mem_parts_used.txt, then generate.
K4UBE3D4AB-MGCL
BUG=b:267539938
TEST=run part_id_gen to generate SPD id
Change-Id: Iee41bb4511f2d77e5ddc2798f9d4db6137ed818d
Signed-off-by: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/constitution/memory/Makefile.inc
M src/mainboard/google/brya/variants/constitution/memory/dram_id.generated.txt
M src/mainboard/google/brya/variants/constitution/memory/mem_parts_used.txt
3 files changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/74497/3
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Change subject: mb/google/kukui: Add Samsung K3UBE3D4AB-MGCL 4GB and Hynix H54G68CYRBX248 8GB support for Pico
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/73469/comment/c085dd73_080dea7c
PS5, Line 7: Samsung K3UBE3D4AB-MGCL 4GB and
: Hynix H54G68CYRBX248 8GB support for Pico
sdram configs for RAM code 0x33 and 0x34
https://review.coreboot.org/c/coreboot/+/73469/comment/a614019d_5d5b45ed
PS5, Line 10: Add new RAM ID 0x33 and 0x34 for new memory support
: leverage sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB SPD for K4UBE3D4AB-MGCL 4GB
: and sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB for H54G68CYRBX248 8GB
```
Add sdram configs:
- RAM code 0x33: sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB SPD for K4UBE3D4AB-MGCL 4GB
- RAM code 0x34: sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB for H54G68CYRBX248 8GB
```
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Change subject: mb/google/kukui: Add Samsung K3UBE3D4AB-MGCL 4GB and Hynix H54G68CYRBX248 8GB support for Pico
......................................................................
mb/google/kukui: Add Samsung K3UBE3D4AB-MGCL 4GB and
Hynix H54G68CYRBX248 8GB support for Pico
Add new RAM ID 0x33 and 0x34 for new memory support
leverage sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB SPD for K4UBE3D4AB-MGCL 4GB
and sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-8GB for H54G68CYRBX248 8GB
BUG=b:278644249
BRANCH=kukui
TEST=emerge-jacuzzi coreboot
Signed-off-by: Sheng-Liang Pan <sheng-liang.pan(a)quanta.corp-partner.google.com>
Change-Id: If5b484b5324ba39dbb220f12bdb8344ecb5c4da5
---
M src/mainboard/google/kukui/sdram_configs.c
1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/73469/5
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Change subject: mb/google/kukui: Add Samsung K3UBE3D4AB-MGCL 4GB and Hynix H54G68CYRBX248 8GB support for Pico
......................................................................
Patch Set 4: Code-Review+1
This change is ready for review.
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Change subject: cpu/x86/Kconfig: Disable choice X2APIC_ONLY
......................................................................
Patch Set 1:
(1 comment)
File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/74484/comment/3489b3e8_0660de8d
PS1, Line 79: X2APIC_ONLY
now u have moved `X2APIC_ONLY` outside choice ? (line#45)
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Change subject: mb/google/rex/var/screebo: Add initial setup for gpio config
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
> I don't kw the location of Screebo schematics or platform mapping doc to review this cl
The location of Screebo schematics is as follows:
https://drive.google.com/drive/folders/1laLtrXwOd8UMugOKdCtDCp7yQbRZQv6v
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Change subject: mb/google/myst: Enable tis_plat_irq_status
......................................................................
Patch Set 12: Code-Review+2
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Change subject: mb/google/myst: Set system type to laptop
......................................................................
Patch Set 11: Code-Review+2
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Change subject: mb/google/myst: Expose SKU and board ID to Chrome OS
......................................................................
Patch Set 12: Code-Review+2
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