coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

1 participants
5761 discussions

[M] Change in coreboot[master]: mb/google/nissa/var/yavilla: Generate SPD ID to aligen with yaviks
by Eric Lai (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Tarun Tuli, Chen-Tsung Hsieh, Tony Huang, Derek Huang, Robert Chen, Shon Wang, Shou-Chieh Hsu. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74584 ) Change subject: mb/google/nissa/var/yavilla: Generate SPD ID to aligen with yaviks ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: Do you have exist board will effect by this change? If not SMT yet, it's fine though. -- To view, visit https://review.coreboot.org/c/coreboot/+/74584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4a5eb9e6e87a4adbc23f94f0eb92d5452c50e47c Gerrit-Change-Number: 74584 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Chen-Tsung Hsieh <chentsung(a)chromium.org> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 01:17:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/dedede/var/boxy: Generate SPD ID for supported memory part
by Derek Huang (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Kevin3 Yang. Derek Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74586 ) Change subject: mb/google/dedede/var/boxy: Generate SPD ID for supported memory part ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I317f2b31774627706babdea10776af05ab692d1e Gerrit-Change-Number: 74586 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 01:11:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/dedede/var/boxy: Generate SPD ID for supported memory part
by Eric Lai (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Derek Huang, Kevin3 Yang. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74586 ) Change subject: mb/google/dedede/var/boxy: Generate SPD ID for supported memory part ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I317f2b31774627706babdea10776af05ab692d1e Gerrit-Change-Number: 74586 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 01:10:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/google/dedede: Create boxy variant
by Eric Lai (Code Review) 21 Apr '23

21 Apr '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74536 ) Change subject: mb/google/dedede: Create boxy variant ...................................................................... mb/google/dedede: Create boxy variant Create the boxy variant of the waddledee reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:277529068 BRANCH=None TEST=util/abuild/abuild -p none -t google/dedede -x -a make sure the build includes GOOGLE_BOXY Change-ID: Ief22eb000421c23abf6de3f99eb860bdae1e7919 Signed-off-by: kevin3.yang <kevin3.yang(a)lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74536 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Derek Huang <derekhuang(a)google.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Kconfig.name A src/mainboard/google/dedede/variants/boxy/include/variant/ec.h A src/mainboard/google/dedede/variants/boxy/include/variant/gpio.h A src/mainboard/google/dedede/variants/boxy/memory/Makefile.inc A src/mainboard/google/dedede/variants/boxy/memory/dram_id.generated.txt A src/mainboard/google/dedede/variants/boxy/memory/mem_parts_used.txt A src/mainboard/google/dedede/variants/boxy/overridetree.cb 8 files changed, 108 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Derek Huang: Looks good to me, approved diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index e8b3e34..054bc22 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -115,6 +115,7 @@ default "Beadrix" if BOARD_GOOGLE_BEADRIX default "Shotzo" if BOARD_GOOGLE_SHOTZO default "Taranza" if BOARD_GOOGLE_TARANZA + default "Boxy" if BOARD_GOOGLE_BOXY config MAX_CPUS int @@ -156,6 +157,7 @@ default "beadrix" if BOARD_GOOGLE_BEADRIX default "shotzo" if BOARD_GOOGLE_SHOTZO default "taranza" if BOARD_GOOGLE_TARANZA + default "boxy" if BOARD_GOOGLE_BOXY endif #BOARD_GOOGLE_BASEBOARD_DEDEDE diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name index 8ccd0c7..cfb4186 100644 --- a/src/mainboard/google/dedede/Kconfig.name +++ b/src/mainboard/google/dedede/Kconfig.name @@ -205,3 +205,10 @@ config BOARD_GOOGLE_TARANZA bool "-> Taranza" select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 + +config BOARD_GOOGLE_BOXY + bool "-> Boxy" + select BOARD_GOOGLE_BASEBOARD_DEDEDE_CR50 + select RT8168_GEN_ACPI_POWER_RESOURCE + select RT8168_GET_MAC_FROM_VPD + select RT8168_SET_LED_MODE diff --git a/src/mainboard/google/dedede/variants/boxy/include/variant/ec.h b/src/mainboard/google/dedede/variants/boxy/include/variant/ec.h new file mode 100644 index 0000000..08870e0 --- /dev/null +++ b/src/mainboard/google/dedede/variants/boxy/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/dedede/variants/boxy/include/variant/gpio.h b/src/mainboard/google/dedede/variants/boxy/include/variant/gpio.h new file mode 100644 index 0000000..9078664 --- /dev/null +++ b/src/mainboard/google/dedede/variants/boxy/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include <baseboard/gpio.h> + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/dedede/variants/boxy/memory/Makefile.inc b/src/mainboard/google/dedede/variants/boxy/memory/Makefile.inc new file mode 100644 index 0000000..eace2e4 --- /dev/null +++ b/src/mainboard/google/dedede/variants/boxy/memory/Makefile.inc @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder diff --git a/src/mainboard/google/dedede/variants/boxy/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/boxy/memory/dram_id.generated.txt new file mode 100644 index 0000000..fa24790 --- /dev/null +++ b/src/mainboard/google/dedede/variants/boxy/memory/dram_id.generated.txt @@ -0,0 +1 @@ +DRAM Part Name ID to assign diff --git a/src/mainboard/google/dedede/variants/boxy/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/boxy/memory/mem_parts_used.txt new file mode 100644 index 0000000..9621137 --- /dev/null +++ b/src/mainboard/google/dedede/variants/boxy/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.inc and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/dedede/variants/boxy/overridetree.cb b/src/mainboard/google/dedede/variants/boxy/overridetree.cb new file mode 100644 index 0000000..404024b --- /dev/null +++ b/src/mainboard/google/dedede/variants/boxy/overridetree.cb @@ -0,0 +1,42 @@ +chip soc/intel/jasperlake + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| GSPI0 | cr50 TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| | before memory is up | + #| I2C0 | Trackpad | + #| I2C1 | Digitizer | + #| I2C2 | Touchscreen | + #| I2C3 | Camera | + #| I2C4 | Audio | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + .i2c[0] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[1] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[2] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[3] = { + .speed = I2C_SPEED_FAST, + }, + .i2c[4] = { + .speed = I2C_SPEED_FAST, + }, + }" + + device domain 0 on + device pci 15.0 on end + end +end -- To view, visit https://review.coreboot.org/c/coreboot/+/74536 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief22eb000421c23abf6de3f99eb860bdae1e7919 Gerrit-Change-Number: 74536 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-MessageType: merged

1 0

[S] Change in coreboot[master]: mb/google/octopus: Add EC_HOST_EVENT_PANIC to SCI mask
by Eric Lai (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Rob Barnes. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74622 ) Change subject: mb/google/octopus: Add EC_HOST_EVENT_PANIC to SCI mask ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37e566e459f39f8bc2dafc3c3915260259730ca6 Gerrit-Change-Number: 74622 Gerrit-PatchSet: 2 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 01:06:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/google/brya/variants/hades: Swap LAN and SD Card PCIE Ports
by Eric Lai (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74630 ) Change subject: mb/google/brya/variants/hades: Swap LAN and SD Card PCIE Ports ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: So CLKREQ remain the same? -- To view, visit https://review.coreboot.org/c/coreboot/+/74630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If59849c13e4c42f00e3571c0385994ade5931adb Gerrit-Change-Number: 74630 Gerrit-PatchSet: 5 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 00:58:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: arch/arm64: Add aarch64 target linker arguments
by Julius Werner (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74500 ) Change subject: arch/arm64: Add aarch64 target linker arguments ...................................................................... Patch Set 2: (2 comments) File src/arch/arm64/armv8/Makefile.inc: https://review.coreboot.org/c/coreboot/+/74500/comment/12aa49f3_812c4604 PS2, Line 29: ifneq ($(CONFIG_COMPILER_GCC),y) Why check for !GCC instead of checking for LLVM_CLANG? https://review.coreboot.org/c/coreboot/+/74500/comment/ae61e843_2366fe96 PS2, Line 35: rmodule_arm-ld-ccopts += -target aarch64-eabi Wouldn't it make more sense to do this in xcompile anyway? -- To view, visit https://review.coreboot.org/c/coreboot/+/74500 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6ee4c0c34e2aa52e4f6c72338880a5cf9cc7009b Gerrit-Change-Number: 74500 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 21 Apr 2023 00:19:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/qualcomm/sc7180: Fix set but unused variables
by Julius Werner (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Arthur Heymans. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74557 ) Change subject: soc/qualcomm/sc7180: Fix set but unused variables ...................................................................... Patch Set 5: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/74557/comment/b2f1f635_2dab4230 PS5, Line 9: This fixes clang warnings. I'm not against fixing these warnings, but why is that a GCC vs. clang difference? GCC also has -Wunused-but-set-variable (at least according to https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html). If there's a difference in defaults between the two, we should eliminate that by explicitly adding -Wno-unused-but-set-variable (or rather add -Wunused-but-set-variable after fixing all these so GCC can check it as well). File src/soc/qualcomm/sc7180/display/disp.c: https://review.coreboot.org/c/coreboot/+/74557/comment/929b9699_5cb57339 PS5, Line 11: /* Is this necessary ? */ No, it's not (I just tested it). Let's take it out completely. -- To view, visit https://review.coreboot.org/c/coreboot/+/74557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I407da6ec05ef646f61bd81e314fee1b5ea659192 Gerrit-Change-Number: 74557 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 21 Apr 2023 00:14:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/google/brya/variants/hades: Swap LAN and SD Card PCIE Ports
by Eric Lai (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74630 ) Change subject: mb/google/brya/variants/hades: Swap LAN and SD Card PCIE Ports ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74630 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If59849c13e4c42f00e3571c0385994ade5931adb Gerrit-Change-Number: 74630 Gerrit-PatchSet: 5 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Fri, 21 Apr 2023 00:08:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/intel/cmn/cse: Store ISH firmware version into CBMEM
by Kangheui Won (Code Review) 21 Apr '23

21 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Dinesh Gehlot, Sridhar Siricilla, Arthur Heymans. Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74208 ) Change subject: soc/intel/cmn/cse: Store ISH firmware version into CBMEM ...................................................................... Patch Set 25: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5c5faf926c75b05d189fb1118020fff024fc3e0 Gerrit-Change-Number: 74208 Gerrit-PatchSet: 25 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 21 Apr 2023 00:00:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2023