coreboot-gerrit April 2023

coreboot-gerrit@coreboot.org

1 participants
5761 discussions

[S] Change in coreboot[master]: mb/google/brya/var/taeko:Disable C1E for RPL CPU
by Joey Peng (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Tarun Tuli, YH Lin, Subrata Banik, Nick Vaccaro, Eric Lai. Joey Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74727 ) Change subject: mb/google/brya/var/taeko:Disable C1E for RPL CPU ...................................................................... Patch Set 5: (1 comment) This change is ready for review. File src/mainboard/google/brya/variants/taeko/variant.c: https://review.coreboot.org/c/coreboot/+/74727/comment/9ecafd96_59169cdc PS2, Line 16: if (fw_config_probe(FW_CONFIG(RPL, IS_RPL))) { > you can do it by read CPUID. Thanks for the advice Eric! I have changed the probe method to using CPU_ID. -- To view, visit https://review.coreboot.org/c/coreboot/+/74727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342 Gerrit-Change-Number: 74727 Gerrit-PatchSet: 5 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin3 Yang <kevin3.yang(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 09:20:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold:Generate RAM IDs for new memory parts
by Rex Chou (Code Review) 25 Apr '23

25 Apr '23

Rex Chou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74740 ) Change subject: mb/google/skyrim/var/winterhold:Generate RAM IDs for new memory parts ...................................................................... mb/google/skyrim/var/winterhold:Generate RAM IDs for new memory parts Update K3KL6L60GM-MGCT support BRANCH=None BUG=b:243337816 TEST=emerge-skyrim coreboot Change-Id: I89b9798c16635a32dff12f1c0b65737d3c16cd59 Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> --- M src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc M src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt M src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt 3 files changed, 21 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/74740/1 diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc b/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc index 1b6fb35..7ab1e0e 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/Makefile.inc @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen MDN lp5 src/mainboard/google/skyrim/variants/winterhold/memory src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen MDN lp5 src/mainboard/google/skyrim/variants/winterhold/memory/ src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt SPD_SOURCES = SPD_SOURCES += spd/lp5/set-1/spd-5.hex # ID = 0(0b0000) Parts = K3LKLKL0EM-MGCN @@ -12,3 +12,4 @@ SPD_SOURCES += spd/lp5/set-1/spd-6.hex # ID = 5(0b0101) Parts = K3LKCKC0BM-MGCP, H58G66AK6BX070 SPD_SOURCES += spd/lp5/set-1/spd-4.hex # ID = 6(0b0110) Parts = MT62F2G32D8DR-031 WT:B SPD_SOURCES += spd/lp5/set-1/spd-8.hex # ID = 7(0b0111) Parts = MT62F2G32D4DS-026 WT:B, K3KL9L90CM-MGCT, H58G66BK7BX067 +SPD_SOURCES += spd/lp5/set-1/spd-9.hex # ID = 8(0b1000) Parts = K3KL6L60GM-MGCT diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt b/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt index f3f8850..83dfcd6 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/dram_id.generated.txt @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/bin/part_id_gen MDN lp5 src/mainboard/google/skyrim/variants/winterhold/memory src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen MDN lp5 src/mainboard/google/skyrim/variants/winterhold/memory/ src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt DRAM Part Name ID to assign K3LKLKL0EM-MGCN 0 (0000) @@ -19,3 +19,4 @@ K3KL9L90CM-MGCT 7 (0111) H58G56BK7BX068 4 (0100) H58G66BK7BX067 7 (0111) +K3KL6L60GM-MGCT 8 (1000) diff --git a/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt b/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt index eda02b8..fba1085 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt +++ b/src/mainboard/google/skyrim/variants/winterhold/memory/mem_parts_used.txt @@ -13,3 +13,4 @@ K3KL9L90CM-MGCT, H58G56BK7BX068, H58G66BK7BX067, +K3KL6L60GM-MGCT, -- To view, visit https://review.coreboot.org/c/coreboot/+/74740 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89b9798c16635a32dff12f1c0b65737d3c16cd59 Gerrit-Change-Number: 74740 Gerrit-PatchSet: 1 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: mb/google/nissa/var/craask: avoid camera LED blinking during boot
by Eric Lai (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Tarun Tuli, Reka Norman, Jimmy Su. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74728 ) Change subject: mb/google/nissa/var/craask: avoid camera LED blinking during boot ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Please describe the D15 in VCM, also if we enable D15 in VCM, can that remove from the sensor side? -- To view, visit https://review.coreboot.org/c/coreboot/+/74728 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ed5efe1e2c071d817c1e0455271886e89e63c7 Gerrit-Change-Number: 74728 Gerrit-PatchSet: 1 Gerrit-Owner: Jimmy Su <jimmy.su(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Jimmy Su <jimmy.su(a)intel.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 08:56:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/nissa/var/craask: avoid camera LED blinking during boot
by build bot (Jenkins) (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Tarun Tuli. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74728 ) Change subject: mb/google/nissa/var/craask: avoid camera LED blinking during boot ...................................................................... Patch Set 1: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174900): https://review.coreboot.org/c/coreboot/+/74728/comment/4eca6f16_194f28f9 PS1, Line 9: Camera LED will blink several times as sensor is being probed during kernel boot, Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-174900): https://review.coreboot.org/c/coreboot/+/74728/comment/94b7f5d1_13c6881c PS1, Line 15: TEST=Build and boot on Craask. Verify & observe Camera LED blinking behavior. Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/74728 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ed5efe1e2c071d817c1e0455271886e89e63c7 Gerrit-Change-Number: 74728 Gerrit-PatchSet: 1 Gerrit-Owner: Jimmy Su <jimmy.su(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 08:17:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/nissa/var/craask: avoid camera LED blinking during boot
by Jimmy Su (Code Review) 25 Apr '23

25 Apr '23

Jimmy Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74728 ) Change subject: mb/google/nissa/var/craask: avoid camera LED blinking during boot ...................................................................... mb/google/nissa/var/craask: avoid camera LED blinking during boot Camera LED will blink several times as sensor is being probed during kernel boot, Configure _DSC to ACPI_DEVICE_SLEEP_D3_COLD so that driver skips initial probe during kernel boot and prevent privacy LED blink. BUG=b:274634319 TEST=Build and boot on Craask. Verify & observe Camera LED blinking behavior. Change-Id: I78ed5efe1e2c071d817c1e0455271886e89e63c7 Signed-off-by: Jimmy Su <jimmy.su(a)intel.com> --- M src/mainboard/google/brya/variants/craask/overridetree.cb 1 file changed, 34 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/74728/1 diff --git a/src/mainboard/google/brya/variants/craask/overridetree.cb b/src/mainboard/google/brya/variants/craask/overridetree.cb index e65ac80..6bc1635 100644 --- a/src/mainboard/google/brya/variants/craask/overridetree.cb +++ b/src/mainboard/google/brya/variants/craask/overridetree.cb @@ -397,6 +397,8 @@ register "remote_name" = ""IPU0"" register "has_power_resource" = "1" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" + #Controls register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3" register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ" @@ -431,6 +433,7 @@ register "chip_name" = ""Ov 8856 Camera"" register "device_type" = "INTEL_ACPI_CAMERA_SENSOR" register "has_power_resource" = "1" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" register "ssdb.lanes_used" = "2" register "ssdb.link_used" = "1" @@ -474,8 +477,20 @@ register "chip_name" = ""DW AF DAC"" register "device_type" = "INTEL_ACPI_CAMERA_VCM" - register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC"" register "vcm_compat" = ""dongwoon,dw9714"" + register "has_power_resource" = "1" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" + + #Controls + register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X + + #_ON + register "on_seq.ops_cnt" = "1" + register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" + + #_OFF + register "off_seq.ops_cnt" = "1" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" device i2c 0C on probe WFC WFC_MIPI_OVTI5675 @@ -489,8 +504,6 @@ register "chip_name" = ""GT24C08"" register "device_type" = "INTEL_ACPI_CAMERA_NVM" - register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC"" - register "nvm_size" = "0x2000" register "nvm_pagesize" = "1" register "nvm_readonly" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/74728 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I78ed5efe1e2c071d817c1e0455271886e89e63c7 Gerrit-Change-Number: 74728 Gerrit-PatchSet: 1 Gerrit-Owner: Jimmy Su <jimmy.su(a)intel.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: mb/siemens/mc_ehl4: Enable SD card
by Werner Zeh (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Paul Menzel, Mario Scheithauer. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74653 ) Change subject: mb/siemens/mc_ehl4: Enable SD card ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74653 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd9b25301311679cf93b05ba83a24e551261a020 Gerrit-Change-Number: 74653 Gerrit-PatchSet: 5 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 07:59:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/siemens/mc_ehl4: Change NC FPGA PCIe RP connection for POST codes
by Werner Zeh (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Paul Menzel, Mario Scheithauer. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74650 ) Change subject: mb/siemens/mc_ehl4: Change NC FPGA PCIe RP connection for POST codes ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/74650 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15035523d8575d486c3f2d0ffe3916712ee89d7d Gerrit-Change-Number: 74650 Gerrit-PatchSet: 5 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 07:56:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/siemens/mc_ehl4: Adjust GPIOs
by Werner Zeh (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Paul Menzel, Mario Scheithauer, Jan Samek. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74628 ) Change subject: mb/siemens/mc_ehl4: Adjust GPIOs ...................................................................... Patch Set 5: Code-Review+2 (1 comment) File src/mainboard/siemens/mc_ehl/variants/mc_ehl4/gpio.c: https://review.coreboot.org/c/coreboot/+/74628/comment/88365956_a27130f9 PS4, Line 64: PAD_CFG_NF(GPP_H8, UP_20K, DEEP, NF1), /* SIO_I2C4_SDA */ : PAD_CFG_NF(GPP_H9, UP_20K, DEEP, NF1), /* SIO_I2C4_SCL */ > I have included both GPIOs again. But in this case, FSP would also set them to NF1, since device 19. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66bfbb380e9a05b3a2c08d5d1980e9749b46ee43 Gerrit-Change-Number: 74628 Gerrit-PatchSet: 5 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 07:56:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Mario Scheithauer <mario.scheithauer(a)siemens.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/common: Fix long delay when ME is disabled
by Lean Sheng Tan (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Sean Rhodes, Tarun Tuli, Subrata Banik, Dinesh Gehlot, Paul Menzel, Sridhar Siricilla, Angel Pons. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74435 ) Change subject: soc/intel/common: Fix long delay when ME is disabled ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/74435/comment/1ca68c44_baa2e597 PS1, Line 14: : This is because the current code only checks if the ME is : disabled for CSE LITE SKUs. With this patch, boot times are : approximately 5 seconds quicker: > so i guess it makes sense for this patch to adapt the same flow as chrome os with cse_is_hfs1_com_so […] if there is no further concern, will mark this as resolved? -- To view, visit https://review.coreboot.org/c/coreboot/+/74435 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I182f30d4fbf43955747c6a7a0b284a43f9c5e4ef Gerrit-Change-Number: 74435 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dinesh Gehlot <digehlot(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 07:48:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: soc/intel/common: Fix long delay when ME is disabled
by Sean Rhodes (Code Review) 25 Apr '23

25 Apr '23

Attention is currently required from: Tarun Tuli, Subrata Banik, Dinesh Gehlot, Paul Menzel, Sridhar Siricilla, Angel Pons. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74435 ) Change subject: soc/intel/common: Fix long delay when ME is disabled ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/cse/cse_eop.c: https://review.coreboot.org/c/coreboot/+/74435/comment/226d858d_c6628466 PS1, Line 273: AND > Please update the API description to reflect the current "if condition" change. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/74435 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I182f30d4fbf43955747c6a7a0b284a43f9c5e4ef Gerrit-Change-Number: 74435 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dinesh Gehlot <digehlot(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Apr 2023 07:47:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Dinesh Gehlot <digehlot(a)google.com> Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2023