Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74525 )
Change subject: soc/amd/common/block/gfx: Re-add signature check for vbios cache
......................................................................
soc/amd/common/block/gfx: Re-add signature check for vbios cache
Commit c7b8809f155a ("soc/amd/common/block/gfx: Use TPM-stored hash
for vbios cache validation") replaced checking the vbios signature
(first two bytes) with checking against a TPM-stored hash, but there
exists an edge case where the empty cache can be hashed and therefore
never updated with the correct vbios data. To mitigate this, re-add
the signature check to ensure that an empty cache will never be hashed
to TPM.
BUG=b:255812886
BRANCH=skyrim
TEST=build/boot skyrim w/selective GOP enabled, flash full firmware
image, ensure GOP driver is run until cache updated with valid data
and hashed to TPM.
Change-Id: Id06a8cfaa44d346fb2eece53dcf74ee46f4a5352
Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74525
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Jason Glenesk <jason.glenesk(a)gmail.com>
Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
---
M src/soc/amd/common/block/graphics/graphics.c
1 file changed, 34 insertions(+), 2 deletions(-)
Approvals:
build bot (Jenkins): Verified
Jason Glenesk: Looks good to me, approved
Martin Roth: Looks good to me, approved
diff --git a/src/soc/amd/common/block/graphics/graphics.c b/src/soc/amd/common/block/graphics/graphics.c
index cc52053..d8f3e1f 100644
--- a/src/soc/amd/common/block/graphics/graphics.c
+++ b/src/soc/amd/common/block/graphics/graphics.c
@@ -257,11 +257,13 @@
/*
* Return true if VBIOS cache data is valid
*
- * Compare hash of data with hash stored in TPM NVRAM
+ * Compare first 2 bytes of data with known signature
+ * and hash of data with hash stored in TPM NVRAM
*/
bool vbios_cache_is_valid(void)
{
- return vbios_cache_verify_hash(vbios_data, VBIOS_CACHE_FMAP_SIZE) == CB_SUCCESS;
+ bool sig_valid = vbios_data[0] == 0x55 && vbios_data[1] == 0xaa;
+ return sig_valid && vbios_cache_verify_hash(vbios_data, VBIOS_CACHE_FMAP_SIZE) == CB_SUCCESS;
}
BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_EXIT, read_vbios_cache_from_fmap, NULL);
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Change subject: soc/amd/common/block/gfx: Re-add signature check for vbios cache
......................................................................
Patch Set 3: Code-Review+2
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Change subject: soc/amd/common/block/gfx: Re-add signature check for vbios cache
......................................................................
Patch Set 3: Code-Review+2
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Change subject: acpigen: Add a runtime method to override exposed _Sx sleep states
......................................................................
Patch Set 10: Code-Review+2
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Change subject: util/ifdtool/ifdtool.c: Fix default FMAP generation
......................................................................
Patch Set 5: Code-Review+2
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Change subject: acpi: Add missing cbfs_unmap()
......................................................................
Patch Set 3:
(1 comment)
File src/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/74715/comment/41a0de6b_8f61683d
PS2, Line 1934: cbfs_unmap(dsdt_file);
> Beyond the scope of this change, I wonder if we can make mem_pool library flexible by freeing the buffer if it is in either last_alloc or second_to_last alloc.
I agree that cleaning up `mem_pool` doesn't need to be a part of this change.
Ideally `mem_pool` can handle freeing memory in any order; tracking the last 2 allocations feels arbitrary to me. It doesn't need to handle allocating from the freed middle blocks if there are still allocated blocks at the end, but it should be able to move `free_offset` as the end blocks are freed so we can eventually reuse the memory.
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Change subject: mb/google/myst: Inject SPD binaries to APCB
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/myst/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/74746/comment/7f31d8b1_32f99031
PS1, Line 18: APCB_PHX_D5
> Is this question specific to APCB? In theory, APCB is binary compatible across SOC refreshes. […]
My question is in regards to PHX (bringup SOC) and the follow-on SOCs that Myst is intending to ship with. Presumably, we'll need to support both at the same time for Myst, unless we drop support for PHX and move over entirely to the new SOC when it's ready.
I don't want to try and predict the future in terms of requirements and try to update this CL with those guesses, I'm mostly just curious if there are any thoughts on how to handle that if/when it comes up.
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Hello Lance Zhao, build bot (Jenkins), Tim Wawrzynczak, Christian Walter, Angel Pons, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74421
to look at the new patch set (#15).
Change subject: mb/prodrive/atlas: Enable/disable sleep states based on EC
......................................................................
mb/prodrive/atlas: Enable/disable sleep states based on EC
With the profile ATLAS_PROF_REALTIME_PERFORMANCE it is desired to not
have the option to be able to enter sleep. The reason is that windows
goes to sleep after 30min of inactivity.
TEST: See that Microsoft Windows 11 has no 'Sleep' option in the start
menu.
Change-Id: I424db7e712a705c628aa3a10a486d3313404987a
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/prodrive/atlas/Kconfig
M src/mainboard/prodrive/atlas/mainboard.c
2 files changed, 27 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/74421/15
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74762 )
Change subject: acpigen: Add a runtime method to override exposed _Sx sleep states
......................................................................
Patch Set 10:
(1 comment)
File src/acpi/acpigen.c:
https://review.coreboot.org/c/coreboot/+/74762/comment/10ccdaeb_894b4192
PS9, Line 2368: acpi_ssdt_override_sleep_states
> update the name per change: […]
Done
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