coreboot-gerrit March 2023

coreboot-gerrit@coreboot.org

1 participants
4880 discussions

[S] Change in coreboot[master]: mb/google/geralt: Add mtcmos bus protection for display
by build bot (Jenkins) (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Liju-Clr Chen. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73411 ) Change subject: mb/google/geralt: Add mtcmos bus protection for display ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-171370): https://review.coreboot.org/c/coreboot/+/73411/comment/21a037a7_39d899fe PS1, Line 14: BUG=b:264204465 Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/73411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac61a69f2b84966dd468442daaa59d83eec775aa Gerrit-Change-Number: 73411 Gerrit-PatchSet: 1 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 03 Mar 2023 06:06:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: mb/google/geralt: Add NAU8318 support for Geralt
by jason-ch chen (Code Review) 02 Mar '23

02 Mar '23

jason-ch chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73413 ) Change subject: mb/google/geralt: Add NAU8318 support for Geralt ...................................................................... mb/google/geralt: Add NAU8318 support for Geralt Add a config "USE_NAU8318" to enable NAU8318 support. NAU8318 is another speaker used in Geralt. NAU8318 supports beep function via GPIO control. So we configure the GPIO pins and pass them to the payload. BUG=b:250459803 BRANCH=none TEST=Verify beep function through CLI in depthcharge successfully. Change-Id: I21009a20809f398de4628ff0c11bcbd0e7591443 Signed-off-by: Trevor Wu <trevor.wu(a)mediatek.com> --- M src/mainboard/google/geralt/Kconfig M src/mainboard/google/geralt/chromeos.c M src/mainboard/google/geralt/gpio.h 3 files changed, 32 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/73413/1 diff --git a/src/mainboard/google/geralt/Kconfig b/src/mainboard/google/geralt/Kconfig index 197ba48..7c818dc 100644 --- a/src/mainboard/google/geralt/Kconfig +++ b/src/mainboard/google/geralt/Kconfig @@ -69,6 +69,9 @@ config USE_MAX98390 bool "MAX98390" +config USE_NAU8318 + bool "NAU8318" + endchoice endif diff --git a/src/mainboard/google/geralt/chromeos.c b/src/mainboard/google/geralt/chromeos.c index 10fc9d3..ab9f1d6 100644 --- a/src/mainboard/google/geralt/chromeos.c +++ b/src/mainboard/google/geralt/chromeos.c @@ -20,6 +20,7 @@ gpio_output(GPIO_EN_SPKR, 0); gpio_output(GPIO_RST_SPKR_L, 0); gpio_output(GPIO_XHCI_INIT_DONE, 0); + gpio_output(GPIO_BEEP_ON_OD, 0); } void fill_lb_gpios(struct lb_gpios *gpios) @@ -27,7 +28,6 @@ struct lb_gpio chromeos_gpios[] = { {GPIO_EC_AP_INT_ODL.id, ACTIVE_LOW, -1, "EC interrupt"}, {GPIO_GSC_AP_INT_ODL.id, ACTIVE_HIGH, -1, "TPM interrupt"}, - {GPIO_EN_SPKR.id, ACTIVE_HIGH, -1, "speaker enable"}, {GPIO_XHCI_INIT_DONE.id, ACTIVE_HIGH, -1, "XHCI init done"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); @@ -46,6 +46,12 @@ {GPIO_RST_SPKR_L.id, ACTIVE_LOW, -1, "speaker reset"}, }; lb_add_gpios(gpios, max98390_gpios, ARRAY_SIZE(max98390_gpios)); + } else if (CONFIG(USE_NAU8318)) { + struct lb_gpio nau8318_gpios[] = { + {GPIO_EN_SPKR.id, ACTIVE_HIGH, -1, "speaker enable"}, + {GPIO_BEEP_ON_OD.id, ACTIVE_HIGH, -1, "beep enable"}, + }; + lb_add_gpios(gpios, nau8318_gpios, ARRAY_SIZE(nau8318_gpios)); } } diff --git a/src/mainboard/google/geralt/gpio.h b/src/mainboard/google/geralt/gpio.h index 126cfe8..c05b804 100644 --- a/src/mainboard/google/geralt/gpio.h +++ b/src/mainboard/google/geralt/gpio.h @@ -8,9 +8,9 @@ #define GPIO_AP_DISP_BKLTEN GPIO(GPIO01) #define GPIO_AP_EC_WARM_RST_REQ GPIO(DPI_HSYNC) #define GPIO_AP_WP_ODL GPIO(GPIO15) -#define GPIO_BEEP_ON_OD GPIO(I2SIN_WS) +#define GPIO_BEEP_ON_OD GPIO(KPROW0) #define GPIO_EC_AP_INT_ODL GPIO(DPI_DE) -#define GPIO_EN_SPKR GPIO(I2SIN_D2) +#define GPIO_EN_SPKR GPIO(I2SIN_D1) #define GPIO_GSC_AP_INT_ODL GPIO(GPIO00) #define GPIO_RST_SPKR_L GPIO(I2SO2_D1) #define GPIO_XHCI_INIT_DONE GPIO(DPI_CK) -- To view, visit https://review.coreboot.org/c/coreboot/+/73413 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I21009a20809f398de4628ff0c11bcbd0e7591443 Gerrit-Change-Number: 73413 Gerrit-PatchSet: 1 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: mb/google/geralt: Add MAX98390 support for Geralt
by jason-ch chen (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Hung-Te Lin. jason-ch chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/73412 ) Change subject: mb/google/geralt: Add MAX98390 support for Geralt ...................................................................... mb/google/geralt: Add MAX98390 support for Geralt Add a config "USE_MAX98390" to enable MAX98390 support. MAX98390 is an I2S smart amplifier used in Geralt. It is also the default speaker for Geralt reference board. BUG=b:250459803 BRANCH=none TEST=Verify beep function through CLI in depthcharge successfully. Change-Id: I814f440cc5ac2a13404d01fb3baafeec092b1e74 Signed-off-by: Trevor Wu <trevor.wu(a)mediatek.com> --- M src/mainboard/google/geralt/Kconfig M src/mainboard/google/geralt/chromeos.c M src/mainboard/google/geralt/gpio.h M src/mainboard/google/geralt/mainboard.c M src/soc/mediatek/mt8188/include/soc/addressmap.h 5 files changed, 75 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/73412/1 diff --git a/src/mainboard/google/geralt/Kconfig b/src/mainboard/google/geralt/Kconfig index 8de4fea..197ba48 100644 --- a/src/mainboard/google/geralt/Kconfig +++ b/src/mainboard/google/geralt/Kconfig @@ -60,4 +60,15 @@ config SDCARD_INIT bool default y + +choice + + prompt "Speaker AMP for Geralt" + default USE_MAX98390 if BOARD_GOOGLE_GERALT + +config USE_MAX98390 + bool "MAX98390" + +endchoice + endif diff --git a/src/mainboard/google/geralt/chromeos.c b/src/mainboard/google/geralt/chromeos.c index 266fc78..10fc9d3 100644 --- a/src/mainboard/google/geralt/chromeos.c +++ b/src/mainboard/google/geralt/chromeos.c @@ -18,6 +18,7 @@ /* Set up GPOs */ gpio_output(GPIO_AP_EC_WARM_RST_REQ, 0); gpio_output(GPIO_EN_SPKR, 0); + gpio_output(GPIO_RST_SPKR_L, 0); gpio_output(GPIO_XHCI_INIT_DONE, 0); } @@ -39,6 +40,13 @@ }; lb_add_gpios(gpios, sd_card_gpios, ARRAY_SIZE(sd_card_gpios)); } + + if (CONFIG(USE_MAX98390)) { + struct lb_gpio max98390_gpios[] = { + {GPIO_RST_SPKR_L.id, ACTIVE_LOW, -1, "speaker reset"}, + }; + lb_add_gpios(gpios, max98390_gpios, ARRAY_SIZE(max98390_gpios)); + } } int tis_plat_irq_status(void) diff --git a/src/mainboard/google/geralt/gpio.h b/src/mainboard/google/geralt/gpio.h index 36f488e..126cfe8 100644 --- a/src/mainboard/google/geralt/gpio.h +++ b/src/mainboard/google/geralt/gpio.h @@ -12,8 +12,13 @@ #define GPIO_EC_AP_INT_ODL GPIO(DPI_DE) #define GPIO_EN_SPKR GPIO(I2SIN_D2) #define GPIO_GSC_AP_INT_ODL GPIO(GPIO00) +#define GPIO_RST_SPKR_L GPIO(I2SO2_D1) #define GPIO_XHCI_INIT_DONE GPIO(DPI_CK) +#define GPIO_I2SI1_LRCK GPIO(I2SO2_D2) +#define GPIO_I2SI1_BCK GPIO(I2SIN_D3) +#define GPIO_I2SO1_D0 GPIO(GPIO11) + #define GPIO_EDP_BL_PWM_1V8 GPIO(DISP_PWM1) #define GPIO_EDP_HPD_1V8 GPIO(GPIO17) #define GPIO_EN_PP3300_EDP_DISP_X GPIO(DSI1_LCM_RST) diff --git a/src/mainboard/google/geralt/mainboard.c b/src/mainboard/google/geralt/mainboard.c index ee8b005..1422398 100644 --- a/src/mainboard/google/geralt/mainboard.c +++ b/src/mainboard/google/geralt/mainboard.c @@ -3,13 +3,42 @@ #include <bootmode.h> #include <device/device.h> #include <soc/bl31.h> +#include <soc/i2c.h> #include <soc/msdc.h> #include <soc/mt6359p.h> +#include <soc/mtcmos.h> #include <soc/usb.h> #include "display.h" #include "gpio.h" +#define AFE_SE_SECURE_CON (AUDIO_BASE + 0x17a8) + +static void configure_i2s(void) +{ + /* Audio PWR */ + mtcmos_audio_power_on(); + mtcmos_protect_audio_bus(); + + /* Switch to normal mode */ + write32p(AFE_SE_SECURE_CON, 0x0); + + /* SoC I2S */ + gpio_set_mode(GPIO_I2SI1_LRCK, PAD_I2SO2_D2_FUNC_TDMIN_LRCK); + gpio_set_mode(GPIO_I2SI1_BCK, PAD_I2SIN_D3_FUNC_TDMIN_BCK); + gpio_set_mode(GPIO_I2SO1_D0, PAD_GPIO11_FUNC_I2SO1_D0); +} + +static void configure_audio(void) +{ + if (CONFIG(USE_MAX98390)) { + printk(BIOS_DEBUG, "Configure MAX98390 audio\n"); + + mtk_i2c_bus_init(I2C0, I2C_SPEED_FAST); + configure_i2s(); + } +} + static void mainboard_init(struct device *dev) { mt6359p_init_pmif_arb(); @@ -23,6 +52,8 @@ mtk_msdc_configure_emmc(true); + configure_audio(); + if (CONFIG(SDCARD_INIT)) mtk_msdc_configure_sdcard(); diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h index a5a3c00..63f0596 100644 --- a/src/soc/mediatek/mt8188/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h @@ -57,6 +57,7 @@ DPM_PM_SRAM_BASE2 = IO_PHYS + 0x00A00000, DPM_DM_SRAM_BASE2 = IO_PHYS + 0x00A20000, DPM_CFG_BASE2 = IO_PHYS + 0x00A40000, + AUDIO_BASE = IO_PHYS + 0x00B10000, UART0_BASE = IO_PHYS + 0x01001100, UART1_BASE = IO_PHYS + 0x01001200, UART2_BASE = IO_PHYS + 0x01001300, -- To view, visit https://review.coreboot.org/c/coreboot/+/73412 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I814f440cc5ac2a13404d01fb3baafeec092b1e74 Gerrit-Change-Number: 73412 Gerrit-PatchSet: 1 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: mb/google/geralt: Add mtcmos bus protection for display
by jason-ch chen (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Liju-Clr Chen. Hello Liju-Clr Chen, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/73411 to review the following change. Change subject: mb/google/geralt: Add mtcmos bus protection for display ...................................................................... mb/google/geralt: Add mtcmos bus protection for display Bus protection is a HW mechanism to avoid bus hang and incomplete bus transactions. Add mtcmos bus protection for display to enable Bus protection HW while the receiver of the transactin is not able to respond. BUG=b:264204465 TEST=test firmware and kernel display pass for MIPI panel on proto board. Change-Id: Iac61a69f2b84966dd468442daaa59d83eec775aa Signed-off-by: Liju-Clr Chen <liju-clr.chen(a)mediatek.com> --- M src/mainboard/google/geralt/display.c 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/73411/1 diff --git a/src/mainboard/google/geralt/display.c b/src/mainboard/google/geralt/display.c index 396d6e0..bbdd808 100644 --- a/src/mainboard/google/geralt/display.c +++ b/src/mainboard/google/geralt/display.c @@ -27,6 +27,7 @@ printk(BIOS_INFO, "%s: Starting display initialization\n", __func__); mtcmos_display_power_on(); + mtcmos_protect_display_bus(); panel->configure_panel_backlight(); panel->power_on(); -- To view, visit https://review.coreboot.org/c/coreboot/+/73411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac61a69f2b84966dd468442daaa59d83eec775aa Gerrit-Change-Number: 73411 Gerrit-PatchSet: 1 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Liju-Clr Chen <liju-clr.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex
by Jay Patel (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Tarun Tuli, Jamie Ryu, Subrata Banik, Wonkyu Kim, Kapil Porwal. Hello Bora Guvendik, Hannah Williams, build bot (Jenkins), Tarun Tuli, Jamie Ryu, Subrata Banik, Wonkyu Kim, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73192 to look at the new patch set (#5). Change subject: mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex ...................................................................... mainboard/google/rex/Kconfig: Enable EC boot timestamps for mtl-rex Enables feature to record pre-reset boot time using EC boot timestamps. BUG=b:271012752 TEST=Pre-reset boot timestamps added to the timestamp table, verified using cbmem -t Signed-off-by: jaypatel256 <jay2.patel(a)intel.com> Change-Id: Id0b773fb4c7abfcb3c3ab061d970327987536fb2 --- M src/mainboard/google/rex/Kconfig 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/73192/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/73192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0b773fb4c7abfcb3c3ab061d970327987536fb2 Gerrit-Change-Number: 73192 Gerrit-PatchSet: 5 Gerrit-Owner: Jay Patel <jay2.patel(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: soc/intel/mtl/romstage: Insert EC boot timestamps
by Jay Patel (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Bora Guvendik, Hannah Williams, Jamie Ryu, Subrata Banik, Wonkyu Kim, Kapil Porwal, Jay Patel. Hello Bora Guvendik, Hannah Williams, build bot (Jenkins), Tarun Tuli, Jamie Ryu, Subrata Banik, Wonkyu Kim, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/73191 to look at the new patch set (#5). Change subject: soc/intel/mtl/romstage: Insert EC boot timestamps ...................................................................... soc/intel/mtl/romstage: Insert EC boot timestamps Calls the function to insert EC boot timestamps to the coreboot timestamp table for Meteorlake SOC based on Kconfig flag SOC_INTEL_EC_BOOT_TIMESTAMPS. BUG=b:271012752 TEST=None Signed-off-by: jaypatel256 <jay2.patel(a)intel.com> Change-Id: Iebda928a31d55a081f68b9833b66f757a9cd9aa7 --- M src/soc/intel/meteorlake/romstage/romstage.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/73191/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/73191 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iebda928a31d55a081f68b9833b66f757a9cd9aa7 Gerrit-Change-Number: 73191 Gerrit-PatchSet: 5 Gerrit-Owner: Jay Patel <jay2.patel(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Jay Patel <jay2.patel(a)intel.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: lint/lint-stable-003-whitespace: Fix excludelist
by Elyes Haouas (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Martin L Roth, Maximilian Brune. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73396 ) Change subject: lint/lint-stable-003-whitespace: Fix excludelist ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/73396 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90cc2cff9a98bbd0af344156332b970bfd6430b9 Gerrit-Change-Number: 73396 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Fri, 03 Mar 2023 04:54:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in blobs[master]: soc/mediatek/mt8188: Add scramble switch and fix 1RK register bit
by Xixi Chen (Code Review) 02 Mar '23

02 Mar '23

Xixi Chen has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/73339 ) Change subject: soc/mediatek/mt8188: Add scramble switch and fix 1RK register bit ...................................................................... Patch Set 5: (1 comment) File soc/mediatek/mt8188/dram_release_notes.txt: https://review.coreboot.org/c/blobs/+/73339/comment/e6601a10_2712d255 PS5, Line 1: # 0.1.1 > Next time please use the official build. See https://review.coreboot. […] okay. -- To view, visit https://review.coreboot.org/c/blobs/+/73339 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: master Gerrit-Change-Id: I7bf751e19d6df32bbd40b9dacad16fb99253d2ae Gerrit-Change-Number: 73339 Gerrit-PatchSet: 5 Gerrit-Owner: Xixi Chen <xixi.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: johnson wang <johnson.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Fri, 03 Mar 2023 03:39:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/mediatek/mt8188: Add bus protection for audio/video mtcmos
by Yidi Lin (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Hung-Te Lin, jason-ch chen. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73375 ) Change subject: soc/mediatek/mt8188: Add bus protection for audio/video mtcmos ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73375 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14aa63c4934073a14552cef64f40657d0197bbe1 Gerrit-Change-Number: 73375 Gerrit-PatchSet: 3 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Comment-Date: Fri, 03 Mar 2023 03:34:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/mediatek/mt8188: Add bus protection for audio/video mtcmos
by Rex-BC Chen (Code Review) 02 Mar '23

02 Mar '23

Attention is currently required from: Hung-Te Lin, jason-ch chen, Yidi Lin. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73375 ) Change subject: soc/mediatek/mt8188: Add bus protection for audio/video mtcmos ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/73375 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14aa63c4934073a14552cef64f40657d0197bbe1 Gerrit-Change-Number: 73375 Gerrit-PatchSet: 3 Gerrit-Owner: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: jason-ch chen <Jason-ch.Chen(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 03 Mar 2023 03:31:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2023