coreboot-gerrit October 2023

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[L] Change in coreboot[main]: [RFC] drivers/option: Add option list in cbtables
by Patrick Rudolph (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Kyösti Mälkki, Lean Sheng Tan, Maximilian Brune, Nico Huber, Sean Rhodes. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74121?usp=email ) Change subject: [RFC] drivers/option: Add option list in cbtables ...................................................................... Patch Set 14: (6 comments) File src/drivers/option/cfr.c: https://review.coreboot.org/c/coreboot/+/74121/comment/43e1dae7_e3559354 : PS12, Line 36: cfr_str->data_length = strlen(string) + 1; > Do we need to limit the string length? Why? https://review.coreboot.org/c/coreboot/+/74121/comment/2e4685ee_3d39afd9 : PS12, Line 37: memcpy(cfr_str->data, string, cfr_str->data_length); > This assumes memory from current is initialized also for the padded bytes that we skip filling with […] Done https://review.coreboot.org/c/coreboot/+/74121/comment/9f771413_67c3db92 : PS12, Line 60: return 0; > What makes the helptext special to have this test? Done https://review.coreboot.org/c/coreboot/+/74121/comment/16df0b9c_bc781eb5 : PS12, Line 97: current += sm_write_ui_helptext(current, ui_helptext); > Hitting assert() with opt_name and ui_name being NULL seems a bit strong for the purpose, specially […] Done File src/drivers/option/cfr.c: https://review.coreboot.org/c/coreboot/+/74121/comment/433d62e1_046ad753 : PS13, Line 230: if (sm_obj->ctor) { > If a dependency evaluates as 0 or does not resolve due to OPTFLAG_SUPPRESS, should this be evaluated […] Removed special handling of OPTFLAG_SUPPRESS. Payload will take care of it. https://review.coreboot.org/c/coreboot/+/74121/comment/11ab8bb3_bf3d6976 : PS13, Line 242: if (sm_obj->sm_enum.flags & CFR_OPTFLAG_SUPPRESS) > If an object is referenced as a dependency, is it allowed for it's constructor function to set the S […] Dropped this code. The question remains what the payload should do when the dependency is SUPPRESSED, but the refereced variable reads as true. -- To view, visit https://review.coreboot.org/c/coreboot/+/74121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 14 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 06 Oct 2023 10:04:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: [WIP]sb/intel/i82801ix: Support CFR
by Patrick Rudolph (Code Review) 06 Oct '23

06 Oct '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78283?usp=email ) Change subject: [WIP]sb/intel/i82801ix: Support CFR ...................................................................... [WIP]sb/intel/i82801ix: Support CFR Change-Id: I83ee5b67a0caf4edea7b45b5bb2b514c13a9c034 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/southbridge/intel/i82801ix/Makefile.inc A src/southbridge/intel/i82801ix/cfr.c 2 files changed, 59 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/78283/1 diff --git a/src/southbridge/intel/i82801ix/Makefile.inc b/src/southbridge/intel/i82801ix/Makefile.inc index 8db30ad..8c53a95 100644 --- a/src/southbridge/intel/i82801ix/Makefile.inc +++ b/src/southbridge/intel/i82801ix/Makefile.inc @@ -19,6 +19,7 @@ ramstage-y += thermal.c ramstage-y += usb_ehci.c ramstage-y += ../common/pciehp.c +ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c smm-y += smihandler.c diff --git a/src/southbridge/intel/i82801ix/cfr.c b/src/southbridge/intel/i82801ix/cfr.c new file mode 100644 index 0000000..a7cd947 --- /dev/null +++ b/src/southbridge/intel/i82801ix/cfr.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <drivers/option/cfr.h> +#include <inttypes.h> +#include <types.h> +#include <device/pci_ops.h> + +#include "i82801ix.h" + +static const struct sm_enum_value sata_values[] = { + { "AHCI", 0}, + { "IDE", 1}, + SM_ENUM_VALUE_END, +}; + +static struct sm_object sata_mode = SM_DECLARE_ENUM({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "sata_mode", + .ui_name = "SATA controller mode", + .ui_helptext = "Configure SATA controller in IDE or AHCI mode.\n" + "Select IDE if your OS doesn't support AHCI.", + .default_value = 0, + .values = sata_values, +}); + +static const struct sm_enum_value power_values[] = { + { "Off", MAINBOARD_POWER_OFF}, + { "On", MAINBOARD_POWER_ON}, + { "Previous Powerstate", MAINBOARD_POWER_KEEP}, + SM_ENUM_VALUE_END, +}; + +static struct sm_object power_on_after_fail = SM_DECLARE_ENUM({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "power_on_after_fail", + .ui_name = "Behaviour after power loss", + .ui_helptext = "The new power state after AC power has been restored.", + .default_value = 0, + .values = power_values, +}); + +static struct sm_object nmi = SM_DECLARE_BOOL({ + .flags = CFR_OPTFLAG_RUNTIME, + .opt_name = "nmi", + .ui_name = "Enable NMI", + .ui_helptext = NULL, + .default_value = false, +}); + +static __cfr_form struct sm_obj_form southbridge = { + .ui_name = "Southbridge", + .obj_list = { + &power_on_after_fail, + &nmi, + &sata_mode, + NULL + }, +}; \ No newline at end of file -- To view, visit https://review.coreboot.org/c/coreboot/+/78283?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I83ee5b67a0caf4edea7b45b5bb2b514c13a9c034 Gerrit-Change-Number: 78283 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: [WIP]nb/intel/sandybridge: Add CFR
by Patrick Rudolph (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: Angel Pons. Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78242?usp=email ) Change subject: [WIP]nb/intel/sandybridge: Add CFR ...................................................................... [WIP]nb/intel/sandybridge: Add CFR Change-Id: I890a2152cc3b1eaaab5e16ba11c4e353f6140264 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/northbridge/intel/sandybridge/Makefile.inc A src/northbridge/intel/sandybridge/cfr.c M src/northbridge/intel/sandybridge/northbridge.c 3 files changed, 82 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/78242/1 diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 36fc16b..70d8be7 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -8,6 +8,7 @@ ramstage-y += northbridge.c ramstage-y += pcie.c ramstage-y += gma.c +ramstage-$(CONFIG_DRIVERS_OPTION_CFR) += cfr.c ramstage-y += acpi.c diff --git a/src/northbridge/intel/sandybridge/cfr.c b/src/northbridge/intel/sandybridge/cfr.c new file mode 100644 index 0000000..d29fe18 --- /dev/null +++ b/src/northbridge/intel/sandybridge/cfr.c @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <drivers/option/cfr.h> +#include <inttypes.h> +#include <types.h> +#include <device/pci_ops.h> + +static void update_state(const struct sm_object *obj, struct sm_object *new); + +static struct sm_object nb_peg12_enabled = SM_DECLARE_BOOL({ + .opt_name = "nb_peg12_enabled", + .ui_name = "Enable PCI Express Graphics (PEG12)", + .ui_helptext = "Enable/Disable PCI device 0:01.2 (4 lanes)", + .default_value = true, +}, WITH_CALLBACK(update_state)); + +static struct sm_object nb_peg11_enabled = SM_DECLARE_BOOL({ + .opt_name = "nb_peg11_enabled", + .ui_name = "Enable PCI Express Graphics (PEG11)", + .ui_helptext = "Enable/Disable PCI device 00:01.1 (8 lanes)", + .default_value = true, +}, WITH_CALLBACK(update_state)); + +static struct sm_object nb_peg10_enabled = SM_DECLARE_BOOL({ + .opt_name = "nb_peg10_enabled", + .ui_name = "Enable PCI Express Graphics (PEG10)", + .ui_helptext = "Enable/Disable PCI device 00:01.0 (16 lanes)", + .default_value = true, +}, WITH_CALLBACK(update_state)); + +static struct sm_object nb_peg60_enabled = SM_DECLARE_BOOL({ + .opt_name = "nb_peg60_enabled", + .ui_name = "Enable PCI Express Graphics (PEG60)", + .ui_helptext = "Enable/Disable PCI device 00:06.0", + .default_value = true, +}, WITH_CALLBACK(update_state)); + +static struct sm_object nb_igd_enabled = SM_DECLARE_BOOL({ + .opt_name = "nb_igd_enabled", + .ui_name = "Enable Integrated Graphics (IGD)", + .ui_helptext = "Enable/Disable PCI device 00:02.0", + .default_value = true, +}, WITH_CALLBACK(update_state)); + +static void update_state(const struct sm_object *obj, struct sm_object *new) +{ + struct device *dev; + + if (obj == &nb_peg12_enabled) + dev = pcidev_on_root(1, 2); + else if (obj == &nb_peg11_enabled) + dev = pcidev_on_root(1, 1); + else if (obj == &nb_peg10_enabled) + dev = pcidev_on_root(1, 0); + else if (obj == &nb_peg60_enabled) + dev = pcidev_on_root(6, 0); + else if (obj == &nb_igd_enabled) + dev = pcidev_on_root(2, 0); + else + dev = NULL; + new->sm_bool.flags = (!dev || !dev->enabled) ? CFR_OPTFLAG_GRAYOUT : 0; +} + +static __cfr_form struct sm_obj_form main = { + .ui_name = "Northbridge", + .obj_list = { + &nb_peg12_enabled, + &nb_peg11_enabled, + &nb_peg10_enabled, + &nb_peg60_enabled, + &nb_igd_enabled, + NULL + }, +}; \ No newline at end of file diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index ee4ddc5..38598e2 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -12,6 +12,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <option.h> #include <types.h> #include "chip.h" #include "sandybridge.h" @@ -267,32 +268,32 @@ reg = pci_read_config32(dev, DEVEN); dev = pcidev_on_root(1, 2); - if (!dev || !dev->enabled) { + if (!dev || !dev->enabled || !get_uint_option("nb_peg12_enabled", 1)) { printk(BIOS_DEBUG, "Disabling PEG12.\n"); reg &= ~DEVEN_PEG12; } dev = pcidev_on_root(1, 1); - if (!dev || !dev->enabled) { + if (!dev || !dev->enabled || !get_uint_option("nb_peg11_enabled", 1)) { printk(BIOS_DEBUG, "Disabling PEG11.\n"); reg &= ~DEVEN_PEG11; } dev = pcidev_on_root(1, 0); - if (!dev || !dev->enabled) { + if (!dev || !dev->enabled || !get_uint_option("nb_peg10_enabled", 1)) { printk(BIOS_DEBUG, "Disabling PEG10.\n"); reg &= ~DEVEN_PEG10; } dev = pcidev_on_root(2, 0); - if (!dev || !dev->enabled) { + if (!dev || !dev->enabled || !get_uint_option("nb_igd_enabled", 1)) { printk(BIOS_DEBUG, "Disabling IGD.\n"); reg &= ~DEVEN_IGD; } dev = pcidev_on_root(4, 0); - if (!dev || !dev->enabled) { + if (!dev || !dev->enabled ) { printk(BIOS_DEBUG, "Disabling Device 4.\n"); reg &= ~DEVEN_D4EN; } dev = pcidev_on_root(6, 0); - if (!dev || !dev->enabled) { + if (!dev || !dev->enabled || !get_uint_option("nb_peg60_enabled", 1)) { printk(BIOS_DEBUG, "Disabling PEG60.\n"); reg &= ~DEVEN_PEG60; } -- To view, visit https://review.coreboot.org/c/coreboot/+/78242?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I890a2152cc3b1eaaab5e16ba11c4e353f6140264 Gerrit-Change-Number: 78242 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: configs: Build test CFR for lenovo devices
by Patrick Rudolph (Code Review) 06 Oct '23

06 Oct '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78241?usp=email ) Change subject: configs: Build test CFR for lenovo devices ...................................................................... configs: Build test CFR for lenovo devices Change-Id: Ibf9c1da3db3fb468fe4d21d7e74dc9fbd41c2763 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/78241/1 diff --git a/configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs b/configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs index 752e37f..4629aa7 100644 --- a/configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs +++ b/configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs @@ -3,3 +3,4 @@ CONFIG_CBFS_SIZE=0x200000 CONFIG_BOARD_LENOVO_X220=y CONFIG_DEBUG_TPM=y +CONFIG_DRIVERS_OPTION_CFR_ENABLED=y -- To view, visit https://review.coreboot.org/c/coreboot/+/78241?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibf9c1da3db3fb468fe4d21d7e74dc9fbd41c2763 Gerrit-Change-Number: 78241 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: [WIP]drivers/option/cfr: Collect CFR forms generated at compile time
by Patrick Rudolph (Code Review) 06 Oct '23

06 Oct '23

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78240?usp=email ) Change subject: [WIP]drivers/option/cfr: Collect CFR forms generated at compile time ...................................................................... [WIP]drivers/option/cfr: Collect CFR forms generated at compile time Add CFR forms not passed as argument, but those present in ramstage. Change-Id: Ia5bcc42b5098a019bdf1c28cb5ebdfba2a3ff3f0 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/option/cfr.c M src/drivers/option/cfr.h M src/lib/program.ld 3 files changed, 25 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/78240/1 diff --git a/src/drivers/option/cfr.c b/src/drivers/option/cfr.c index 4803116..c3e1aab 100644 --- a/src/drivers/option/cfr.c +++ b/src/drivers/option/cfr.c @@ -301,8 +301,10 @@ void cfr_write_setup_menu(struct lb_cfr *cfr_root, struct sm_obj_form *sm_root[]) { - size_t i = 0; void *current = cfr_root; + struct sm_object *obj; + size_t i = 0; + assert(sm_root); assert(cfr_root); @@ -313,6 +315,12 @@ while (sm_root[i]) current += sm_write_form(current, sm_root[i++], 0, 0); + /* + * Add generic forms. + */ + for (obj = &_cfr_forms[0]; obj != &_ecfr_forms[0]; obj++) + current += sm_write_form(current, &obj->sm_form, 0, 0); + cfr_root->size = cfr_record_size((char *)cfr_root, current); cfr_root->checksum = CRC(cfr_root + 1, cfr_root->size - sizeof(*cfr_root), crc32_byte); diff --git a/src/drivers/option/cfr.h b/src/drivers/option/cfr.h index 93bc96c..8550574 100644 --- a/src/drivers/option/cfr.h +++ b/src/drivers/option/cfr.h @@ -99,4 +99,15 @@ void cfr_write_setup_menu(struct lb_cfr *cfr_root, struct sm_obj_form *sm_root[]); +#if ENV_RAMSTAGE +#define __cfr_form const __attribute__((used, __section__(".rodata.cfr_forms"))) +#else +#define __cfr_form const __attribute__((unused)) +#endif + +/** start of compile time generated cfr form array */ +extern struct sm_object _cfr_forms[]; +/** end of compile time generated cfr form array */ +extern struct sm_object _ecfr_forms[]; + #endif /* DRIVERS_OPTION_CFR_H */ diff --git a/src/lib/program.ld b/src/lib/program.ld index f406f9f..7db3015 100644 --- a/src/lib/program.ld +++ b/src/lib/program.ld @@ -50,6 +50,11 @@ KEEP(*(.rodata.cpu_driver)); _ecpu_drivers = .; RECORD_SIZE(cpu_drivers) + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); + _cfr_forms = .; + KEEP(*(.rodata.cfr_forms)); + _ecfr_forms = .; + RECORD_SIZE(cfr_forms) #endif . = ALIGN(ARCH_POINTER_ALIGN_SIZE); -- To view, visit https://review.coreboot.org/c/coreboot/+/78240?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5bcc42b5098a019bdf1c28cb5ebdfba2a3ff3f0 Gerrit-Change-Number: 78240 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[main]: [RFC] drivers/option: Add option list in cbtables
by Patrick Rudolph (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: Angel Pons, Benjamin Doron, Lean Sheng Tan, Maximilian Brune, Nico Huber, Patrick Rudolph, Sean Rhodes. Patrick Rudolph has uploaded a new patch set (#14) to the change originally created by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/74121?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: [RFC] drivers/option: Add option list in cbtables ...................................................................... [RFC] drivers/option: Add option list in cbtables TODO: add proper documentation, add tests. Introduce a mechanism so that coreboot can provide a list of options to post-coreboot code. This can be used to let payloads know which options should be displayed in a setup menu, for instance. Although this system was written to be used with edk2, it has been designed with flexibility in mind so that other payloads can also make use of this mechanism. The system currently lacks a way to describe where to find option values. This information is stored in a set of data structures specifically created for this purpose. This format is known as CFR, which means "coreboot forms representation" or "cursed forms representation". Although the "forms representation" is borrowed from UEFI, CFR can be used in non-UEFI scenarios as well. The data structures are implemented as an extension of cbtables records to support nesting. It should not break backwards compatibility because the CFR root record (LB_TAG_CFR_ROOT) size includes all of its children records. The concept of record nesting is borrowed from the records for CMOS options. It is not possible to reuse the CMOS records because they are too closely coupled with CMOS options; using these structures would needlessly restrict more capable backends to what can be done with CMOS options, which is undesired. Because CFR supports variable-length components, directly transforming options into CFR structures is not a trivial process. Furthermore, CFR structures need to be written in one go. Because of this, abstractions exist to generate CFR structures from a set of "setup menu" structures that are coreboot-specific and could be integrated with the devicetree at some point. Note that `struct sm_object` is a tagged union. This is used to have lists of options in an array, as building linked lists of options at runtime is extremely impractical because options would have to be added at the end of the linked list to maintain option order. To avoid mistakes defining `struct sm_object` values, helper macros exist for supported option types. The macros also provide some type checking as they initialise specific union members. It should be possible to extend CFR to support additional functionality such as being able to describe dependencies between options, or support for more sophisticated options like fan curve points. However, this may require having a version field in the CFR root record to avoid problems with CFR consumers that do not support these extensions. Feedback about this is highly appreciated. Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- A src/drivers/option/Kconfig A src/drivers/option/Makefile.inc A src/drivers/option/cfr.c A src/drivers/option/cfr.h 4 files changed, 433 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/74121/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/74121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I304de7d26d79245a2e31a6d01f6c5643b31cb772 Gerrit-Change-Number: 74121 Gerrit-PatchSet: 14 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Maslowski <info(a)orangecms.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: ec/starlabs/merlin/ite: Adjust the mirror flag handling
by Sean Rhodes (Code Review) 06 Oct '23

06 Oct '23

Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78200?usp=email ) Change subject: ec/starlabs/merlin/ite: Adjust the mirror flag handling ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/78200?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I973c1ecd59f32d3353ca392769b44aadf5fcc9c3 Gerrit-Change-Number: 78200 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 06 Oct 2023 10:02:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/rex/var/karis: Add THERMAL_SOLUTION field in fw_config
by Tyler Wang (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: David Wu, Eran Mitrani, Kapil Porwal, Subrata Banik, Tarun, YH Lin. Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78216?usp=email ) Change subject: mb/google/rex/var/karis: Add THERMAL_SOLUTION field in fw_config ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > > THERMAL_SOLUTION just reserved for different thermal settings in the future. […] OK, I will modify it. Sorry to make you confuse. -- To view, visit https://review.coreboot.org/c/coreboot/+/78216?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id69ec67202b5d769cd3a9a68344a6d8913ebd78b Gerrit-Change-Number: 78216 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 06 Oct 2023 09:58:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/rex/var/karis: Add THERMAL_SOLUTION field in fw_config
by Subrata Banik (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: David Wu, Eran Mitrani, Kapil Porwal, Tarun, Tyler Wang, YH Lin. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78216?usp=email ) Change subject: mb/google/rex/var/karis: Add THERMAL_SOLUTION field in fw_config ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > THERMAL_SOLUTION just reserved for different thermal settings in the future. For example, different fan settings. can u please mention FAN settings rather thermal? i read thermal as heatsnik and other glues. -- To view, visit https://review.coreboot.org/c/coreboot/+/78216?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id69ec67202b5d769cd3a9a68344a6d8913ebd78b Gerrit-Change-Number: 78216 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 06 Oct 2023 09:53:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/rex/var/karis: Add THERMAL_SOLUTION field in fw_config
by Tyler Wang (Code Review) 06 Oct '23

06 Oct '23

Attention is currently required from: David Wu, Eran Mitrani, Kapil Porwal, Subrata Banik, Tarun, YH Lin. Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78216?usp=email ) Change subject: mb/google/rex/var/karis: Add THERMAL_SOLUTION field in fw_config ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > can you please help me to understand what does different thermal sol means? THERMAL_SOLUTION just reserved for different thermal settings in the future. For example, different fan settings. -- To view, visit https://review.coreboot.org/c/coreboot/+/78216?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id69ec67202b5d769cd3a9a68344a6d8913ebd78b Gerrit-Change-Number: 78216 Gerrit-PatchSet: 1 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 06 Oct 2023 09:44:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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