coreboot-gerrit October 2023

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: mb/google/brox: Create new Brox baseboard
by Nick Vaccaro (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Paul Menzel, Shelley Chen. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78009?usp=email ) Change subject: mb/google/brox: Create new Brox baseboard ...................................................................... Patch Set 13: (1 comment) File src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb: https://review.coreboot.org/c/coreboot/+/78009/comment/9a65282c_589b7d70 : PS11, Line 76: disable_c1_state_auto_demotion > I don't know so I deleted it :). Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/78009?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I929b465646ac4c69d4bab33ce23848c7b1fa0f98 Gerrit-Change-Number: 78009 Gerrit-PatchSet: 13 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 13 Oct 2023 00:01:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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[XL] Change in coreboot[main]: mb/google/brox: Create new Brox baseboard
by Nick Vaccaro (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Paul Menzel, Shelley Chen. Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78009?usp=email ) Change subject: mb/google/brox: Create new Brox baseboard ...................................................................... Patch Set 13: Code-Review+2 (1 comment) File src/mainboard/google/brox/chromeos.fmd: https://review.coreboot.org/c/coreboot/+/78009/comment/d6be3068_77963499 : PS11, Line 39: ADL > So.... […] JFYI, Brask is an ADL baseboard. There may be some brask variants that have opted in to using converged firmware to support an RPL-based sku, but the brask baseboard definition and the brask reference board itself is ADL. -- To view, visit https://review.coreboot.org/c/coreboot/+/78009?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I929b465646ac4c69d4bab33ce23848c7b1fa0f98 Gerrit-Change-Number: 78009 Gerrit-PatchSet: 13 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 13 Oct 2023 00:01:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6430 (Ivy Bridge)
by Nicholas Chin (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Nicholas Chin, Paul Menzel. Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77444?usp=email to look at the new patch set (#6). Change subject: mb/dell: Add Latitude E6430 (Ivy Bridge) ...................................................................... mb/dell: Add Latitude E6430 (Ivy Bridge) Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested. This is based on the autoport output with some manual tweaks. The flash is 8MiB + 4MiB, and is fairly easily accessed by removing the keyboard. It can also be internally flashed by sending a command to the EC, which causes the EC to pull the FDO pin low and the firmware to skip setting up any chipset based write protections. [1] The EC is the SMSC MEC5055, which seems to be compatible with the existing MEC5035 code. Working: - Libgfxinit - USB EHCI debug (left side usb port is HCD index 2, middle port on the right side is HCD index 1) - Keyboard - Touchpad/trackpoint - ExpressCard - Audio - Ethernet - SD card reader - mPCIe WiFi - SeaBIOS 1.16.2 - edk2 (MrChromebox' fork, uefipayload_202306) - Internal flashing Not working: - S3 suspend: It seems like the EC also controls the DRAM reset gate so there may be a command that needs to be implemented for this - Physical Wireless switch - Battery reporting - Brightness hotkeys Unknown/untested: - Dock - eSATA - TPM - dGPU on non-UMA model [1] https://gitlab.com/nic3-14159/dell-flash-unlock Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- A src/mainboard/dell/e6430/Kconfig A src/mainboard/dell/e6430/Kconfig.name A src/mainboard/dell/e6430/Makefile.inc A src/mainboard/dell/e6430/acpi/ec.asl A src/mainboard/dell/e6430/acpi/platform.asl A src/mainboard/dell/e6430/acpi/superio.asl A src/mainboard/dell/e6430/acpi_tables.c A src/mainboard/dell/e6430/board_info.txt A src/mainboard/dell/e6430/cmos.default A src/mainboard/dell/e6430/cmos.layout A src/mainboard/dell/e6430/data.vbt A src/mainboard/dell/e6430/devicetree.cb A src/mainboard/dell/e6430/dsdt.asl A src/mainboard/dell/e6430/early_init.c A src/mainboard/dell/e6430/gma-mainboard.ads A src/mainboard/dell/e6430/gpio.c A src/mainboard/dell/e6430/hda_verb.c A src/mainboard/dell/e6430/mainboard.c 18 files changed, 589 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/77444/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/77444?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908 Gerrit-Change-Number: 77444 Gerrit-PatchSet: 6 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Iru Cai <mytbk920423(a)gmail.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: util/scripts: Add a script to find new users' commits on gerrit
by Nicholas Chin (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Martin L Roth. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78184?usp=email ) Change subject: util/scripts: Add a script to find new users' commits on gerrit ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78184?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic698798f3fddc77900c8c4e6f8427991bda3f2d1 Gerrit-Change-Number: 78184 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 12 Oct 2023 23:34:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: ec/google/chromeec: Add read_battery_status to get dynamic battery flags
by Caveh Jalali (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Boris Mittelberg, Brandon Breitenstein, Hannah Williams, Jamie Ryu, Kapil Porwal, Sukumar Ghorai. Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78321?usp=email ) Change subject: ec/google/chromeec: Add read_battery_status to get dynamic battery flags ...................................................................... Patch Set 4: (1 comment) File src/ec/google/chromeec/ec.c: https://review.coreboot.org/c/coreboot/+/78321/comment/4c7436d0_7d5d3a10 : PS4, Line 1543: if (ec_cmd_battery_get_dynamic(PLAT_EC, &dynamic_p, &dynamic_r) != 0) > We only care if the Battery is cutoff right? If the battery is in low battery state it would still r […] if this host command fails, we got bigger problems... and we haven't found out anything about the battery. -- To view, visit https://review.coreboot.org/c/coreboot/+/78321?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib38be55bc42559bab4f12d5e8580ddc3e1a6acc1 Gerrit-Change-Number: 78321 Gerrit-PatchSet: 4 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Thu, 12 Oct 2023 23:21:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/genoa/include/data_fabric: add VGA decode enable register
by Felix Held (Code Review) 13 Oct '23

13 Oct '23

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78319?usp=email ) Change subject: soc/amd/genoa/include/data_fabric: add VGA decode enable register ...................................................................... soc/amd/genoa/include/data_fabric: add VGA decode enable register Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Iaf4a1fd61ad1d545b1ea0ab3fcf6c7a3d0260cd0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78319 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/soc/amd/genoa/include/soc/data_fabric.h 1 file changed, 14 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Varshit Pandya: Looks good to me, approved diff --git a/src/soc/amd/genoa/include/soc/data_fabric.h b/src/soc/amd/genoa/include/soc/data_fabric.h index 6388926..02c639a 100644 --- a/src/soc/amd/genoa/include/soc/data_fabric.h +++ b/src/soc/amd/genoa/include/soc/data_fabric.h @@ -6,6 +6,20 @@ #include <amdblocks/data_fabric_defs.h> #include <types.h> +#define DF_VGA_EN DF_REG_ID(0, 0xc08) + +union df_vga_en { + struct { + uint32_t ve : 1; /* [ 0.. 0] */ + uint32_t np : 1; /* [ 1.. 1] */ + uint32_t cpu_dis : 1; /* [ 2.. 2] */ + uint32_t : 1; /* [ 3.. 3] */ + uint32_t dst_fabric_id : 12; /* [ 4..15] */ + uint32_t : 16; /* [16..31] */ + }; + uint32_t raw; +}; + #define DF_PCI_CFG_BASE0 DF_REG_ID(0, 0xc80) #define DF_PCI_CFG_LIMIT0 DF_REG_ID(0, 0xc84) -- To view, visit https://review.coreboot.org/c/coreboot/+/78319?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaf4a1fd61ad1d545b1ea0ab3fcf6c7a3d0260cd0 Gerrit-Change-Number: 78319 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: x86: Add ramstage CBFS cache support
by Jérémy Compostella (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Arthur Heymans, Julius Werner, Karthik Ramasubramanian, Maximilian Brune, Raul Rangel. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77885?usp=email ) Change subject: x86: Add ramstage CBFS cache support ...................................................................... Patch Set 24: (2 comments) Patchset: PS14: > I like `CONFIG_CBFS_CACHE_IN_BSS`. […] Done Patchset: PS24: Sorry, I have been quite busy these last two weeks and could not get back to these patches. Thank you for all the comments and suggestion, I really appreciate it. I settled on an extra `POSTRAM_CBFS_CACHE_IN_BSS` to ecxlude AMD NONCAR cases as it seems to be the consensus. I am also not making the `CACHE_CACHE` mandatory in this commit and moved that to a subsequent patch as it is unrelated to offering the ramstage CBFS cache support. We have a few patches which could take advantage of x86 CBFS cache support so I would appreciate if we could review and land these patches soon. Thank you. -- To view, visit https://review.coreboot.org/c/coreboot/+/77885?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7fbb1b51cda9f84842992e365b16c5ced1010b89 Gerrit-Change-Number: 77885 Gerrit-PatchSet: 24 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 12 Oct 2023 23:10:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: x86: Add ramstage CBFS cache support
by Jérémy Compostella (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Arthur Heymans, Julius Werner, Karthik Ramasubramanian, Maximilian Brune. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77885?usp=email to look at the new patch set (#24). Change subject: x86: Add ramstage CBFS cache support ...................................................................... x86: Add ramstage CBFS cache support This commit introduces the x86 `RAMSTAGE_CBFS_CACHE_SIZE' Kconfig to set the ramstage CBFS cache size. A cache size of zero disables the CBFS cache feature. The default size is 16 KB which seems a reasonable minimal value large enough to satisfy basic needs such as the decompression of a small configuration file. This setting can be adjusted depending on the platform needs and capabilities. To support S3 suspend/resume use-case, the CBFS cache memory cannot be released to the Operating System. There are two options to meet this requirement: 1. Define a static CBFS cache buffer (located in the .bss section) 2. Create a new CBMEM entry Option #2 seems more powerful but considering that: 1. The CBFS cache is actually not a cache but just a scratch pad designed to be isolated between stages 2. postcar is a very short stage not really needing CBFS cache 3. The static initialization of the `cbfs_cache' global variable (cf. src/lib/cbfs.c) offer a simple and robust design => It is simpler to use a static buffer and limit the support to ramstage. Since some AMD SoCs (cf. `SOC_AMD_COMMON_BLOCK_NONCAR' Kconfig) defines a `_cbfs_cache' region, an extra `POSTRAM_CBFS_CACHE_IN_BSS' Kconfig must be set to enable the use of a static buffer as the CBFS cache scratchpad. TEST=Decompression of vbt.bin in ramstage on rex using cbfs_map() Change-Id: I7fbb1b51cda9f84842992e365b16c5ced1010b89 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/arch/x86/Kconfig M src/lib/cbfs.c 2 files changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/77885/24 -- To view, visit https://review.coreboot.org/c/coreboot/+/77885?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7fbb1b51cda9f84842992e365b16c5ced1010b89 Gerrit-Change-Number: 77885 Gerrit-PatchSet: 24 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: drivers/intel/gma/opregion: Use CBFS cache to load VBT
by Jérémy Compostella (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Eran Mitrani, Jakub Czapiga, Kapil Porwal, Nick Vaccaro, Subrata Banik, Tarun. Hello Eran Mitrani, Jakub Czapiga, Kapil Porwal, Nick Vaccaro, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77886?usp=email to look at the new patch set (#23). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: drivers/intel/gma/opregion: Use CBFS cache to load VBT ...................................................................... drivers/intel/gma/opregion: Use CBFS cache to load VBT Thanks to x86 CBFS cache support, we can leverage cbfs_map() function to load the VBT binary regardless of if it is compressed or not. Change-Id: I1e37e718a71bd85b0d7dee1efc4c0391798f16f7 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/drivers/intel/gma/Kconfig M src/drivers/intel/gma/opregion.c M src/soc/intel/alderlake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/meteorlake/Kconfig M src/soc/intel/tigerlake/Kconfig 6 files changed, 15 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/77886/23 -- To view, visit https://review.coreboot.org/c/coreboot/+/77886?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e37e718a71bd85b0d7dee1efc4c0391798f16f7 Gerrit-Change-Number: 77886 Gerrit-PatchSet: 23 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: x86: Add ramstage CBFS cache support
by Jérémy Compostella (Code Review) 13 Oct '23

13 Oct '23

Attention is currently required from: Arthur Heymans, Julius Werner, Karthik Ramasubramanian, Maximilian Brune. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77885?usp=email ) Change subject: x86: Add ramstage CBFS cache support ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/77885?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7fbb1b51cda9f84842992e365b16c5ced1010b89 Gerrit-Change-Number: 77885 Gerrit-PatchSet: 22 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 12 Oct 2023 22:40:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit October 2023