coreboot-gerrit October 2023

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[XS] Change in coreboot[master]: mb/google/myst: Enable CBFS Verification
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

Karthik Ramasubramanian has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/78422?usp=email ) Change subject: mb/google/myst: Enable CBFS Verification ...................................................................... Abandoned Wrong branch -- To view, visit https://review.coreboot.org/c/coreboot/+/78422?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2dd3ce59f331f89660185309ccf60c53d50e4fad Gerrit-Change-Number: 78422 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in coreboot[master]: soc/amd/phoenix/psp_verstage: Fix the hash file names
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

Karthik Ramasubramanian has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/78423?usp=email ) Change subject: soc/amd/phoenix/psp_verstage: Fix the hash file names ...................................................................... Abandoned Wrong branch -- To view, visit https://review.coreboot.org/c/coreboot/+/78423?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89f02922bc901d8ac71d48bf5128fe6ecead43a0 Gerrit-Change-Number: 78423 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: soc/amd/*: Set AMD_FW_AB_POSITION to either 64 or 128 bytes
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

Karthik Ramasubramanian has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/78424?usp=email ) Change subject: soc/amd/*: Set AMD_FW_AB_POSITION to either 64 or 128 bytes ...................................................................... Abandoned Wrong branch -- To view, visit https://review.coreboot.org/c/coreboot/+/78424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fe057e205848174e8b0c2159acafab4a1ba0e95 Gerrit-Change-Number: 78424 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: soc/amd/*: Set AMD_FW_AB_POSITION to either 64 or 128 bytes
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78424?usp=email ) Change subject: soc/amd/*: Set AMD_FW_AB_POSITION to either 64 or 128 bytes ...................................................................... soc/amd/*: Set AMD_FW_AB_POSITION to either 64 or 128 bytes When CBFS verification is enabled, add amdfw_a/b.rom at offset 128 bytes to account for CBFS file header with hash attribute. When CBFS verification is enabled, add amdfw_a/b.rom at offset 64 bytes to account for CBFS file header without hash attribute. BUG=None TEST=Build Skyrim, Myst BIOS images with and without CBFS verification enabled. Change-Id: I4fe057e205848174e8b0c2159acafab4a1ba0e95 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/soc/amd/glinda/Makefile.inc M src/soc/amd/mendocino/Makefile.inc M src/soc/amd/phoenix/Makefile.inc 3 files changed, 21 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/78424/1 diff --git a/src/soc/amd/glinda/Makefile.inc b/src/soc/amd/glinda/Makefile.inc index ea2a48b..5b63df3 100644 --- a/src/soc/amd/glinda/Makefile.inc +++ b/src/soc/amd/glinda/Makefile.inc @@ -43,9 +43,14 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/glinda CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common -# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes -# Building the cbfs image will fail if the offset isn't large enough +# Building the cbfs image will fail if the offset, aligned to 64 bytes, isn't large enough +ifeq ($(CONFIG_CBFS_VERIFICATION),y) +# 0x80 accounts for the cbfs_file struct + filename + metadata structs +AMD_FW_AB_POSITION := 0x80 +else # ($(CONFIG_CBFS_VERIFICATION), y) +# 0x40 accounts for the cbfs_file struct + filename + metadata structs without hash attribute AMD_FW_AB_POSITION := 0x40 +endif # ($(CONFIG_CBFS_VERIFICATION), y) GLINDA_FW_A_POSITION=$(call int-add, \ $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) diff --git a/src/soc/amd/mendocino/Makefile.inc b/src/soc/amd/mendocino/Makefile.inc index 9442083..f123487 100644 --- a/src/soc/amd/mendocino/Makefile.inc +++ b/src/soc/amd/mendocino/Makefile.inc @@ -42,9 +42,14 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/mendocino CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common -# 0x80 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes -# Building the cbfs image will fail if the offset isn't large enough +# Building the cbfs image will fail if the offset, aligned to 64 bytes, isn't large enough +ifeq ($(CONFIG_CBFS_VERIFICATION),y) +# 0x80 accounts for the cbfs_file struct + filename + metadata structs AMD_FW_AB_POSITION := 0x80 +else # ($(CONFIG_CBFS_VERIFICATION), y) +# 0x40 accounts for the cbfs_file struct + filename + metadata structs without hash attribute +AMD_FW_AB_POSITION := 0x40 +endif # ($(CONFIG_CBFS_VERIFICATION), y) MENDOCINO_FW_A_POSITION=$(call int-add, \ $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc index ee7ccea..cab8987 100644 --- a/src/soc/amd/phoenix/Makefile.inc +++ b/src/soc/amd/phoenix/Makefile.inc @@ -46,9 +46,14 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/phoenix CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common -# 0x80 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes -# Building the cbfs image will fail if the offset isn't large enough +# Building the cbfs image will fail if the offset, aligned to 64 bytes, isn't large enough +ifeq ($(CONFIG_CBFS_VERIFICATION),y) +# 0x80 accounts for the cbfs_file struct + filename + metadata structs AMD_FW_AB_POSITION := 0x80 +else # ($(CONFIG_CBFS_VERIFICATION), y) +# 0x40 accounts for the cbfs_file struct + filename + metadata structs without hash attribute +AMD_FW_AB_POSITION := 0x40 +endif # ($(CONFIG_CBFS_VERIFICATION), y) PHOENIX_FW_A_POSITION=$(call int-add, \ $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) -- To view, visit https://review.coreboot.org/c/coreboot/+/78424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fe057e205848174e8b0c2159acafab4a1ba0e95 Gerrit-Change-Number: 78424 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: soc/amd/phoenix/psp_verstage: Fix the hash file names
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

1 0

[XS] Change in coreboot[master]: mb/google/myst: Enable CBFS Verification
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78422?usp=email ) Change subject: mb/google/myst: Enable CBFS Verification ...................................................................... mb/google/myst: Enable CBFS Verification Enable RO verification by GSC and RO/RW CBFS verification. BUG=b:277087492 TEST=Build and boot to OS in Myst with CBFS verification enabled using PSP verstage. Change-Id: I2dd3ce59f331f89660185309ccf60c53d50e4fad Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/myst/Kconfig 1 file changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/78422/1 diff --git a/src/mainboard/google/myst/Kconfig b/src/mainboard/google/myst/Kconfig index fbb3687..70986f8 100644 --- a/src/mainboard/google/myst/Kconfig +++ b/src/mainboard/google/myst/Kconfig @@ -88,11 +88,6 @@ bool default y if VBOOT && !VBOOT_STARTS_BEFORE_BOOTBLOCK -# TODO(b/277087492): Enable GSC CBFS verification -config VBOOT_GSCVD - bool - default n - # Override PSP_SOFTFUSE_BITS from soc/amd/phoenix. # The documentation of PSP_SOFTFUSE_BITS is available in #55758 doc (NDA). config PSP_SOFTFUSE_BITS -- To view, visit https://review.coreboot.org/c/coreboot/+/78422?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2dd3ce59f331f89660185309ccf60c53d50e4fad Gerrit-Change-Number: 78422 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: soc/amd/phoenix: Disable CCP DMA in PSP Verstage
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

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[S] Change in coreboot[master]: soc/amd/phoenix: Add build rules to enable CBFS verification
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78420?usp=email ) Change subject: soc/amd/phoenix: Add build rules to enable CBFS verification ...................................................................... soc/amd/phoenix: Add build rules to enable CBFS verification Add SPI flash RO ranges to be verified by GSC in order to enable CBFS verification. Also with CBFS verification enabled, CBFS metadata is more than 64 bytes. So configure the offset of amdfw_a/b to 128 bytes - next address aligned to 64 bytes. BUG=b:277087492 TEST=Build and boot to OS in Myst with and without CBFS verification enabled. Change-Id: Ibfffd3d6fce8b80ec156a7b13b387e1df8c43347 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/soc/amd/phoenix/Makefile.inc 1 file changed, 15 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/78420/1 diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc index d589bf1..ee7ccea 100644 --- a/src/soc/amd/phoenix/Makefile.inc +++ b/src/soc/amd/phoenix/Makefile.inc @@ -46,9 +46,9 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/phoenix CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common -# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes +# 0x80 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes # Building the cbfs image will fail if the offset isn't large enough -AMD_FW_AB_POSITION := 0x40 +AMD_FW_AB_POSITION := 0x80 PHOENIX_FW_A_POSITION=$(call int-add, \ $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION)) @@ -337,4 +337,17 @@ endif # CONFIG_SEPARATE_SIGNED_PSPFW endif +# Add ranges for all components up until the first segment of BIOS to be verified by GSC +ifeq ($(CONFIG_VBOOT_GSCVD),y) +# Adding range for Bootblock +vboot-gscvd-ranges += $(call amdfwread-range-cmd,BIOSL2: 0x62) +# Adding range for PSP Stage1 Bootloader +vboot-gscvd-ranges += $(call amdfwread-range-cmd,PSPL2: 0x01) + +ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) +# Adding range for PSP Verstage +vboot-gscvd-ranges += $(call amdfwread-range-cmd,PSPL2: 0x52) +endif # ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) +endif # ifeq ($(CONFIG_VBOOT_GSCVD),y) + endif # ($(CONFIG_SOC_AMD_PHOENIX),y) -- To view, visit https://review.coreboot.org/c/coreboot/+/78420?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibfffd3d6fce8b80ec156a7b13b387e1df8c43347 Gerrit-Change-Number: 78420 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: x86: Add post-memory CBFS cache support
by Jérémy Compostella (Code Review) 16 Oct '23

16 Oct '23

Jérémy Compostella has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/78011?usp=email ) Change subject: x86: Add post-memory CBFS cache support ...................................................................... Abandoned .bss section is simpler. -- To view, visit https://review.coreboot.org/c/coreboot/+/78011?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4202fb5f1d2c79fc443f715817061c7405584b9e Gerrit-Change-Number: 78011 Gerrit-PatchSet: 3 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[main]: soc/amd/phoenix: Add build rules to enable CBFS verification
by Karthik Ramasubramanian (Code Review) 16 Oct '23

16 Oct '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jon Murphy, Martin L Roth, Matt DeVillier. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78233?usp=email ) Change subject: soc/amd/phoenix: Add build rules to enable CBFS verification ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/phoenix/Makefile.inc: https://review.coreboot.org/c/coreboot/+/78233/comment/eaedd9a7_631c533e : PS2, Line 346: > Do we need to add the key signature block as well, or is that already done by default? Are you referring to the PSP_VERSTAGE_SIGNING_TOKEN File i.e. Type 0x53 entry? -- To view, visit https://review.coreboot.org/c/coreboot/+/78233?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfffd3d6fce8b80ec156a7b13b387e1df8c43347 Gerrit-Change-Number: 78233 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 16 Oct 2023 20:36:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit October 2023