coreboot-gerrit January 2023

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[master]: [WIP] mb/amd/birman: Move EC FW to FMAP
by Bao Zheng (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Jason Glenesk, ritul guru, Fred Reitberger, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70695 ) Change subject: [WIP] mb/amd/birman: Move EC FW to FMAP ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: The EC is put at 0x81000 in UEFI image. If it moves to 15M, is it needed to create a new EC.bin? -- To view, visit https://review.coreboot.org/c/coreboot/+/70695 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9b19d92043790b10acd20fbfdf394d5bd67b8295 Gerrit-Change-Number: 70695 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 05 Jan 2023 04:33:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/alderlake: Add romstage early graphics support
by Subrata Banik (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Bora Guvendik, Anil Kumar K, Hannah Williams, Cliff Huang, Jérémy Compostella, Paul Menzel, Angel Pons, Arthur Heymans, Tarun Tuli, Nico Huber, Michał Żygowski, Swift Geek (Sebastian Grzywna), Elyes Haouas. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70303 ) Change subject: soc/intel/alderlake: Add romstage early graphics support ...................................................................... Patch Set 46: (2 comments) File src/soc/intel/alderlake/Kconfig: https://review.coreboot.org/c/coreboot/+/70303/comment/76acf29b_adc37c83 PS42, Line 211: 0xfa000000 > I understand but the change you have recommended, libgfinit does not run anymore in both romstage and ramstage while before your suggestion it was working. > > Let me level set one more time by sending you again the following summary as I feel like your question revealed that you may have missed one point. > > The `CONFIG_GFX_GMA_DEFAULT_MMIO` configuration flag is originally a configuration flag consumed by the `libgfxinit` and it is used when the libhwbase driver is used. > > The `libhwbase` has two MMIO drivers: > > 1. **static**: a base address must be provided at compile time (cf. `CONFIG_HWBASE_STATIC_MMIO`) > 2. **dynamic**: the driver get the information from the PCI device BAR0 (cf. `HWBASE_DYNAMIC_MMIO`) > > The most flexible and convenient driver is the **dynamic** one. Unfortunately, its compilation for `libgfxinit` generates global initialized variables which are not supported in cache-as-ram (cf. `src/arch/x86/car.ld`). > > Hence, we have to use the **static** driver in `romstage`. Since this `CONFIG_GFX_GMA_DEFAULT_MMIO` is also consumed by `libgfxinit/libhwbase`, if we use `libgfxinit` in both `romstage` and `ramstage`, it has to be set to a value which is working for both `romstage` and `ramstage`. Also we do not have `libhwbase` separated configuration flag between `romstage` and `ramstage` and as a result both `romstage` and `ramstage` version of `libhwbase` have to use the same driver. > > The problem with using a temporary MMIO region as you suggested is that it makes the `romstage` + `ramstage libgfxinit` use-case complicated to support because FSPs reset BAR 0 and more importantly the coreboot PCI resource allocator is setting another one (`0x81000000`). > > I raised this concern a month ago on the coreboot mailing list and I got only one feedback which was to use a simple Kconfig to supply this address statically and it is what I have implemented. The nice thing is I did not have to introduce any new configuration flag as `CONFIG_GFX_GMA_DEFAULT_MMIO` is already mandatory for `libgfxinit` with the **static** `libhwbase` driver. I am just extending its usage to other places in coreboot. > > The simplest way to keep it simple is to supply the same MMIO region than the one the PCI resource allocator allocates at ramstage. > > If we use another temporary one, some hack will have to be introduced in `soc/intel/common/block/graphics/graphics.c`, to switch temporarily to this other MMIO region. > > > ----------------------------------------------- > > I already exposed this issue on the mailing list nearly two month ago and I unfortunately did not get tons of feedback. I am glad you are also looking at it now :) > > So this dynamic driver already exist but if we cannot use it in romstage as we do not have global dynamic support. > > > This is expected, we can't blindly assign any address (from future aka ramstage) while we are still on romstage. > > This is not really blindly as this is specified by a platform specific configuration flag. > > > We don't have SRAM on intel platform. > I don't get your point here. Why are talking about SRAM ? File src/soc/intel/alderlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/70303/comment/9f7cfa4b_742d94a0 PS46, Line 427: m_cfg->GttMmAdr = CONFIG_GFX_GMA_DEFAULT_MMIO; for user without LIBGFXINIT config being selected this value could be 0. https://review.coreboot.org/c/coreboot/+/70303/46/src/soc/intel/alderlake/K… ideally u can use the config to guard and override the value otherwise relying on FSP default. -- To view, visit https://review.coreboot.org/c/coreboot/+/70303 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I727b28bbe180edc2574e09bf03f1534d6282bdb2 Gerrit-Change-Number: 70303 Gerrit-PatchSet: 46 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 05 Jan 2023 03:57:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: utils/inteltool: Add support to print Key Locker status
by Pratikkumar V Prajapati (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Stefan Reinauer. Hello build bot (Jenkins), Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71657 to look at the new patch set (#5). Change subject: utils/inteltool: Add support to print Key Locker status ...................................................................... utils/inteltool: Add support to print Key Locker status Add command-line option "-k" to print status. Sample output: $ inteltool -k ============= Dumping INTEL Key Locker status ============= Key Locker supported : YES AESKL instructions enabled : NO =========================================================== Change-Id: Icb1b08619b1dbc535640127f7ab5f6b49d70a6fe Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> --- M util/inteltool/cpu.c M util/inteltool/inteltool.c M util/inteltool/inteltool.h 3 files changed, 90 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/71657/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/71657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb1b08619b1dbc535640127f7ab5f6b49d70a6fe Gerrit-Change-Number: 71657 Gerrit-PatchSet: 5 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: cpu/x86/smm: Enable setting SMM console log level from mainboard
by Johnny Lin (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Marc Jones, Martin L Roth, Patrick Rudolph, Jonathan Zhang, Rocky Phagura, Jingle Hsu, Angel Pons, Arthur Heymans, Morgan Jang, Kyösti Mälkki. Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49460 ) Change subject: cpu/x86/smm: Enable setting SMM console log level from mainboard ...................................................................... Patch Set 28: (1 comment) Patchset: PS27: > There is a merge conflict. Done. -- To view, visit https://review.coreboot.org/c/coreboot/+/49460 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71 Gerrit-Change-Number: 49460 Gerrit-PatchSet: 28 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Thu, 05 Jan 2023 03:18:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: utils/inteltool: Add support to print Key Locker status
by Pratikkumar V Prajapati (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Stefan Reinauer. Hello build bot (Jenkins), Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71657 to look at the new patch set (#4). Change subject: utils/inteltool: Add support to print Key Locker status ...................................................................... utils/inteltool: Add support to print Key Locker status Add commandline option "-k" to print status. Sample output: $ inteltool -k ============= Dumping INTEL Key Locker status ============= Key Locker supported : YES AESKL instructions enabled : NO =========================================================== Change-Id: Icb1b08619b1dbc535640127f7ab5f6b49d70a6fe Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> --- M util/inteltool/cpu.c M util/inteltool/inteltool.c M util/inteltool/inteltool.h 3 files changed, 90 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/71657/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/71657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb1b08619b1dbc535640127f7ab5f6b49d70a6fe Gerrit-Change-Number: 71657 Gerrit-PatchSet: 4 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: cpu/x86/smm: Enable setting SMM console log level from mainboard
by Johnny Lin (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Marc Jones, Martin L Roth, Patrick Rudolph, Johnny Lin, Rocky Phagura, Jingle Hsu, Angel Pons, Arthur Heymans, Morgan Jang, Kyösti Mälkki. Hello build bot (Jenkins), Marc Jones, Nico Huber, Patrick Rudolph, Jonathan Zhang, Rocky Phagura, Jingle Hsu, Angel Pons, Rocky Phagura, Arthur Heymans, Morgan Jang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49460 to look at the new patch set (#28). Change subject: cpu/x86/smm: Enable setting SMM console log level from mainboard ...................................................................... cpu/x86/smm: Enable setting SMM console log level from mainboard Add a Kconfig RUNTIME_CONFIGURABLE_SMM_LOGLEVEL that enables mainboard to override mainboard_set_smm_log_level for SMM log level. This can let SMM have different log level than other stages for more flexibility. Another reason is that getting certain data that requires searching from flash VPD or CMOS is not very ideal to be done in SMM, so in this change the value can be passed via the member variable in struct smm_runtime and be referenced directly in SMM. One example is that mainboard can get the desired SMM log level from VPD/CMOS, and pass SMM console log level via the variable and in SMM it can be referenced in get_console_loglevel() override function directly. Tested=On OCP Delta Lake, verified SMM log level can be overridden. Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71 Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com> --- M src/cpu/x86/Kconfig M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/include/cpu/x86/smm.h 4 files changed, 53 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/49460/28 -- To view, visit https://review.coreboot.org/c/coreboot/+/49460 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71 Gerrit-Change-Number: 49460 Gerrit-PatchSet: 28 Gerrit-Owner: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: Rocky Phagura <rphagura(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Rocky Phagura <rphagura(a)fb.com> Gerrit-Attention: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/skyrim: Switch from LZMA to LZ4 compression for ramstage
by Martin L Roth (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Jason Nien, Martin Roth. Hello Martin Roth, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/71675 to review the following change. Change subject: mb/google/skyrim: Switch from LZMA to LZ4 compression for ramstage ...................................................................... mb/google/skyrim: Switch from LZMA to LZ4 compression for ramstage Because skyrim is loading ramstage from SPI with the DMA engine, the size of the compressed image is less important to load speed than decompression time. Because the LZ4 decompression is so much faster than LZMA, compressing with LZ4 saves us roughly 30ms in boot time. For size, we're spending roughly 57KiB: fallback/ramstage 0x9b00 stage 130864 LZMA (305316 decompressed) fallback/ramstage 0x9b00 stage 189126 LZ4 (305316 decompressed) Right now we have 2MiB empty space in Skyrim's RO before this change, and roughly 550KiB empty space in RW, so there aren't currently any size worries. Just for fun, I also tested uncompressed ramstage, and it was still 18ms faster than LZMA, but that makes it roughly 12ms slower than LZ4. BUG=b:264409477 TEST=Boot skyrim, look at boot speed. Signed-off-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Change-Id: Iedde6fc2db9d702c0ff2b0081e7baa254ac6699f --- M src/mainboard/google/skyrim/Kconfig 1 file changed, 32 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/71675/1 diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index 493ecb5..94659db 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -37,6 +37,7 @@ select I2C_TPM select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 + select MB_COMPRESS_RAMSTAGE_LZ4 select SOC_AMD_MENDOCINO select SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP select SOC_AMD_COMMON_BLOCK_USE_ESPI -- To view, visit https://review.coreboot.org/c/coreboot/+/71675 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iedde6fc2db9d702c0ff2b0081e7baa254ac6699f Gerrit-Change-Number: 71675 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: src/lib: Include LZMA in romstage for FSP-M
by Martin L Roth (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Martin Roth. Hello Martin Roth, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/71674 to review the following change. Change subject: src/lib: Include LZMA in romstage for FSP-M ...................................................................... src/lib: Include LZMA in romstage for FSP-M Previously, LZMA was included in romstage because it was almost always needed to decompress ramstage. When compressing ramstage with LZ4, but using LZMA compression for FSP-M, we still need the LZMA decompression to be present, so update when the Makefile includes the LZMA decoder. Signed-off-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Change-Id: Id52d25a13420f05db8b2b563de0448f9d44638e0 --- M src/lib/Makefile.inc 1 file changed, 18 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/71674/1 diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 030959c..c83004a 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -95,7 +95,9 @@ romstage-y += fmap.c romstage-y += delay.c romstage-y += cbfs.c -romstage-$(CONFIG_COMPRESS_RAMSTAGE_LZMA) += lzma.c lzmadecode.c +ifneq ($(CONFIG_COMPRESS_RAMSTAGE_LZMA)$(CONFIG_FSP_COMPRESS_FSP_M_LZMA),) +romstage-y += lzma.c lzmadecode.c +endif romstage-y += libgcc.c romstage-y += memrange.c romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c -- To view, visit https://review.coreboot.org/c/coreboot/+/71674 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id52d25a13420f05db8b2b563de0448f9d44638e0 Gerrit-Change-Number: 71674 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: Kconfig: Add option to compress ramstage with LZ4
by Martin L Roth (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Martin Roth. Hello Martin Roth, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/71673 to review the following change. Change subject: Kconfig: Add option to compress ramstage with LZ4 ...................................................................... Kconfig: Add option to compress ramstage with LZ4 When ramstage is loaded asynchronously, as on the skyrim boards, the faster decompression of LZ4 allows for faster boot times than the tighter compression of LZMA. To make this change, the name of the existing ramstage_compression option needs to be updated. BUG=b:264409477 TEST=Boot skyrim, look at boot speed Signed-off-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Change-Id: I27dd1a8def024e0efd466cef9ffd9ca71717486a --- M Makefile.inc M src/Kconfig M src/lib/Makefile.inc M src/lib/cbfs.c 4 files changed, 46 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/71673/1 diff --git a/Makefile.inc b/Makefile.inc index 5cd13ba..2b5d742 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -372,9 +372,12 @@ ####################################################################### # a variety of flags for our build CBFS_COMPRESS_FLAG:=none -ifeq ($(CONFIG_COMPRESS_RAMSTAGE),y) +ifeq ($(CONFIG_COMPRESS_RAMSTAGE_LZMA),y) CBFS_COMPRESS_FLAG:=LZMA endif +ifeq ($(CONFIG_COMPRESS_RAMSTAGE_LZ4),y) +CBFS_COMPRESS_FLAG:=LZ4 +endif CBFS_PAYLOAD_COMPRESS_FLAG:=none ifeq ($(CONFIG_COMPRESSED_PAYLOAD_LZMA),y) diff --git a/src/Kconfig b/src/Kconfig index f16b53c..ed9dba8 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -170,12 +170,28 @@ every boot. Use this if you want the NVRAM configuration to never be modified from its default values. -config COMPRESS_RAMSTAGE +config MB_COMPRESS_RAMSTAGE_LZ4 + bool + help + Select this in a mainboard to use LZ4 compression by default + +choice + prompt "Ramstage compression" + depends on HAVE_RAMSTAGE && !UNCOMPRESSED_RAMSTAGE + default COMPRESS_RAMSTAGE_LZ4 if MB_COMPRESS_RAMSTAGE_LZ4 + +config COMPRESS_RAMSTAGE_LZMA bool "Compress ramstage with LZMA" - depends on HAVE_RAMSTAGE # Default value set at the end of the file help - Compress ramstage to save memory in the flash image. + Compress ramstage with LZMA to save memory in the flash image. + +config COMPRESS_RAMSTAGE_LZ4 + bool "Compress ramstage with LZ4" + help + Compress ramstage with LZ4 for faster decompression + +endchoice config COMPRESS_PRERAM_STAGES bool "Compress romstage and verstage with LZ4" @@ -1372,9 +1388,6 @@ # Set default values for symbols created before mainboards. This allows the # option to be displayed in the general menu, but the default to be loaded in # the mainboard if desired. -config COMPRESS_RAMSTAGE - default y if !UNCOMPRESSED_RAMSTAGE - config COMPRESS_PRERAM_STAGES depends on (HAVE_ROMSTAGE || HAVE_VERSTAGE) && NO_XIP_EARLY_STAGES default y diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index dcba0c6..030959c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -95,7 +95,7 @@ romstage-y += fmap.c romstage-y += delay.c romstage-y += cbfs.c -romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c lzmadecode.c +romstage-$(CONFIG_COMPRESS_RAMSTAGE_LZMA) += lzma.c lzmadecode.c romstage-y += libgcc.c romstage-y += memrange.c romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c @@ -294,7 +294,7 @@ postcar-y += gcc.c postcar-y += halt.c postcar-y += libgcc.c -postcar-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c lzmadecode.c +postcar-$(CONFIG_COMPRESS_RAMSTAGE_LZMA) += lzma.c lzmadecode.c postcar-y += memchr.c postcar-y += memcmp.c postcar-y += prog_loaders.c diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index d2829d1..0b2d66b 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -142,7 +142,7 @@ return false; if (ENV_ROMSTAGE && CONFIG(POSTCAR_STAGE)) return false; - if ((ENV_ROMSTAGE || ENV_POSTCAR) && !CONFIG(COMPRESS_RAMSTAGE)) + if ((ENV_ROMSTAGE || ENV_POSTCAR) && !CONFIG(COMPRESS_RAMSTAGE_LZMA)) return false; if (ENV_SMM) return false; -- To view, visit https://review.coreboot.org/c/coreboot/+/71673 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I27dd1a8def024e0efd466cef9ffd9ca71717486a Gerrit-Change-Number: 71673 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: Enable VBOOT_VBNV_FLASH for 2065X and 206AX
by Yu-Ping Wu (Code Review) 05 Jan '23

05 Jan '23

Attention is currently required from: Stefan Ott, Angel Pons, Alexander Couzens. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70296 ) Change subject: Enable VBOOT_VBNV_FLASH for 2065X and 206AX ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: gentle ping -- To view, visit https://review.coreboot.org/c/coreboot/+/70296 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I833edd4f7a328b21e81c971ba8a9aec0aad7d3d3 Gerrit-Change-Number: 70296 Gerrit-PatchSet: 4 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Thu, 05 Jan 2023 03:09:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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