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Change subject: security/intel/txt: Helper function to disable TXT
......................................................................
Patch Set 1:
(1 comment)
File src/security/intel/txt/txtlib.c:
https://review.coreboot.org/c/coreboot/+/71574/comment/8d3d1e7f_0f723ee5
PS1, Line 57: /* Don't disable if INTEL_TXT config is selected */
: if (CONFIG(INTEL_TXT))
: return;
> Having a disable function which does not disable anything depending on a Kconfig value, is a bit confusing? Would it make sense to call it something like 'early_intel_txt_setup' ?
Ideally `early_intel_txt_setup()` should setup or init something (isn't it). Where else this function does exactly opposite of setting up the txt.
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Hello build bot (Jenkins), Tarun Tuli, Kyle Lin,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: mb/google/brya/var/marasov: Update Aux settings
......................................................................
mb/google/brya/var/marasov: Update Aux settings
Agah port 0 does not have a retimer so the port needs
to be configured for the SOC to handle Aux orientation flipping.
Add the "TcssAuxOri" and "typec_aux_bias_pads" to lets
the SoC IOM firmware control the Aux DC bias voltages.
BUG=b:263212450
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com>
Change-Id: I3af7522f7b6477edcd88004ce1d5f86aeebe3393
---
M src/mainboard/google/brya/variants/marasov/overridetree.cb
1 file changed, 30 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/71222/7
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Change subject: security/intel/txt: Create Intel TXT lib with helper functions
......................................................................
Patch Set 2:
(3 comments)
File src/security/intel/txt/romstage.c:
https://review.coreboot.org/c/coreboot/+/71573/comment/be4d77c5_46314202
PS1, Line 7: #include <cpu/x86/msr.h>
Is this required? Can you please check?
https://review.coreboot.org/c/coreboot/+/71573/comment/b8519a03_781312d1
PS1, Line 10: #include <timer.h>
This is not required.
https://review.coreboot.org/c/coreboot/+/71573/comment/884557a9_512c8d18
PS1, Line 13: #include <security/tpm/tis.h>
Is this required?
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Wilson Chou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71694 )
Change subject: arch/x86/smbios: Modify smbios type 9 data bus width
......................................................................
arch/x86/smbios: Modify smbios type 9 data bus width
According to smbios spec DSP0134_3.6.0, data bus width indicates
eletrical bus width. But now every data bus width of slot
information shows 1 that represents "SlotDataBusWidthOther".
Tested=On OCP CraterLake, dmidecode -t 9 shows the expected results.
For example, before this patch result:
Handle 0x001E, DMI type 9, 19 bytes
System Slot Information
Designation: SSD0_M2_Boot_Drive
Type: x4 M.2 Socket 3
Current Usage: In Use
Length: Short
Characteristics:
3.3 V is provided
PME signal is supported
Bus Address: 0000:bc:00.0
Data Bus Width: 1
Peer Devices: 0
After this patch result:
Handle 0x001E, DMI type 9, 19 bytes
System Slot Information
Designation: SSD0_M2_Boot_Drive
Type: x4 M.2 Socket 3
Current Usage: In Use
Length: Short
Characteristics:
3.3 V is provided
PME signal is supported
Bus Address: 0000:bc:00.0
Data Bus Width: 10
Peer Devices: 0
Change-Id: I1c72c422e0fdc136f4ed42c5c6818423aabc2704
Signed-off-by: Wilson Chou <Wilson.Chou(a)quantatw.com>
---
M src/arch/x86/smbios.c
1 file changed, 44 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/71694/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index 8d9de7c..daa006e 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -879,7 +879,7 @@
t->segment_group_number = 0;
t->bus_number = bus;
t->device_function_number = dev_func;
- t->data_bus_width = SlotDataBusWidthOther;
+ t->data_bus_width = bandwidth;
const int len = smbios_full_table_len(&t->header, t->eos);
*current += len;
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Ian Feng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71619 )
Change subject: mb/google/skyrim/var/markarth: Update RAM ID table
......................................................................
Patch Set 3: Code-Review+2
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Hello build bot (Jenkins), Tarun Tuli, Kyle Lin,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#6).
Change subject: mb/google/brya/var/marasov: Update Aux settings
......................................................................
mb/google/brya/var/marasov: Update Aux settings
Agah port 0 does not have a retimer so the port needs
to be configured for the SOC to handle Aux orientation flipping.
Add the "TcssAuxOri" and "typec_aux_bias_pads" to lets
the SoC IOM firmware control the Aux DC bias voltages.
BUG=b:263212450
BRANCH=NONE
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com>
Change-Id: I3af7522f7b6477edcd88004ce1d5f86aeebe3393
---
M src/mainboard/google/brya/variants/marasov/overridetree.cb
1 file changed, 30 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/71222/6
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Change subject: [test]mb/google/brya/var/marasov: Update Aux settings
......................................................................
Patch Set 5: Code-Review+1
This change is ready for review.
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Change subject: mb/google/brya/var/marasov: Disable touch panel power for non-touch sku
......................................................................
Patch Set 3: Code-Review+1
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Change subject: mb/google/brya/var/marasov: Remove wlan RTD3 driver for meet design change
......................................................................
Patch Set 3: Code-Review+1
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Hello Tarun Tuli,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/71693
to look at the new patch set (#3).
Change subject: mb/google/brya/var/marasov: Remove wlan RTD3 driver for meet design change
......................................................................
mb/google/brya/var/marasov: Remove wlan RTD3 driver for meet design change
Wlan power enable pin change from EN_PP3300_WLAN to SLP_SUS_L.
Remove unused RTD3 driver.
BUG=b:263448873
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com>
Change-Id: I22448a8cb28ddadb93b114c096e364980feab6fd
---
M src/mainboard/google/brya/variants/marasov/overridetree.cb
1 file changed, 17 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/71693/3
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