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Change subject: sb/intel/common/spi: Fix building for 64bit
......................................................................
Patch Set 7: Code-Review+2
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Change subject: sb/intel/common/spi: Fix building for 64bit
......................................................................
sb/intel/common/spi: Fix building for 64bit
This avoids the warning of casting pointers to integers of different
size.
Change-Id: I7bcb6dbf286438115c854d618eaa2da21c81400d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/southbridge/intel/common/spi.c
1 file changed, 25 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/69389/7
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Change subject: mb/google/brya/var/marasov: Disable touch panel power for non-touch sku
......................................................................
Patch Set 4: Code-Review+2
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Change subject: .gitmodules: Update goswid branch to v0.1
......................................................................
Patch Set 2: Code-Review+1
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71617/comment/e2c235d7_c37a8775
PS2, Line 7: Update goswid branch to v0.1
Since it's not an update, I suggest:
Fix submodule revision to v0.1 tag
https://review.coreboot.org/c/coreboot/+/71617/comment/3192e444_9ff14b13
PS2, Line 9: really
Remove `really`
https://review.coreboot.org/c/coreboot/+/71617/comment/5e50cc2e_fc890298
PS2, Line 10: I am currently working on the goswid tool and don't want to accidentlly
Suggestion:
The goswid tool gets a rework and this shouldn't break coreboot builds.
Therefore, a v0.1 tag was created to tie coreboot to a known working commit
of goswid.
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Change subject: mb/google/brya/var/marasov: Disable touch panel power for non-touch sku
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/brya/variants/marasov/fw_config.c:
https://review.coreboot.org/c/coreboot/+/71691/comment/75d29cf1_753100ad
PS3, Line 23: fw_config_probe(FW_CONFIG(TOUCH, TOUCH_NONE)
> if just 1 bits for touch and none touch, you don't have to probe again.. […]
Done
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Change subject: src/sbom/Makefile.inc: Fix quotes on CONFIG paths
......................................................................
Patch Set 3: Code-Review+2
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71519/comment/72bfd7f0_e38cb5fc
PS3, Line 7: Fix quotes on CONFIG paths
From this I can not guess that you are adding new ones. Suggestion:
Fix quotes on additional CONFIG paths
Patchset:
PS3:
Looks good to me. AFAIK we don't allow authors giving a review to their own patches. So please remove yours.
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Change subject: mb/google/brya/var/marasov: Update Aux settings
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Patch Set 7: Code-Review+1
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Change subject: Docs/releases: Update 4.17 & 4.18 notes to remove RESOURCE_ALLOCATOR_V3
......................................................................
Docs/releases: Update 4.17 & 4.18 notes to remove RESOURCE_ALLOCATOR_V3
This removal was announced in 4.16, but didn't make it into the 4.17 or
4.18 release notes.
Those platforms have now been removed.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I35607a86242c37e1578874b3a79ff0387a55b146
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71581
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Singer <felixsinger(a)posteo.net>
---
M Documentation/releases/coreboot-4.17-relnotes.md
M Documentation/releases/coreboot-4.18-relnotes.md
2 files changed, 78 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
diff --git a/Documentation/releases/coreboot-4.17-relnotes.md b/Documentation/releases/coreboot-4.17-relnotes.md
index 1f86883..eb136f4 100644
--- a/Documentation/releases/coreboot-4.17-relnotes.md
+++ b/Documentation/releases/coreboot-4.17-relnotes.md
@@ -296,6 +296,36 @@
* sandybridge & gm45: Support setting PCI bars above 4G
+Plans to move platform support to a branch:
+-------------------------------------------
+After the 4.18 release in November 2022, we plan to move support for any
+boards still requiring RESOURCE_ALLOCATOR_V3 to the 4.18 branch. V4 was
+introduced more than a year ago and with minor changes most platforms
+were able to work just fine with it. A major difference is that V3 uses
+just one continuous region below 4G to allocate all PCI memory BAR's. V4
+uses all available space below 4G and if asked to, also above 4G too.
+This makes it important that SoC code properly reports all fixed
+resources.
+
+Currently only AGESA platforms have issues with it. On Gerrit both
+attempts to fix AMD AGESA codebases to use V4 and compatibility modes
+inside the V4 allocator have been proposed, but both efforts seem
+stalled. See the (not yet merged) documentation
+[CR:43603](https://review.coreboot.org/c/coreboot/+/43603) on it's
+details. It looks like properly reporting all fixed resources is the
+issue.
+
+At this point, we are not specifying which platforms this will include
+as there are a number of patches to fix these issues in flight.
+Hopefully, all platforms will end up being migrated to the V4 resource
+allocator so that none of the platforms need to be supported on the
+branch.
+
+Additionally, even if the support for the platform is moved to a branch,
+it can be brought back to ToT if they're fixed to support the V4
+allocator.
+
+
Plans for Code Deprecation
--------------------------
diff --git a/Documentation/releases/coreboot-4.18-relnotes.md b/Documentation/releases/coreboot-4.18-relnotes.md
index d4bfa0e..a779192 100644
--- a/Documentation/releases/coreboot-4.18-relnotes.md
+++ b/Documentation/releases/coreboot-4.18-relnotes.md
@@ -195,6 +195,36 @@
being rather confusing.
+Plans to move platform support to a branch:
+-------------------------------------------
+After the 4.18 release in November 2022, we plan to move support for any
+boards still requiring RESOURCE_ALLOCATOR_V3 to the 4.18 branch. V4 was
+introduced more than a year ago and with minor changes most platforms
+were able to work just fine with it. A major difference is that V3 uses
+just one continuous region below 4G to allocate all PCI memory BAR's. V4
+uses all available space below 4G and if asked to, also above 4G too.
+This makes it important that SoC code properly reports all fixed
+resources.
+
+Currently only AGESA platforms have issues with it. On Gerrit both
+attempts to fix AMD AGESA codebases to use V4 and compatibility modes
+inside the V4 allocator have been proposed, but both efforts seem
+stalled. See the (not yet merged) documentation
+[CR:43603](https://review.coreboot.org/c/coreboot/+/43603) on it's
+details. It looks like properly reporting all fixed resources is the
+issue.
+
+At this point, we are not specifying which platforms this will include
+as there are a number of patches to fix these issues in flight.
+Hopefully, all platforms will end up being migrated to the v4 resource
+allocator so that none of the platforms need to be supported on the
+branch.
+
+Additionally, even if the support for the platform is moved to a branch,
+it can be brought back to ToT if they're fixed to support the v4
+allocator.
+
+
### Intel Icelake SoC & Icelake RVP mainboard
Intel Icelake is unmaintained. Also, the only user of this platform ever
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Change subject: Docs/releases: Update 4.17 & 4.18 notes to remove RESOURCE_ALLOCATOR_V3
......................................................................
Patch Set 2: Code-Review+2
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