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Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal, Eric Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/71630
to look at the new patch set (#4).
Change subject: soc/intel/meteorlake: Use common gpio.h include
......................................................................
soc/intel/meteorlake: Use common gpio.h include
Replace the intelblocks/gpio.h, soc/gpio.h and soc/gpio_defs.h
includes with the common gpio.h which will include soc/gpio.h
which will include intelblocks/gpio.h which will include
soc/gpio_defs.h
BUG=b:261778357
TEST=Able to build and boot Google/rex.
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: I58e428cde5e13f4f0dfe528d798c0613b7f8a94a
---
M src/soc/intel/meteorlake/acpi/gpio.asl
M src/soc/intel/meteorlake/chip.c
M src/soc/intel/meteorlake/chip.h
M src/soc/intel/meteorlake/finalize.c
M src/soc/intel/meteorlake/gpio.c
M src/soc/intel/meteorlake/pmutil.c
6 files changed, 24 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/71630/4
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Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71726 )
Change subject: mb/google/nissa/var/craask: Disable storage devices based on fw_config
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/craask/variant.c:
https://review.coreboot.org/c/coreboot/+/71726/comment/86071517_5762a7f7
PS1, Line 31: nvme_rp->enabled = 0;
> Yes, but I think it doesn't hurt to disable it here to be consistent with eMMC and UFS. […]
It's fine to me..
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Change subject: mb/intel/mtlrvp: Configure USB devices for MTL-RVP
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/71168/comment/ffbb4725_c0bbcd6f
PS5, Line 31: "USB3_PORT_DEFAULT(OC0)" # M.2 WWAN
> Do we still have to skip the OC configuration here?
please update the comment according
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Change subject: chromeos/cr50_enable_update.c: Clear EC AP_IDLE flag
......................................................................
Patch Set 18: Code-Review+2
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Change subject: ifdtool: Determine max regions from IFD
......................................................................
Patch Set 2: Code-Review+2
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Hello David Wu, Tarun Tuli, Subrata Banik, Caveh Jalali, Christian Walter, Nick Vaccaro, Daisuke Nojiri, Eric Lai, Boris Mittelberg,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70773
to look at the new patch set (#18).
Change subject: chromeos/cr50_enable_update.c: Clear EC AP_IDLE flag
......................................................................
chromeos/cr50_enable_update.c: Clear EC AP_IDLE flag
When AP boots up after Cr50 firmware update and reboot, AP finds
that Cr50 reset is required for Cr50 to pick the new firmware so
it trigger Cr50 reset and power off the system, AP expects system
will power on automatically after Cr50 reset. However this is not
the case for Chromebox, Chromebox EC set AP_IDLE flag when system
is shutting down, when AP_IDLE flag is set in EC, the system stays
at S5/G3 and wait for power button presssend. It cause an issue in
factory that the operator needs to press power button to power on
the DUT after Cr50 firmware update.
This patch sends EC command to direct EC to clear AP_IDLE flag
after AP shutdown so AP can boot up when Cr50 reset.
BUG=b:261119366
BRANCH=firmware-brya-14505.B
TEST=DUT boots up after Cr50 firmware update in factory test flow
Change-Id: If97ffbe65f4783f17f4747a87b0bf89a2b021a3b
Signed-off-by: Derek Huang <derekhuang(a)google.com>
---
M src/ec/google/chromeec/ec_commands.h
M src/mainboard/google/brya/Kconfig
M src/security/tpm/tss/vendor/cr50/Kconfig
M src/vendorcode/google/chromeos/cr50_enable_update.c
4 files changed, 53 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/70773/18
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Change subject: mb/intel/mtlrvp: Configure USB devices for MTL-RVP
......................................................................
Patch Set 5:
(1 comment)
File src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/71168/comment/640fb3b7_a6ee0284
PS5, Line 31: "USB3_PORT_DEFAULT(OC0)" # M.2 WWAN
> usb3_port[0] is Type-A by default. M.2 WWAN is possible only with rework. […]
Do we still have to skip the OC configuration here?
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