coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

1 participants
5283 discussions

Change in coreboot[master]: ChromeOS: Add legacy mainboard_ec_running_ro()
by Kyösti Mälkki (Code Review) 01 Apr '22

01 Apr '22

Attention is currently required from: Tim Wawrzynczak. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58896 ) Change subject: ChromeOS: Add legacy mainboard_ec_running_ro() ...................................................................... Patch Set 14: (1 comment) Patchset: PS14: I had a followup prepared already, I can squash these together CB:63290 -- To view, visit https://review.coreboot.org/c/coreboot/+/58896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f Gerrit-Change-Number: 58896 Gerrit-PatchSet: 14 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Apr 2022 01:48:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: ChromeOS: Add legacy mainboard_ec_running_ro()
by build bot (Jenkins) (Code Review) 01 Apr '22

01 Apr '22

Attention is currently required from: Tim Wawrzynczak. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58896 ) Change subject: ChromeOS: Add legacy mainboard_ec_running_ro() ...................................................................... Patch Set 14: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/58896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cb95268424dc27f8c1e26b3d34eff1a7b8eab7f Gerrit-Change-Number: 58896 Gerrit-PatchSet: 14 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Apr 2022 01:48:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: [TEST]top/Makefile.inc: List the sub directory only for subdirs
by build bot (Jenkins) (Code Review) 01 Apr '22

01 Apr '22

Attention is currently required from: Martin Roth, Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63015 ) Change subject: [TEST]top/Makefile.inc: List the sub directory only for subdirs ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63015 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic59203d5c52fdce3a6a18ffb54f720f16804a85b Gerrit-Change-Number: 63015 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Fri, 01 Apr 2022 01:48:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: ChromeOS: Drop filling ECFW_RW/RO state in CNVS
by Kyösti Mälkki (Code Review) 01 Apr '22

01 Apr '22

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63290 ) Change subject: ChromeOS: Drop filling ECFW_RW/RO state in CNVS ...................................................................... ChromeOS: Drop filling ECFW_RW/RO state in CNVS Change-Id: Ia56b3a3fc82f1b8247a6ee512fe960e9d3d87585 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/include/bootmode.h M src/mainboard/google/butterfly/chromeos.c M src/mainboard/google/parrot/chromeos.c M src/mainboard/google/stout/chromeos.c M src/mainboard/samsung/lumpy/chromeos.c M src/vendorcode/google/chromeos/gnvs.c 6 files changed, 0 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/63290/1 diff --git a/src/include/bootmode.h b/src/include/bootmode.h index e2d1cb9..12c9f58 100644 --- a/src/include/bootmode.h +++ b/src/include/bootmode.h @@ -14,7 +14,6 @@ int get_wipeout_mode_switch(void); int get_lid_switch(void); int get_ec_is_trusted(void); -bool mainboard_ec_running_ro(void); /* Return 1 if display initialization is required. 0 if not. */ int display_init_required(void); diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index fb249d4..b4bd5fe 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -48,15 +48,6 @@ return 0; } -bool mainboard_ec_running_ro(void) -{ - // TODO: MLR - // The firmware read/write status is a "virtual" switch and - // will be handled elsewhere. Until then hard-code to - // read/write instead of read-only for developer mode. - return false; -} - static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AL(WP_GPIO, CROS_GPIO_DEVICE_NAME), diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c index e0bc0b0..4efcb4c 100644 --- a/src/mainboard/google/parrot/chromeos.c +++ b/src/mainboard/google/parrot/chromeos.c @@ -46,11 +46,6 @@ return !get_gpio(GPIO_REC_MODE); } -bool mainboard_ec_running_ro(void) -{ - return get_recovery_mode_switch(); -} - static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c index fcbbc8a..2fbddc2 100644 --- a/src/mainboard/google/stout/chromeos.c +++ b/src/mainboard/google/stout/chromeos.c @@ -74,11 +74,6 @@ return ec_in_rec_mode; } -bool mainboard_ec_running_ro(void) -{ - return !!get_recovery_mode_switch(); -} - static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AH(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AL(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c index 1b9c7c4..f8b0afc 100644 --- a/src/mainboard/samsung/lumpy/chromeos.c +++ b/src/mainboard/samsung/lumpy/chromeos.c @@ -85,11 +85,6 @@ pci_s_write_config32(dev, SATA_SP, flags); } -bool mainboard_ec_running_ro(void) -{ - return !ec_read(0xcb); -} - static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c index b1090a4..33389b4e 100644 --- a/src/vendorcode/google/chromeos/gnvs.c +++ b/src/vendorcode/google/chromeos/gnvs.c @@ -32,8 +32,6 @@ return region_device_sz(&vpd); } -__weak bool mainboard_ec_running_ro(void) { return true; } - void chromeos_init_chromeos_acpi(void) { size_t vpd_size; @@ -58,17 +56,6 @@ chromeos_acpi->vpd_rw_base = vpd_base; chromeos_acpi->vpd_rw_size = vpd_size; } - - /* EC can override to ECFW_RW. */ - chromeos_acpi->vbt2 = ACTIVE_ECFW_RO; - - if (CONFIG(EC_GOOGLE_CHROMEEC)) { - if (!google_ec_running_ro()) - chromeos_acpi->vbt2 = ACTIVE_ECFW_RW; - } else { - if (!mainboard_ec_running_ro()) - chromeos_acpi->vbt2 = ACTIVE_ECFW_RW; - } } void chromeos_set_me_hash(u32 *hash, int len) -- To view, visit https://review.coreboot.org/c/coreboot/+/63290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia56b3a3fc82f1b8247a6ee512fe960e9d3d87585 Gerrit-Change-Number: 63290 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: amd/*/Makefile.inc: Put common words into common Makefile.inc
by build bot (Jenkins) (Code Review) 01 Apr '22

01 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62658 ) Change subject: amd/*/Makefile.inc: Put common words into common Makefile.inc ...................................................................... Patch Set 13: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62658 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Gerrit-Change-Number: 62658 Gerrit-PatchSet: 13 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 01 Apr 2022 01:43:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: amd/*/Makefile.inc: Put common words into common Makefile.inc
by Bao Zheng (Code Review) 01 Apr '22

01 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Elyes Haouas, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62658 to look at the new patch set (#13). Change subject: amd/*/Makefile.inc: Put common words into common Makefile.inc ...................................................................... amd/*/Makefile.inc: Put common words into common Makefile.inc Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/common/Makefile.inc M src/soc/amd/picasso/Makefile.inc M src/soc/amd/sabrina/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/southbridge/amd/pi/hudson/Makefile.inc 6 files changed, 11 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/62658/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/62658 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Gerrit-Change-Number: 62658 Gerrit-PatchSet: 13 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: amd/*/Makefile.inc: Put common words into common Makefile.inc
by build bot (Jenkins) (Code Review) 01 Apr '22

01 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Zheng Bao, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62658 ) Change subject: amd/*/Makefile.inc: Put common words into common Makefile.inc ...................................................................... Patch Set 12: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/62658 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a0ea27002e09d0b879bafad37a5d418ddb4e644 Gerrit-Change-Number: 62658 Gerrit-PatchSet: 12 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 01 Apr 2022 01:40:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/qualcomm/common: Add strict flag to clock_configure()
by Shelley Chen (Code Review) 01 Apr '22

01 Apr '22

Shelley Chen has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/63289 ) Change subject: soc/qualcomm/common: Add strict flag to clock_configure() ...................................................................... soc/qualcomm/common: Add strict flag to clock_configure() When strict parameter is set to true, clock_configure() will try to find an exact match to the clock frequency given. If exact match cannot be found, then will throw an assert error. BUG=b:198627043 BRANCH=None TEST=build herobrine image and try to set SPI frequency to number not supported. Ensure assert is seen. Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/soc/qualcomm/common/clock.c M src/soc/qualcomm/common/include/soc/clock_common.h M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7280/clock.c 4 files changed, 30 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/63289/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc Gerrit-Change-Number: 63289 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/qualcomm/common: Add strict_check flags to clock_configure()
by build bot (Jenkins) (Code Review) 01 Apr '22

01 Apr '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63289 ) Change subject: soc/qualcomm/common: Add strict_check flags to clock_configure() ...................................................................... Patch Set 1: (4 comments) File src/soc/qualcomm/sc7180/clock.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145192): https://review.coreboot.org/c/coreboot/+/63289/comment/320a196c_c80573c8 PS1, Line 218: &mdss_clk_cfg, 0, 0, false); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145192): https://review.coreboot.org/c/coreboot/+/63289/comment/218cf625_7e7f7512 PS1, Line 218: &mdss_clk_cfg, 0, 0, false); please, no spaces at the start of a line File src/soc/qualcomm/sc7280/clock.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145192): https://review.coreboot.org/c/coreboot/+/63289/comment/50f54c07_3c7ff175 PS1, Line 270: true); code indent should use tabs where possible Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-145192): https://review.coreboot.org/c/coreboot/+/63289/comment/27b42a87_bb3bdf19 PS1, Line 270: true); please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/63289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc Gerrit-Change-Number: 63289 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Apr 2022 01:22:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/qualcomm/common: Add strict_check flags to clock_configure()
by Shelley Chen (Code Review) 01 Apr '22

01 Apr '22

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63289 ) Change subject: soc/qualcomm/common: Add strict_check flags to clock_configure() ...................................................................... soc/qualcomm/common: Add strict_check flags to clock_configure() Add strict parameter to clock_configure(). When this parameter is set to true, clock_configure() will try to find an exact match to the clock frequency given. If exact match cannot be found, then will throw an assert error. BUG=b:198627043 BRANCH=None TEST=build herobrine image and try to set SPI frequency to number not supported. Ensure assert is seen. Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/soc/qualcomm/common/clock.c M src/soc/qualcomm/common/include/soc/clock_common.h M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7280/clock.c 4 files changed, 30 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/63289/1 diff --git a/src/soc/qualcomm/common/clock.c b/src/soc/qualcomm/common/clock.c index e06a954..4a2b0a8 100644 --- a/src/soc/qualcomm/common/clock.c +++ b/src/soc/qualcomm/common/clock.c @@ -90,8 +90,8 @@ /* Clock Root clock Generator Operations */ enum cb_err clock_configure(struct clock_rcg *clk, - struct clock_freq_config *clk_cfg, uint32_t hz, - uint32_t num_perfs) + struct clock_freq_config *clk_cfg, uint32_t hz, + uint32_t num_perfs, bool strict) { uint32_t reg_val, idx; @@ -99,6 +99,10 @@ if (hz <= clk_cfg[idx].hz) break; + /* If strict flag is set, check if found exact match */ + if (strict && hz != clk_cfg[idx].hz) + assert("ERROR: No exact match found for QSPI clk frequency!\n"); + reg_val = (clk_cfg[idx].src << CLK_CTL_CFG_SRC_SEL_SHFT) | (clk_cfg[idx].div << CLK_CTL_CFG_SRC_DIV_SHFT); diff --git a/src/soc/qualcomm/common/include/soc/clock_common.h b/src/soc/qualcomm/common/include/soc/clock_common.h index 0911827..82464cf 100644 --- a/src/soc/qualcomm/common/include/soc/clock_common.h +++ b/src/soc/qualcomm/common/include/soc/clock_common.h @@ -145,8 +145,22 @@ void clock_reset_bcr(void *bcr_addr, bool assert); +/* + * clock_configure(): Configure the clock at the given clock speed (hz). If hz + * does not match any entries in the clk_cfg array, will round up to the next + * highest clock frequency. If strict=1, will throw an assert error if there is + * no frequency match in clk_cfg. + * + * @param clk struct clock_rcg pointer (root clock generator) + * @param clk_cfg Array with possible clock configurations + * @param hz frequency of clock to set + * @param num_perfs size of clock array + * @param strict Flag to enable strict checking. If the given frequency + * in hz does not match any entry in clk_cfg array, will + * throw an assert error. + */ enum cb_err clock_configure(struct clock_rcg *clk, struct clock_freq_config *clk_cfg, - uint32_t hz, uint32_t num_perfs); + uint32_t hz, uint32_t num_perfs, bool strict); void clock_configure_dfsr_table(int qup, struct clock_freq_config *clk_cfg, uint32_t num_perfs); diff --git a/src/soc/qualcomm/sc7180/clock.c b/src/soc/qualcomm/sc7180/clock.c index 5741c54..ae5f43d 100644 --- a/src/soc/qualcomm/sc7180/clock.c +++ b/src/soc/qualcomm/sc7180/clock.c @@ -119,7 +119,7 @@ { clock_configure(&gcc->qspi_core, qspi_core_cfg, hz, - ARRAY_SIZE(qspi_core_cfg)); + ARRAY_SIZE(qspi_core_cfg), true); clock_enable(&gcc->qspi_cnoc_ahb_cbcr); clock_enable(&gcc->qspi_core_cbcr); } @@ -215,7 +215,7 @@ mdss_clk_cfg.d_2 = d_2; return clock_configure((struct clock_rcg *)mdss_clock[clk_type], - &mdss_clk_cfg, 0, 0); + &mdss_clk_cfg, 0, 0, false); } int mdss_clock_enable(enum mdss_clock clk_type) diff --git a/src/soc/qualcomm/sc7280/clock.c b/src/soc/qualcomm/sc7280/clock.c index 746035c..68b5909 100644 --- a/src/soc/qualcomm/sc7280/clock.c +++ b/src/soc/qualcomm/sc7280/clock.c @@ -266,7 +266,8 @@ { clock_configure(&gcc->qspi_core, qspi_core_cfg, hz, - ARRAY_SIZE(qspi_core_cfg)); + ARRAY_SIZE(qspi_core_cfg), + true); clock_enable(&gcc->qspi_cnoc_ahb_cbcr); clock_enable(&gcc->qspi_core_cbcr); } @@ -307,7 +308,7 @@ clock_configure_enable_gpll(&gpll10_cfg, true, 9); } clock_configure((struct clock_rcg *)&gcc->sdcc1, sdcc1_core_cfg, - hz, ARRAY_SIZE(sdcc1_core_cfg)); + hz, ARRAY_SIZE(sdcc1_core_cfg), false); clock_enable(&gcc->sdcc1_ahb_cbcr); clock_enable(&gcc->sdcc1_apps_cbcr); } else if (sdcc == SDCC2_CLK) { @@ -326,7 +327,7 @@ clock_configure_enable_gpll(&gpll9_cfg, true, 8); } clock_configure((struct clock_rcg *)&gcc->sdcc2, sdcc2_core_cfg, - hz, ARRAY_SIZE(sdcc2_core_cfg)); + hz, ARRAY_SIZE(sdcc2_core_cfg), false); clock_enable(&gcc->sdcc2_ahb_cbcr); clock_enable(&gcc->sdcc2_apps_cbcr); } @@ -422,11 +423,11 @@ case MDSS_CLK_EDP_PIXEL: case MDSS_CLK_PCLK0: return clock_configure((struct clock_rcg *) - mdss_clock_mnd[clk_type], - &mdss_clk_cfg, hz, 0); + mdss_clock_mnd[clk_type], + &mdss_clk_cfg, hz, 0, false); default: return clock_configure(mdss_clock[clk_type], - &mdss_clk_cfg, hz, 0); + &mdss_clk_cfg, hz, 0, false); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/63289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc Gerrit-Change-Number: 63289 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newchange

1 0

Jump to page:

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2022