Reka Norman has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63368 )
Change subject: mb/google/brya/var/nereid: Add WLAN power sequence
......................................................................
mb/google/brya/var/nereid: Add WLAN power sequence
There are currently two issues related to the WLAN power sequencing on
nereid:
- If the EN pin GPP_B11 is not high during cold boot, the SoC gets stuck
in S3.
- During warm reboot, if we only assert RST without pulling the power
low, then the kernel crashes.
As a workaround while we investigate these issues, we pull the EN high
in S5, then actively drive it low and high again in bootblock to make
sure it goes low during warm reboot.
BUG=b:227694137, b:225261075
TEST=Cold boot succeeds, and there's no kernel crash during warm reboot.
Change-Id: I1ca46d9649eff3f96a0e77db594d87288b29a83a
---
M src/mainboard/google/brya/variants/nereid/gpio.c
1 file changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/63368/1
diff --git a/src/mainboard/google/brya/variants/nereid/gpio.c b/src/mainboard/google/brya/variants/nereid/gpio.c
index f9ef8c9..e9da8c8 100644
--- a/src/mainboard/google/brya/variants/nereid/gpio.c
+++ b/src/mainboard/google/brya/variants/nereid/gpio.c
@@ -41,6 +41,10 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
+ PAD_CFG_GPO(GPP_B11, 0, DEEP),
+ /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
+ PAD_CFG_GPO(GPP_H20, 0, DEEP),
/* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
/* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
@@ -55,6 +59,13 @@
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
+ /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */
+ PAD_CFG_GPO(GPP_B11, 1, DEEP),
+};
+
+static const struct pad_config romstage_gpio_table[] = {
+ /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */
+ PAD_CFG_GPO(GPP_H20, 1, DEEP),
};
const struct pad_config *variant_gpio_override_table(size_t *num)
@@ -68,3 +79,9 @@
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}
+
+const struct pad_config *variant_romstage_gpio_table(size_t *num)
+{
+ *num = ARRAY_SIZE(romstage_gpio_table);
+ return romstage_gpio_table;
+}
--
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