coreboot-gerrit April 2022

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Change in coreboot[master]: mb/google/brya/var/vell: camera LED flicker problem
by Shon Wang (Code Review) 07 Apr '22

07 Apr '22

Shon Wang has removed Tim Wawrzynczak from this change. ( https://review.coreboot.org/c/coreboot/+/63436 ) Change subject: mb/google/brya/var/vell: camera LED flicker problem ...................................................................... Removed reviewer Tim Wawrzynczak. -- To view, visit https://review.coreboot.org/c/coreboot/+/63436 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If2ace2dfe0c8de1d8f0684b62f1adba060004c4e Gerrit-Change-Number: 63436 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: deleteReviewer

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Change in coreboot[master]: mb/google/brya/var/vell: camera LED flicker problem
by Shon Wang (Code Review) 07 Apr '22

07 Apr '22

Shon Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63436 ) Change subject: mb/google/brya/var/vell: camera LED flicker problem ...................................................................... mb/google/brya/var/vell: camera LED flicker problem BUG=b:219644184 TEST=Build and boot on vell, observe whether camera LED flicker Change-Id: If2ace2dfe0c8de1d8f0684b62f1adba060004c4e --- M src/mainboard/google/brya/variants/vell/overridetree.cb 1 file changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/63436/1 diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb old mode 100644 new mode 100755 index b12a00d..25d8fd3 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -296,11 +296,12 @@ register "has_power_resource" = "1" register "ssdb.lanes_used" = "4" - register "ssdb.link_used" = "0" + register "ssdb.link_used" = "1" register "num_freq_entries" = "2" register "link_freq[0]" = "360000000" register "link_freq[1]" = "180000000" register "remote_name" = ""IPU0"" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" #Controls register "clk_panel.clks[0].clknum" = "IMGCLKOUT_2" @@ -310,28 +311,27 @@ register "gpio_panel.gpio[1].gpio_num" = "GPP_C4" #power #_ON - register "on_seq.ops_cnt" = "5" + register "on_seq.ops_cnt" = "4" register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)" - register "on_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(1, 5)" - register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)" - register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 5)" - register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" + register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" + register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)" + register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)" #_OFF register "off_seq.ops_cnt" = "3" - register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" - register "off_seq.ops[1]" = "SEQ_OPS_CLK_DISABLE(0, 0)" - register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" + register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + register "off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)" device i2c 36 on end end chip drivers/intel/mipi_camera + register "acpi_hid" = "ACPI_DT_NAMESPACE_HID" register "acpi_uid" = "1" register "acpi_name" = ""NVM0"" register "chip_name" = ""GT24C08"" register "device_type" = "INTEL_ACPI_CAMERA_NVM" - register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC"" register "nvm_compat" = ""atmel,24c1024"" register "nvm_size" = "0x2000" -- To view, visit https://review.coreboot.org/c/coreboot/+/63436 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If2ace2dfe0c8de1d8f0684b62f1adba060004c4e Gerrit-Change-Number: 63436 Gerrit-PatchSet: 1 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: WIP: tpm: Refactor Kconfig
by Michael Niewöhner (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Stefan Ott, Felix Singer, Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Jes Klinke, Nico Huber, Sean Rhodes, Michał Żygowski, Johnny Lin, Christian Walter, Alexander Couzens, Werner Zeh, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Angel Pons, Julius Werner, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63424 ) Change subject: WIP: tpm: Refactor Kconfig ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63424/comment/5c32d15e_8edc5c83 PS3, Line 22: LPC_TPM LPC_TPM can be SPI, too, when it's connected to via SPI / CS#2. Maybe a better name should be found, when already touching this. The driver does not specifically target LPC but the memory mapped tpm https://review.coreboot.org/c/coreboot/+/63424/comment/7c7ea06e_07a1654a PS3, Line 18: // How the TPM chip is connected on the mainboard. : config CRB_TPM : config I2C_TPM : config SPI_TPM : config LPC_TPM (new) : "connected on the mainboard" <- why drop `MAINBOARD_HAS_` then? -- To view, visit https://review.coreboot.org/c/coreboot/+/63424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Gerrit-Change-Number: 63424 Gerrit-PatchSet: 3 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 07:56:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add support to update descriptor at runtime
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Angel Pons. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63365 ) Change subject: soc/intel/alderlake: Add support to update descriptor at runtime ...................................................................... Patch Set 9: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63365 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43c4d2888706561e42ff6b8ce0377eedbc38dbfe Gerrit-Change-Number: 63365 Gerrit-PatchSet: 9 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 07:55:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/intelp2m: Add support for Alder Lake H macro generation
by Michał Kopeć (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Michał Żygowski, Maxim Polyakov. Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63403 ) Change subject: util/intelp2m: Add support for Alder Lake H macro generation ...................................................................... Patch Set 2: (12 comments) Patchset: PS2: Thank you for the review, Maxim! I'm having some problems after applying your suggestions, though. File util/intelp2m/description.md: https://review.coreboot.org/c/coreboot/+/63403/comment/dc364ddd_7f9aedd2 PS1, Line 39: CPU > PCH Done https://review.coreboot.org/c/coreboot/+/63403/comment/8d18e163_acef94ac PS1, Line 39: AlderLake-H > Please, could you clarify how the pads in the H variant differ from other platforms of the Alder Lak […] From a quick look at Intel docs #618659 and #627075 The GPIO functions are different, the communities are different and PCH-LP has one more native function per GPIO (7 vs 6 in PCH-H) File util/intelp2m/main.go: https://review.coreboot.org/c/coreboot/+/63403/comment/a836f0fd_3f0bdaed PS1, Line 72: CPU > PCH Done File util/intelp2m/platforms/adl_h/macro.go: PS1: > It seems to me that this platform is more like Cannon Lake than Sunrise PCH. […] I applied your suggestions, but it seems i've run into a new problem - looks like a problem with inheritance in template.go? ``` ./intelp2m -file ~/inteltool.log -iiii -fld cb -p adl-h -o gpio_adl_h.h 1 msi_pro_z690_a/intelp2m_adl!? Info level: Use level 4! Log file: /home/mkopec/inteltool.log Output generated file: gpio_adl_h.h Parse IntelTool Log File... panic: runtime error: invalid memory address or nil pointer dereference [signal SIGSEGV: segmentation violation code=0x1 addr=0x18 pc=0x4c2bd8] goroutine 1 [running]: _/home/mkopec/Development/Dasharo/coreboot/util/intelp2m/platforms/cnl.PlatformSpecific.KeywordCheck(...) /home/mkopec/Development/Dasharo/coreboot/util/intelp2m/platforms/cnl/template.go:23 _/home/mkopec/Development/Dasharo/coreboot/util/intelp2m/platforms/adlh.PlatformSpecific.KeywordCheck(...) /home/mkopec/Development/Dasharo/coreboot/util/intelp2m/platforms/adlh/template.go:24 _/home/mkopec/Development/Dasharo/coreboot/util/intelp2m/parser.(*ParserData).Parse(0xc00007ef10) /home/mkopec/Development/Dasharo/coreboot/util/intelp2m/parser/parser.go:236 +0x7a3 main.main() /home/mkopec/Development/Dasharo/coreboot/util/intelp2m/main.go:137 +0x8c9 ``` https://review.coreboot.org/c/coreboot/+/63403/comment/67e8961a_30799b07 PS1, Line 1: adl_h > For golang, it is preferable not to use the underscore in the package name. […] Done https://review.coreboot.org/c/coreboot/+/63403/comment/2fb15c82_56e47c2f PS1, Line 22: > step 1: Let's add functions to the interface that have a common code with Cannon Lake. Done https://review.coreboot.org/c/coreboot/+/63403/comment/29187a3d_02c58f78 PS1, Line 23: type InheritanceMacro interface { : GpoMacroAdd() : NativeFunctionMacroAdd() : NoConnMacroAdd() : } > type InheritanceMacro interface { […] Done https://review.coreboot.org/c/coreboot/+/63403/comment/4ace51be_a50ca852 PS1, Line 67: func (PlatformSpecific) Pull() { > func (platform PlatformSpecific) Pull() { […] Done https://review.coreboot.org/c/coreboot/+/63403/comment/8e2cd1fd_7f278a7d PS1, Line 106: // Generate macro to cause NMI when configured in GPIO input mode : func nmiRoute() bool { : macro := common.GetMacro() : if macro.Register(PAD_CFG_DW0).GetGPIOInputRouteNMI() == 0 { : return false : } : // PAD_CFG_GPI_NMI(GPIO_24, UP_20K, DEEP, LEVEL, INVERT), : macro.Add("_NMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") : return true : } : : // Generate macro to cause SCI when configured in GPIO input mode : func sciRoute() bool { : macro := common.GetMacro() : dw0 := macro.Register(PAD_CFG_DW0) : if dw0.GetGPIOInputRouteSCI() == 0 { : return false : } : // PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv) : macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") : return true : } : : // Generate macro to cause SMI when configured in GPIO input mode : func smiRoute() bool { : macro := common.GetMacro() : dw0 := macro.Register(PAD_CFG_DW0) : if dw0.GetGPIOInputRouteSMI() == 0 { : return false : } : // PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv) : macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),") : return true : } > remove Done https://review.coreboot.org/c/coreboot/+/63403/comment/cf947564_2b59caf2 PS1, Line 142: func (PlatformSpecific) GpiMacroAdd() { > func (platform PlatformSpecific) GpiMacroAdd() { […] Done https://review.coreboot.org/c/coreboot/+/63403/comment/4f74b319_a321394a PS1, Line 204: snr.PlatformSpecific{} > cnl.PlatformSpecific{} […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5871394bcb0636c2c803607ffb129441aa934417 Gerrit-Change-Number: 63403 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 07:48:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util/lint/checkpatch.pl: Update lines related to "codespell"
by Elyes Haouas (Code Review) 07 Apr '22

07 Apr '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63435 ) Change subject: util/lint/checkpatch.pl: Update lines related to "codespell" ...................................................................... util/lint/checkpatch.pl: Update lines related to "codespell" Change-Id: I55cc4255ea88723c813a04d87e4c028c64f92dbd Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/lint/checkpatch.pl 1 file changed, 47 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/63435/1 diff --git a/util/lint/checkpatch.pl b/util/lint/checkpatch.pl index 9355186..0bb6844 100755 --- a/util/lint/checkpatch.pl +++ b/util/lint/checkpatch.pl @@ -22,6 +22,9 @@ use Getopt::Long qw(:config no_auto_abbrev); my $quiet = 0; +my $verbose = 0; +my %verbose_messages = (); +my %verbose_emitted = (); my $tree = 1; my $chk_signoff = 1; my $chk_patch = 1; @@ -60,6 +63,7 @@ my $spelling_file = "$D/spelling.txt"; my $codespell = 0; my $codespellfile = "/usr/share/codespell/dictionary.txt"; +my $user_codespellfile = ""; my $conststructsfile = "$D/const_structs.checkpatch"; my $typedefsfile = ""; my $color = "auto"; @@ -127,7 +131,7 @@ --ignore-perl-version override checking of perl version. expect runtime errors. --codespell Use the codespell dictionary for spelling/typos - (default:/usr/share/codespell/dictionary.txt) + (default:$codespellfile) --codespellfile Use this codespell dictionary --typedefsfile Read additional types from this file --color[=WHEN] Use colors 'always', 'never', or only when output @@ -235,17 +239,56 @@ 'debug=s' => \%debug, 'test-only=s' => \$tst_only, 'codespell!' => \$codespell, - 'codespellfile=s' => \$codespellfile, + 'codespellfile=s' => \$user_codespellfile, 'typedefsfile=s' => \$typedefsfile, 'color=s' => \$color, 'no-color' => \$color, #keep old behaviors of -nocolor 'nocolor' => \$color, #keep old behaviors of -nocolor 'h|help' => \$help, 'version' => \$help -) or help(1); +) or $help = 2; -help(0) if ($help); +if ($user_codespellfile) { + # Use the user provided codespell file unconditionally + $codespellfile = $user_codespellfile; +} elsif (!(-f $codespellfile)) { + # If /usr/share/codespell/dictionary.txt is not present, try to find it + # under codespell's install directory: <codespell_root>/data/dictionary.txt + if (($codespell || $help) && which("python3") ne "") { + my $python_codespell_dict = << "EOF"; +import os.path as op +import codespell_lib +codespell_dir = op.dirname(codespell_lib.__file__) +codespell_file = op.join(codespell_dir, 'data', 'dictionary.txt') +print(codespell_file, end='') +EOF + + my $codespell_dict = `python3 -c "$python_codespell_dict" 2> /dev/null`; + $codespellfile = $codespell_dict if (-f $codespell_dict); + } +} + +# $help is 1 if either -h, --help or --version is passed as option - exitcode: 0 +# $help is 2 if invalid option is passed - exitcode: 1 +help($help - 1) if ($help); + +die "$P: --git cannot be used with --file or --fix\n" if ($git && ($file || $fix)); +die "$P: --verbose cannot be used with --terse\n" if ($verbose && $terse); + +if ($color =~ /^[01]$/) { + $color = !$color; +} elsif ($color =~ /^always$/i) { + $color = 1; +} elsif ($color =~ /^never$/i) { + $color = 0; +} elsif ($color =~ /^auto$/i) { + $color = (-t STDOUT); +} else { + die "$P: Invalid color mode: $color\n"; +} + +load_docs() if ($verbose); list_types(0) if ($list_types); $fix = 1 if ($fix_inplace); -- To view, visit https://review.coreboot.org/c/coreboot/+/63435 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55cc4255ea88723c813a04d87e4c028c64f92dbd Gerrit-Change-Number: 63435 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/intelp2m: Add support for Alder Lake H macro generation
by Michał Kopeć (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Michał Żygowski, Michał Kopeć. Hello build bot (Jenkins), Michał Żygowski, Maxim Polyakov, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63403 to look at the new patch set (#2). Change subject: util/intelp2m: Add support for Alder Lake H macro generation ...................................................................... util/intelp2m: Add support for Alder Lake H macro generation Add support for Alder Lake-H as a separate parsing profile, copying the existing 'Cannon' profile and adjusting for differences in reset mapping and GPIO macro generation. TEST=Generate GPIO macros for MSI PRO Z690-A Change-Id: I5871394bcb0636c2c803607ffb129441aa934417 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- M util/intelp2m/config/config.go M util/intelp2m/description.md M util/intelp2m/main.go M util/intelp2m/parser/parser.go A util/intelp2m/platforms/adlh/macro.go A util/intelp2m/platforms/adlh/template.go 6 files changed, 146 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/63403/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63403 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5871394bcb0636c2c803607ffb129441aa934417 Gerrit-Change-Number: 63403 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP
by Reka Norman (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Sridhar Siricilla, Reka Norman, Tim Wawrzynczak. Reka Norman has uploaded a new patch set (#5) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63141 ) Change subject: soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP ...................................................................... soc/intel/alderlake/pmc_descriptor.c: Don't depend on FMAP The Intel descriptor region is always at the bottom of the flash so using a hardcoded 0 offset is fine. This allows the code to work with boards with SI_DESC in the fmap region. This is for instance the case with the autogenerated FMAP. Change-Id: I2d180353bfd69601ce03feb59101fb425859e779 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/alderlake/bootblock/update_descriptor.c 1 file changed, 9 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/63141/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/63141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d180353bfd69601ce03feb59101fb425859e779 Gerrit-Change-Number: 63141 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Revert "soc/intel/alderlake: Define Kconfigs for Descriptor Region"
by Reka Norman (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Sridhar Siricilla, Reka Norman. Reka Norman has uploaded a new patch set (#4) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63140 ) Change subject: Revert "soc/intel/alderlake: Define Kconfigs for Descriptor Region" ...................................................................... Revert "soc/intel/alderlake: Define Kconfigs for Descriptor Region" No reason to put this in an Alderlake specific Kconfig file. This reverts commit b24c528e46b394d274ed32ef04067a73a9308425. Change-Id: I4529329d20f02a5a2aafe7a2ef08289a2faf2fbf Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/alderlake/Kconfig 1 file changed, 0 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/63140/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/63140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4529329d20f02a5a2aafe7a2ef08289a2faf2fbf Gerrit-Change-Number: 63140 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.corp-partner.google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Revert "soc/intel/alderlake: Use Kconfigs for Descriptor Region"
by Reka Norman (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Arthur Heymans, Reka Norman. Reka Norman has uploaded a new patch set (#4) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63139 ) Change subject: Revert "soc/intel/alderlake: Use Kconfigs for Descriptor Region" ...................................................................... Revert "soc/intel/alderlake: Use Kconfigs for Descriptor Region" USe FMAP offsets directly with static asserts instead of defining a Kconfig variable. This reverts commit be082fe9f401304c29a839c63a835e793b9f41ff. Change-Id: Ie858341f0723a6b278ea53960f1e09b37bc82d83 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/alderlake/bootblock/update_descriptor.c 1 file changed, 10 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/63139/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/63139 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie858341f0723a6b278ea53960f1e09b37bc82d83 Gerrit-Change-Number: 63139 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-CC: Reka Norman <rekanorman(a)google.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2022