coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: util/lint/checkpatch.pl: Update to v5.18-2 lines related to "codespell"
by Martin Roth (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Elyes Haouas. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63435 ) Change subject: util/lint/checkpatch.pl: Update to v5.18-2 lines related to "codespell" ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/63435/comment/bb2b9957_11673e83 PS1, Line 7: Update lines > Is this to match the kernel version? Might add that to the commit message, otherwise it's not clear […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/63435 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55cc4255ea88723c813a04d87e4c028c64f92dbd Gerrit-Change-Number: 63435 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:27:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/smm_module_loader: Drop superfluous check
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63480 ) Change subject: cpu/x86/smm_module_loader: Drop superfluous check ...................................................................... Patch Set 3: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I275d5dda9c69cc89608450ae27dd5dbd581e3595 Gerrit-Change-Number: 63480 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:22:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/mp_init.c: Drop 'real' vs 'used' save state
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63479 ) Change subject: cpu/x86/mp_init.c: Drop 'real' vs 'used' save state ...................................................................... Patch Set 3: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63479 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0002a33b6d0f792d8d78cf625fd7e830e3e50fc Gerrit-Change-Number: 63479 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:20:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Remove dmi driver
by Wonkyu Kim (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Anjaneya "Reddy" Chagam, Subrata Banik, Jonathan Zhang, Ravishankar Sarawadi, Johnny Lin, Christian Walter, Tim Wawrzynczak, Arthur Heymans, Michael Niewöhner, Tim Chu. Hello build bot (Jenkins), Anjaneya "Reddy" Chagam, Subrata Banik, Jonathan Zhang, Ravishankar Sarawadi, Johnny Lin, Christian Walter, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Michael Niewöhner, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63472 to look at the new patch set (#5). Change subject: soc/intel: Remove dmi driver ...................................................................... soc/intel: Remove dmi driver Remove dmi driver as it's replaced with gpmr driver Update old platforms which use dmi.h Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: Ib340ff1ab7fd88b1e7b3860ffec055a75e562de7 --- M src/mainboard/ocp/deltalake/bootblock.c M src/soc/intel/alderlake/bootblock/pch.c M src/soc/intel/cannonlake/bootblock/pch.c D src/soc/intel/common/block/dmi/Kconfig D src/soc/intel/common/block/dmi/Makefile.inc D src/soc/intel/common/block/dmi/dmi.c D src/soc/intel/common/block/include/intelblocks/dmi.h M src/soc/intel/common/block/include/intelblocks/lpc_lib.h M src/soc/intel/common/pch/Kconfig M src/soc/intel/elkhartlake/bootblock/pch.c M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/jasperlake/bootblock/pch.c M src/soc/intel/skylake/bootblock/pch.c M src/soc/intel/tigerlake/bootblock/pch.c M src/soc/intel/xeon_sp/pch.c 15 files changed, 4 insertions(+), 159 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/63472/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/63472 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib340ff1ab7fd88b1e7b3860ffec055a75e562de7 Gerrit-Change-Number: 63472 Gerrit-PatchSet: 5 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu/qemu-x86: Allow up to 255 cores
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63483 ) Change subject: cpu/qemu-x86: Allow up to 255 cores ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9eea91fb09f47de8b06de9fa7eb2ad66ef4dc7e2 Gerrit-Change-Number: 63483 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:11:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: arch/x86/smbios.c: Fix for CONFIG_MAX_CPUS > 255
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63482 ) Change subject: arch/x86/smbios.c: Fix for CONFIG_MAX_CPUS > 255 ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I079c99006fea95ba3dc2fb02c95a3747af55e218 Gerrit-Change-Number: 63482 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:10:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/smm_module_loader: Update logging
by build bot (Jenkins) (Code Review) 07 Apr '22

07 Apr '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63481 ) Change subject: cpu/x86/smm_module_loader: Update logging ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63481 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84d49a394cc53d78f1e1d3936502ac16810daf9f Gerrit-Change-Number: 63481 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:09:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: implement ioc driver
by Angel Pons (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Jamie Ryu, Wonkyu Kim, Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Nick Vaccaro. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63198 ) Change subject: soc/intel/common: implement ioc driver ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/common/block/ioc/ioc.c: https://review.coreboot.org/c/coreboot/+/63198/comment/c3bf6650_dcf71831 PS5, Line 9: MCH_BASE_ADDRESS > worth checking MCHBAR bit 0 if memory space is enabled ? MCHBAR should be enabled very early (in bootblock) -- To view, visit https://review.coreboot.org/c/coreboot/+/63198 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I768027c2ca78310c03845f70f17df19dc8cd0982 Gerrit-Change-Number: 63198 Gerrit-PatchSet: 6 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:07:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/qualcomm/common: Make clock_configure() check for exact matches
by Julius Werner (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Shelley Chen, Taniya Das, Paul Menzel. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63289 ) Change subject: soc/qualcomm/common: Make clock_configure() check for exact matches ...................................................................... Patch Set 6: (2 comments) File src/soc/qualcomm/common/clock.c: https://review.coreboot.org/c/coreboot/+/63289/comment/0a9a2548_33fc8e46 PS6, Line 104: die("Failed to find a matching clock frequency!\n"); You should print hz and the clk (rcg) pointer in this message so it's possible to understand what exactly it was trying to do that failed. File src/soc/qualcomm/sc7280/clock.c: https://review.coreboot.org/c/coreboot/+/63289/comment/a95073e7_0365f7f3 PS6, Line 425: return clock_configure((struct clock_rcg *) Does this work? Note that this function never initializes mdss_clk_cfg.hz right now, I think it needs to to make the check match. -- To view, visit https://review.coreboot.org/c/coreboot/+/63289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cfad7236241f4d03ff1a56683654649658b68fc Gerrit-Change-Number: 63289 Gerrit-PatchSet: 6 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-CC: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Taniya Das <quic_tdas(a)quicinc.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:07:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: implement ioc driver
by Wonkyu Kim (Code Review) 07 Apr '22

07 Apr '22

Attention is currently required from: Jamie Ryu, Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Angel Pons, Nick Vaccaro. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63198 ) Change subject: soc/intel/common: implement ioc driver ...................................................................... Patch Set 5: (16 comments) File src/soc/intel/common/block/gpmr/Kconfig: https://review.coreboot.org/c/coreboot/+/63198/comment/f11151ea_689230ee PS5, Line 3: SOC_INTEL_COMMON_BLOCK_DMI || SOC_INTEL_COMMON_BLOCK_IOC > how do you plan to restrict a user from selecting both Kconfig. […] SOC_INTEL_COMMON_BLOCK_DMI will be updated SOC_INTEL_COMMON_PCR. And Add checking as you mentioned. https://review.coreboot.org/c/coreboot/+/63198/comment/6d53c9a6_43a09fd6 PS5, Line 5: DMI > I guess you are talking about access mechanism rather interface here hence, PCR might be more applic […] Ack File src/soc/intel/common/block/include/intelblocks/gpmr.h: https://review.coreboot.org/c/coreboot/+/63198/comment/09879b03_cd6847b6 PS5, Line 12: #define MAX_GPMR_REGS IOC_MAX_GPMR_REGS : #define GPMR_OFFSET IOC_GPMR_OFFSET : #define GPMR_LIMIT_MASK IOC_GPMR_LIMIT_MASK : #define GPMR_BASE_SHIFT IOC_GPMR_BASE_SHIFT : #define GPMR_BASE_MASK IOC_GPMR_BASE_MASK : #define GPMR_DID_OFFSET IOC_GPMR_DID_OFFSET : #define GPMR_EN IOC_GPMR_EN > suggestion: keep two .h file as ioc_gpmr.h and pcr_gpmr. […] Ack File src/soc/intel/common/block/include/intelblocks/ioc.h: https://review.coreboot.org/c/coreboot/+/63198/comment/53696746_547a9f19 PS5, Line 10: <soc/ioc_reg.h> > I don't prefer override like UEFI does, it creates confusion while debugging, if you like to refer f […] I'll remove this option for now. Just add this option in case new SOC has different offsets. And add change if we have new SOC which has different offsets. File src/soc/intel/common/block/ioc/ioc.c: https://review.coreboot.org/c/coreboot/+/63198/comment/f47e05ce_ccb84a9e PS5, Line 9: write32 > use `write32p` so, you don't need (void *) casting Ack https://review.coreboot.org/c/coreboot/+/63198/comment/75eb8aee_d3d0f93f PS5, Line 15: read32 > read32p Ack File src/soc/intel/common/block/lpc/lpc_lib.c: https://review.coreboot.org/c/coreboot/+/63198/comment/e1f8052e_f5fdb819 PS5, Line 28: if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOC)) : ioc_reg_write32(R_IOC_CFG_LPCIOE, io_enables); : else if (CONFIG(SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_DMI)) : pcr_write16(PID_DMI, PCR_DMI_LPCIOE, io_enables); > why not `gpmr_write32`, i guess it's possible to unify based on register name. Ack https://review.coreboot.org/c/coreboot/+/63198/comment/6e81f274_08711b23 PS5, Line 51: pcr_write16(PID_DMI, PCR_DMI_LPCIOD, io_ranges); > same as above Ack https://review.coreboot.org/c/coreboot/+/63198/comment/2e0ef84b_c2b62737 PS5, Line 125: > same as above Ack https://review.coreboot.org/c/coreboot/+/63198/comment/77675418_8fa04e1c PS5, Line 161: pcr_write32(PID_DMI, PCR_DMI_LPCGMR, lgmr); > same as above Ack https://review.coreboot.org/c/coreboot/+/63198/comment/88e24c5f_b3e305b7 PS5, Line 265: } > same as above Ack File src/soc/intel/common/block/smbus/tco.c: https://review.coreboot.org/c/coreboot/+/63198/comment/0c49e3ea_29e22587 PS5, Line 126: " > Remove stray " Ack https://review.coreboot.org/c/coreboot/+/63198/comment/4b86d933_dc894415 PS5, Line 130: pcr_write32(PID_DMI, PCR_DMI_TCOBASE, tcobase | TCOEN); > use gpmr_write32 Ack File src/soc/intel/common/pch/lockdown/lockdown.c: https://review.coreboot.org/c/coreboot/+/63198/comment/70bc97b7_88836f74 PS5, Line 31: if (CONFIG(SOC_INTEL_COMMON_BLOCK_IOC)) > As per the coding style, this should have braces: https://doc.coreboot. […] Ack https://review.coreboot.org/c/coreboot/+/63198/comment/bf728e03_51f08318 PS5, Line 35: /* : * GCS reg of DMI : * : * When set, prevents GCS.BBS from being changed : * GCS.BBS: (Boot BIOS Strap) This field determines the destination : * of accesses to the BIOS memory range. : * Bits Description : * "0b": SPI : * "1b": LPC/eSPI : */ : pcr_or8(PID_DMI, PCR_DMI_GCS, PCR_DMI_GCS_BILD); : : /* : * Set Secure Register Lock (SRL) bit in DMI control register to lock : * DMI configuration. : */ > Please indent the comments accordingly as well. pcr_XXX(PID_DMI, function will be replaced with gpmr apis. https://review.coreboot.org/c/coreboot/+/63198/comment/d9a2f7f7_7fa33f66 PS5, Line 53: } > you can create gmpr read_or8/32 function. Sure we can make or32 or8 but PCR_DMI_DMICTL_SRLOCK is not exist in IOC. -- To view, visit https://review.coreboot.org/c/coreboot/+/63198 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I768027c2ca78310c03845f70f17df19dc8cd0982 Gerrit-Change-Number: 63198 Gerrit-PatchSet: 5 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Thu, 07 Apr 2022 21:04:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit April 2022