Attention is currently required from: Arthur Heymans.
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63478 )
Change subject: cpu/x86/smm_module_load: Rewrite setup_stub
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63478/comment/59524865_dddc5460
PS4, Line 13: only later the parameters of the first stub where filled it. This
nit: s/where/were/, s/it/in/
--
To view, visit https://review.coreboot.org/c/coreboot/+/63478
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I42ef9d6a30f3039f25e2cde975086a1365ca4182
Gerrit-Change-Number: 63478
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Comment-Date: Fri, 08 Apr 2022 04:18:38 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Kane Chen has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/63486 )
Change subject: soc/intel/common: Enable rom cache on all CPU threads
......................................................................
soc/intel/common: Enable rom cache on all CPU threads
In the previous implementation, it asks all CPUs/threads to run
_x86_setup_mtrrs and BSP to run post_cpus_add_romcache.
However the BSP doesn't wait all threads to finish _x86_setup_mtrrs
and run post_cpus_add_romcache immediately. It causes a race condition
that other thread in same core could finish _x86_setup_mtrrs later
than post_cpus_add_romcache run by BSP.
MTRR is a core level MSR, so settings in post_cpus_add_romcache
could be overriden unexpectedly by other thread in the same core.
Ex: Core0, thread 1 finishes _x86_setup_mtrrs later than
post_cpus_add_romcache run by bsp Core0 thread 0.
Instead of using different MTRRs settings on BSP/APs and cause race
conditionm, this patch asks all cpu/threads to run
post_cpus_add_romcache, so that MTRRs on all cores are aligned.
This patch also calls need_restore_mtrr to
set put_back_original_solution in order to restor mtrr later in
remove_temp_solution.
BUG=b:225766934
TEST=Tested on gimble and found rom cache is set properly right before
payload lzma decompress and restored to original mtrr in the end
of coreboot
Change-Id: I1d7ffc6e5f5ec49abf848d3cd9f0435c93f834dc
Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
---
M src/soc/intel/common/block/cpu/mp_init.c
1 file changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/63486/2
--
To view, visit https://review.coreboot.org/c/coreboot/+/63486
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1d7ffc6e5f5ec49abf848d3cd9f0435c93f834dc
Gerrit-Change-Number: 63486
Gerrit-PatchSet: 2
Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63486 )
Change subject: soc/intel/common: Enable rom cache on all CPU threads
......................................................................
soc/intel/common: Enable rom cache on all CPU threads
In the previous implementation, it asks all CPUs/threads to run
_x86_setup_mtrrs and BSP to run post_cpus_add_romcache.
However the BSP doesn't wait all threads to finish _x86_setup_mtrrs
and run post_cpus_add_romcache immediately. It causes a race condition
that other thread in same core could finish _x86_setup_mtrrs later
than post_cpus_add_romcache run by BSP.
MTRR is a core level MSR, so settings in post_cpus_add_romcache
could be overriden unexpectedly by other thread in the same core.
Ex: Core0, thread 1 finishes _x86_setup_mtrrs later than
post_cpus_add_romcache run by bsp Core0 thread 0.
Instead of using different MTRRs settings on BSP/APs and cause race
conditionm, this patch asks all cpu/threads to run
post_cpus_add_romcache, so that MTRRs on all cores are aligned.
This patch also calls need_restore_mtrr to
set put_back_original_solution in order to restor mtrr later in
remove_temp_solution.
BUG=b:225766934
TEST=Tested on gimble and found rom cache is set properly right before
payload lzma decompress and restored to original mtrr in the end
of coreboot
Change-Id: I1d7ffc6e5f5ec49abf848d3cd9f0435c93f834dc
Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
---
M src/soc/intel/common/block/cpu/mp_init.c
1 file changed, 6 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/63486/1
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 823f23e..8c18840 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -152,7 +152,6 @@
init_cpus();
}
-
static void post_cpus_add_romcache(void)
{
if (!CONFIG(BOOT_DEVICE_MEMORY_MAPPED))
@@ -164,6 +163,7 @@
static void wrapper_x86_setup_mtrrs(void *unused)
{
x86_setup_mtrrs_with_detect();
+ post_cpus_add_romcache();
}
/* Ensure to re-program all MTRRs based on DRAM resource settings */
@@ -172,7 +172,11 @@
if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL) != CB_SUCCESS)
printk(BIOS_ERR, "MTRR programming failure\n");
- post_cpus_add_romcache();
+ /* Inside wrapper_x86_setup_mtrrs, it will cache spi address.
+ * So we need to restore mtrr later in remove_temp_solution.
+ */
+ need_restore_mtrr();
+
x86_mtrr_check();
}
--
To view, visit https://review.coreboot.org/c/coreboot/+/63486
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1d7ffc6e5f5ec49abf848d3cd9f0435c93f834dc
Gerrit-Change-Number: 63486
Gerrit-PatchSet: 1
Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
Gerrit-MessageType: newchange
Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63485 )
Change subject: cpu/x86: Add function to set put_back_original_solution
......................................................................
cpu/x86: Add function to set put_back_original_solution
put_back_original_solution flag in mtrr.c is static, but there is a
need to set put_back_original_solution outside of mtrr.c in order to
let remove_temp_solution work.
Change-Id: Ic6b5683b2aa7398a5e141f710394ab772e9775e7
Signed-off-by: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
---
M src/cpu/x86/mtrr/mtrr.c
M src/include/cpu/x86/mtrr.h
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/63485/1
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 89cac7f..18ab7fa 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -908,6 +908,11 @@
memranges_teardown(&addr_space);
}
+void need_restore_mtrr(void)
+{
+ put_back_original_solution = true;
+}
+
static void remove_temp_solution(void *unused)
{
if (put_back_original_solution)
diff --git a/src/include/cpu/x86/mtrr.h b/src/include/cpu/x86/mtrr.h
index b8d1517..5a23784 100644
--- a/src/include/cpu/x86/mtrr.h
+++ b/src/include/cpu/x86/mtrr.h
@@ -96,6 +96,7 @@
/* Set up fixed MTRRs but do not enable them. */
void x86_setup_fixed_mtrrs_no_enable(void);
void x86_mtrr_check(void);
+void need_restore_mtrr(void);
/* Insert a temporary MTRR range for the duration of coreboot's runtime.
* This function needs to be called after the first MTRR solution is derived. */
--
To view, visit https://review.coreboot.org/c/coreboot/+/63485
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic6b5683b2aa7398a5e141f710394ab772e9775e7
Gerrit-Change-Number: 63485
Gerrit-PatchSet: 1
Gerrit-Owner: Kane Chen <kane.chen(a)intel.corp-partner.google.com>
Gerrit-MessageType: newchange
Attention is currently required from: Arthur Heymans.
Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63473 )
Change subject: cpu/x86/smm_module_loader.c: Clean up printing the CPU map
......................................................................
Patch Set 1: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/63473
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I7fe9f1004597602147aae72f4b754395b6b527cf
Gerrit-Change-Number: 63473
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Comment-Date: Fri, 08 Apr 2022 01:33:08 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Tim Wawrzynczak.
Shon Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63441 )
Change subject: mb/google/brya/var/vell: camera LED flicker problem
......................................................................
Patch Set 3: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/63441
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I846ec4cb5c4527f5664699b31d0d561d390d938c
Gerrit-Change-Number: 63441
Gerrit-PatchSet: 3
Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Jimmy Su <jimmy.su(a)intel.corp-partner.google.com>
Gerrit-CC: Kevin Chiu <coreboot.test(a)gmail.com>
Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Comment-Date: Fri, 08 Apr 2022 01:14:15 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Tim Wawrzynczak, Shon Wang.
Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63441
to look at the new patch set (#3).
Change subject: mb/google/brya/var/vell: camera LED flicker problem
......................................................................
mb/google/brya/var/vell: camera LED flicker problem
BUG=b:219644184
TEST=Build and boot on vell, observe whether camera LED flicker
Change-Id: I846ec4cb5c4527f5664699b31d0d561d390d938c
Signed-off-by: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/vell/overridetree.cb
1 file changed, 10 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/63441/3
--
To view, visit https://review.coreboot.org/c/coreboot/+/63441
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I846ec4cb5c4527f5664699b31d0d561d390d938c
Gerrit-Change-Number: 63441
Gerrit-PatchSet: 3
Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Jimmy Su <jimmy.su(a)intel.corp-partner.google.com>
Gerrit-CC: Kevin Chiu <coreboot.test(a)gmail.com>
Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Tim Wawrzynczak, Shon Wang.
Shon Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63441 )
Change subject: mb/google/brya/var/vell: camera LED flicker problem
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> this is failing because: […]
understand, thank you
--
To view, visit https://review.coreboot.org/c/coreboot/+/63441
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I846ec4cb5c4527f5664699b31d0d561d390d938c
Gerrit-Change-Number: 63441
Gerrit-PatchSet: 2
Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Jimmy Su <jimmy.su(a)intel.corp-partner.google.com>
Gerrit-CC: Kevin Chiu <coreboot.test(a)gmail.com>
Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Comment-Date: Fri, 08 Apr 2022 01:11:23 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-MessageType: comment
Shon Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63441 )
Change subject: mb/google/brya/var/vell: camera LED flicker problem
......................................................................
Patch Set 2: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/63441
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I846ec4cb5c4527f5664699b31d0d561d390d938c
Gerrit-Change-Number: 63441
Gerrit-PatchSet: 2
Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Jimmy Su <jimmy.su(a)intel.corp-partner.google.com>
Gerrit-CC: Kevin Chiu <coreboot.test(a)gmail.com>
Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Gerrit-Comment-Date: Fri, 08 Apr 2022 01:10:27 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment