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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63289 )
Change subject: soc/qualcomm/common: Make clock_configure() check for exact matches
......................................................................
Patch Set 7:
(1 comment)
File src/soc/qualcomm/sc7280/clock.c:
https://review.coreboot.org/c/coreboot/+/63289/comment/5228ba17_01812297
PS7, Line 412: mdss_clk_cfg.hz = mdss_mdp_cfg[idx].hz;
This isn't enough: for the (clk_type != MDSS_CLK_MDP) clocks, we never get here. Also, since this is the <= search, hz doesn't necessarily match mdss_mdp_cfg[idx].hz.
In order to make the clock_configure() check work, hz doesn't actually have to match the real physical frequency that comes out of the hardware. All that the check tests is that clk_cfg[idx].hz == hz. So the cheap way to solve this here is to just put mdss_clk_cfg.hz = hz (outside of this if-block), like the sc7180 version already does. (That makes the test kind of pointless in this case, since clock_configure() is just comparing two fake values that you gave it, but it's an easy way to avoid the extra `strict` parameter for this one function where we actually don't have a perfect match we can find.)
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Hello Felix Singer, Stefan Ott, build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Sean Rhodes, Nico Huber, Michał Żygowski, Johnny Lin, Christian Walter, siemens-bot, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Angel Pons, Julius Werner, Michael Niewöhner, Erik van den Bogaert, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63424
to look at the new patch set (#11).
Change subject: tpm: Refactor TPM Kconfig dimensions
......................................................................
tpm: Refactor TPM Kconfig dimensions
Break TPM related Kconfig into the following dimensions:
TPM transport support:
config CRB_TPM
config I2C_TPM
config SPI_TPM
config MEMORY_MAPPED_TPM (new)
TPM brand, not defining any of the above is valid, and result in "generic" support:
config TPM_ATMEL (new)
config TPM_GOOGLE (new)
config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE)
config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE)
What protocol the TPM chip supports:
config MAINBOARD_HAS_TPM1
config MAINBOARD_HAS_TPM2
What the user chooses to compile (restricted by the above):
config NO_TPM
config TPM1
config TPM2
The following Kconfigs will be replaced as indicated:
config TPM_CR50 -> TPM_GOOGLE
config MAINBOARD_HAS_CRB_TPM -> CRB_TPM
config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL
config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE
config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM
config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE
Signed-off-by: Jes B. Klinke <jbk(a)chromium.org>
Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e
---
M Documentation/getting_started/kconfig.md
M src/drivers/crb/Kconfig
M src/drivers/crb/Makefile.inc
A src/drivers/crb/chip.c
M src/drivers/crb/tis.c
M src/drivers/i2c/tpm/Kconfig
M src/drivers/i2c/tpm/Makefile.inc
M src/drivers/pc80/tpm/Kconfig
M src/drivers/pc80/tpm/Makefile.inc
A src/drivers/pc80/tpm/chip.c
M src/drivers/pc80/tpm/tis.c
M src/drivers/spi/tpm/Kconfig
M src/drivers/spi/tpm/Makefile.inc
M src/drivers/spi/tpm/tpm.c
M src/drivers/tpm/Makefile.inc
M src/mainboard/acer/aspire_vn7_572g/Kconfig
M src/mainboard/asrock/b85m_pro4/Kconfig
M src/mainboard/asrock/h110m/Kconfig
M src/mainboard/asus/am1i-a/Kconfig
M src/mainboard/asus/h61-series/Kconfig.name
M src/mainboard/asus/p8x7x-series/Kconfig.name
M src/mainboard/clevo/cml-u/Kconfig
M src/mainboard/clevo/kbl-u/Kconfig
M src/mainboard/clevo/tgl-u/Kconfig
M src/mainboard/dell/snb_ivb_workstations/Kconfig
M src/mainboard/emulation/qemu-q35/Kconfig
M src/mainboard/facebook/fbg1701/Kconfig
M src/mainboard/facebook/monolith/Kconfig
M src/mainboard/foxconn/g41s-k/Kconfig
M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig
M src/mainboard/google/asurada/Kconfig
M src/mainboard/google/auron/Kconfig
M src/mainboard/google/beltino/Kconfig
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/butterfly/Kconfig
M src/mainboard/google/cherry/Kconfig
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/cyan/Kconfig
M src/mainboard/google/daisy/Kconfig
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/deltaur/Kconfig
M src/mainboard/google/drallion/Kconfig
M src/mainboard/google/eve/Kconfig
M src/mainboard/google/fizz/Kconfig
M src/mainboard/google/foster/Kconfig
M src/mainboard/google/gale/Kconfig
M src/mainboard/google/glados/Kconfig
M src/mainboard/google/gru/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/herobrine/Kconfig
M src/mainboard/google/herobrine/bootblock.c
M src/mainboard/google/jecht/Kconfig
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/kukui/Kconfig
M src/mainboard/google/link/Kconfig
M src/mainboard/google/nyan_big/Kconfig
M src/mainboard/google/nyan_blaze/Kconfig
M src/mainboard/google/oak/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/parrot/Kconfig
M src/mainboard/google/peach_pit/Kconfig
M src/mainboard/google/poppy/Kconfig
M src/mainboard/google/rambi/Kconfig
M src/mainboard/google/reef/Kconfig
M src/mainboard/google/sarien/Kconfig
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/slippy/Kconfig
M src/mainboard/google/smaug/Kconfig
M src/mainboard/google/storm/Kconfig
M src/mainboard/google/stout/Kconfig
M src/mainboard/google/trogdor/Kconfig
M src/mainboard/google/veyron/Kconfig
M src/mainboard/google/veyron_mickey/Kconfig
M src/mainboard/google/veyron_rialto/Kconfig
M src/mainboard/google/volteer/Kconfig
M src/mainboard/google/volteer/mainboard.c
M src/mainboard/google/volteer/variants/chronicler/overridetree.cb
M src/mainboard/google/volteer/variants/volteer2/overridetree.cb
M src/mainboard/google/volteer/variants/volteer2/variant.c
M src/mainboard/google/zork/Kconfig
M src/mainboard/hp/compaq_8200_elite_sff/Kconfig
M src/mainboard/hp/folio_9480m/Kconfig
M src/mainboard/hp/snb_ivb_laptops/Kconfig
M src/mainboard/hp/z220_series/Kconfig
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/baskingridge/Kconfig
M src/mainboard/intel/coffeelake_rvp/Kconfig
M src/mainboard/intel/galileo/Kconfig
M src/mainboard/intel/glkrvp/Kconfig
M src/mainboard/intel/kblrvp/Kconfig
M src/mainboard/intel/kunimitsu/Kconfig
M src/mainboard/intel/shadowmountain/Kconfig
M src/mainboard/intel/strago/Kconfig
M src/mainboard/intel/tglrvp/Kconfig
M src/mainboard/intel/wtm2/Kconfig
M src/mainboard/kontron/bsl6/Kconfig
M src/mainboard/kontron/mal10/Kconfig
M src/mainboard/lenovo/s230u/Kconfig
M src/mainboard/lenovo/t410/Kconfig
M src/mainboard/lenovo/t420/Kconfig
M src/mainboard/lenovo/t420s/Kconfig
M src/mainboard/lenovo/t430/Kconfig
M src/mainboard/lenovo/t430s/Kconfig
M src/mainboard/lenovo/t440p/Kconfig
M src/mainboard/lenovo/t520/Kconfig
M src/mainboard/lenovo/t530/Kconfig
M src/mainboard/lenovo/w541/Kconfig
M src/mainboard/lenovo/x131e/Kconfig
M src/mainboard/lenovo/x1_carbon_gen1/Kconfig
M src/mainboard/lenovo/x201/Kconfig
M src/mainboard/lenovo/x220/Kconfig
M src/mainboard/lenovo/x230/Kconfig
M src/mainboard/libretrend/lt1000/Kconfig
M src/mainboard/ocp/deltalake/Kconfig
M src/mainboard/opencellular/elgon/Kconfig
M src/mainboard/pcengines/apu1/Kconfig
M src/mainboard/pcengines/apu2/Kconfig
M src/mainboard/prodrive/hermes/Kconfig
M src/mainboard/protectli/vault_kbl/Kconfig
M src/mainboard/purism/librem_cnl/Kconfig.name
M src/mainboard/purism/librem_skl/Kconfig
M src/mainboard/razer/blade_stealth_kbl/Kconfig
M src/mainboard/samsung/lumpy/Kconfig
M src/mainboard/samsung/stumpy/Kconfig
M src/mainboard/siemens/chili/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl6/Kconfig
M src/mainboard/siemens/mc_ehl/Kconfig
M src/mainboard/starlabs/labtop/Kconfig
M src/mainboard/starlabs/lite/Kconfig
M src/mainboard/supermicro/x11-lga1151-series/Kconfig
M src/mainboard/supermicro/x9sae/Kconfig
M src/mainboard/system76/addw1/Kconfig
M src/mainboard/system76/bonw14/Kconfig
M src/mainboard/system76/cml-u/Kconfig
M src/mainboard/system76/darp7/Kconfig
M src/mainboard/system76/galp5/Kconfig
M src/mainboard/system76/gaze15/Kconfig
M src/mainboard/system76/gaze16/Kconfig
M src/mainboard/system76/kbl-u/Kconfig
M src/mainboard/system76/lemp10/Kconfig
M src/mainboard/system76/lemp9/Kconfig
M src/mainboard/system76/oryp5/Kconfig
M src/mainboard/system76/oryp6/Kconfig
M src/mainboard/system76/oryp8/Kconfig
M src/mainboard/system76/whl-u/Kconfig
M src/mainboard/up/squared/Kconfig
M src/security/tpm/Kconfig
M src/security/tpm/Makefile.inc
M src/security/tpm/tss/vendor/cr50/Kconfig
M src/security/vboot/secdata_mock.c
M src/security/vboot/secdata_tpm.c
M src/security/vboot/vboot_logic.c
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/common/Makefile.inc
M src/soc/intel/skylake/acpi/systemagent.asl
M src/soc/intel/tigerlake/Kconfig
M src/vendorcode/google/chromeos/Kconfig
M src/vendorcode/google/chromeos/Makefile.inc
M src/vendorcode/google/chromeos/cse_board_reset.c
163 files changed, 319 insertions(+), 327 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/63424/11
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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63251 )
Change subject: coreboot tables: Add PCIe info to coreboot table
......................................................................
Patch Set 9: Code-Review+1
(2 comments)
Patchset:
PS9:
LGTM from a general coding point of view now, someone who knows the PCIe stuff should review for +2.
File src/commonlib/include/commonlib/coreboot_tables.h:
https://review.coreboot.org/c/coreboot/+/63251/comment/6f28bd05_934c0253
PS9, Line 146: };
Thanks! Can you please also add a
_Static_assert(sizeof(struct lb_pcie) == 36, "lb_uint64_t alignment doesn't work as expected for struct lb_pcie!");
here so that we can be sure this keeps working as it should?
...I feel almost tempted to also change all of these to use a
#define LB_STRUCT(name, contents) struct name { contents }; \
_Static_assert(alignof(struct name) == 4, #name " is not 4-byte aligned. Make sure you use lb_uint64_t instead of uint64_t for all 8-byte members!")
so that it's less likely people will add these wrong in the future. What do you think, is that overkill?
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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63424 )
Change subject: tpm: Refactor TPM Kconfig dimensions
......................................................................
Patch Set 10:
(5 comments)
File src/mainboard/google/volteer/mainboard.c:
https://review.coreboot.org/c/coreboot/+/63424/comment/7b5ebe2a_a6987ee1
PS10, Line 87: CONFIG(TPM_GOOGLE_CR50)
Missing negation, it needs to be !CR50. This check skips enabling the log pulses, and we only need to enable them explicitly for CR50.
File src/soc/intel/common/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/63424/comment/a9e8035b_8bea0807
PS6, Line 23: all-$(CONFIG_TPM_GOOGLE) += tpm_tis.c
> I do not think the H1 hardware allows us to get rid of the ready signal, before Cr50 can accept the […]
Right, I'm just asking if that changed for D1/Ti50?
File src/soc/intel/tigerlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/63424/comment/e8cc9678_9e3b8f9e
PS10, Line 93: # in all low power states. Cr50 TPM, if used, needs to be told to generate longer pulses.
nit: I don't think this comment says anything that the help text for CR50_USE_LONG_INTERRUPT_PULSES doesn't already say, and breaking up this select list with comments looks ugly
File src/vendorcode/google/chromeos/Kconfig:
https://review.coreboot.org/c/coreboot/+/63424/comment/bdecdc07_89ba3e5e
PS6, Line 25: config TPM_GOOGLE_IMMEDIATELY_COMMIT_FW_SECDATA
> I am unsure how it works when a `config` declaration sits inside a condition such as `if CHROMEOS` h […]
Yes,
if CHROMEOS
config XXX
...
is 100% identical syntactic sugar for
config XXX
depends on CHROMEOS
...
configs where a dependency is not met are forced to 0/n/"" regardless of all other factors.
In this case you did exactly the right thing.
File src/vendorcode/google/chromeos/cse_board_reset.c:
https://review.coreboot.org/c/coreboot/+/63424/comment/bd34221c_da744782
PS10, Line 39: (CONFIG(TPM2)
I don't think this check needs to be here. It needs to be above, because the cr50_get_firmware_version() call can only work if CONFIG(TPM2) has been enabled. But down here, we only care about the hardware design of the board, and I believe(?) the Ti50-specific PLTRST routing should still work the same on that same board and solve the problem here even if the coreboot TPM driver is not enabled.
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63493 )
Change subject: soc/intel/alderlake: add chipset devicetree for ADL-S
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
Thinking out loud here, does a fsp_params_common.c, and fsp_params_p_n.c, fsp_params_s.c or something like that make sense? To avoid all of these #ifdefs, I suspect there would be even more
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Change subject: soc/intel/alderlake/retimer.c: Do not access TCSS devices on ADL-S
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> Why not just modify the Makefile, e.g. […]
I see the below patch 👍
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Change subject: soc/intel/alderlake: Unselect USB4 and TCSS options for ADL-S
......................................................................
Patch Set 2:
(1 comment)
File src/soc/intel/alderlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/63500/comment/a58ecbe6_c5eeb9cf
PS2, Line 101: select SOC_INTEL_COMMON_BLOCK_TCSS if !SOC_INTEL_ALDERLAKE_PCH_S
: select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
: select SOC_INTEL_COMMON_BLOCK_USB4 if !SOC_INTEL_ALDERLAKE_PCH_S
: select SOC_INTEL_COMMON_BLOCK_USB4_PCIE if !SOC_INTEL_ALDERLAKE_PCH_S
: select SOC_INTEL_COMMON_BLOCK_USB4_XHCI if !SOC_INTEL_ALDERLAKE_PCH_S
Should we make a new Kconfig for these like
```
config SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT
default y if !SOC_INTEL_ALDERLAKE_PCH_S
default n if SOC_INTEL_ALDERLAKE_PCH_S
select SOC_INTEL_COMMON_BLOCK_TCSS
select SOC_INTEL_COMMON_BLOCK_USB4
select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
```
then
`ramstage-$(CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT) += retimer.c`
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Attention is currently required from: Stefan Ott, Felix Singer, Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Nico Huber, Sean Rhodes, Michał Żygowski, Johnny Lin, Christian Walter, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Julius Werner, Angel Pons, Michael Niewöhner, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak.
Hello Felix Singer, Stefan Ott, build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Sean Rhodes, Nico Huber, Michał Żygowski, Johnny Lin, Christian Walter, siemens-bot, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Angel Pons, Julius Werner, Michael Niewöhner, Erik van den Bogaert, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63424
to look at the new patch set (#10).
Change subject: tpm: Refactor TPM Kconfig dimensions
......................................................................
tpm: Refactor TPM Kconfig dimensions
Break TPM related Kconfig into the following dimensions:
TPM transport support:
config CRB_TPM
config I2C_TPM
config SPI_TPM
config MEMORY_MAPPED_TPM (new)
TPM brand, not defining any of the above is valid, and result in "generic" support:
config TPM_ATMEL (new)
config TPM_GOOGLE (new)
config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE)
config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE)
What protocol the TPM chip supports:
config MAINBOARD_HAS_TPM1
config MAINBOARD_HAS_TPM2
What the user chooses to compile (restricted by the above):
config NO_TPM
config TPM1
config TPM2
The following Kconfigs will be replaced as indicated:
config TPM_CR50 -> TPM_GOOGLE
config MAINBOARD_HAS_CRB_TPM -> CRB_TPM
config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL
config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE
config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM
config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL
config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE
Signed-off-by: Jes B. Klinke <jbk(a)chromium.org>
Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e
---
M Documentation/getting_started/kconfig.md
M src/drivers/crb/Kconfig
M src/drivers/crb/Makefile.inc
M src/drivers/i2c/tpm/Kconfig
M src/drivers/i2c/tpm/Makefile.inc
M src/drivers/pc80/tpm/Kconfig
M src/drivers/pc80/tpm/Makefile.inc
M src/drivers/spi/tpm/Kconfig
M src/drivers/spi/tpm/Makefile.inc
M src/drivers/spi/tpm/tpm.c
M src/drivers/tpm/Makefile.inc
M src/mainboard/acer/aspire_vn7_572g/Kconfig
M src/mainboard/asrock/b85m_pro4/Kconfig
M src/mainboard/asrock/h110m/Kconfig
M src/mainboard/asus/am1i-a/Kconfig
M src/mainboard/asus/h61-series/Kconfig.name
M src/mainboard/asus/p8x7x-series/Kconfig.name
M src/mainboard/clevo/cml-u/Kconfig
M src/mainboard/clevo/kbl-u/Kconfig
M src/mainboard/clevo/tgl-u/Kconfig
M src/mainboard/dell/snb_ivb_workstations/Kconfig
M src/mainboard/emulation/qemu-q35/Kconfig
M src/mainboard/facebook/fbg1701/Kconfig
M src/mainboard/facebook/monolith/Kconfig
M src/mainboard/foxconn/g41s-k/Kconfig
M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig
M src/mainboard/google/asurada/Kconfig
M src/mainboard/google/auron/Kconfig
M src/mainboard/google/beltino/Kconfig
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/butterfly/Kconfig
M src/mainboard/google/cherry/Kconfig
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/cyan/Kconfig
M src/mainboard/google/daisy/Kconfig
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/deltaur/Kconfig
M src/mainboard/google/drallion/Kconfig
M src/mainboard/google/eve/Kconfig
M src/mainboard/google/fizz/Kconfig
M src/mainboard/google/foster/Kconfig
M src/mainboard/google/gale/Kconfig
M src/mainboard/google/glados/Kconfig
M src/mainboard/google/gru/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/herobrine/Kconfig
M src/mainboard/google/herobrine/bootblock.c
M src/mainboard/google/jecht/Kconfig
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/kukui/Kconfig
M src/mainboard/google/link/Kconfig
M src/mainboard/google/nyan_big/Kconfig
M src/mainboard/google/nyan_blaze/Kconfig
M src/mainboard/google/oak/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/parrot/Kconfig
M src/mainboard/google/peach_pit/Kconfig
M src/mainboard/google/poppy/Kconfig
M src/mainboard/google/rambi/Kconfig
M src/mainboard/google/reef/Kconfig
M src/mainboard/google/sarien/Kconfig
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/slippy/Kconfig
M src/mainboard/google/smaug/Kconfig
M src/mainboard/google/storm/Kconfig
M src/mainboard/google/stout/Kconfig
M src/mainboard/google/trogdor/Kconfig
M src/mainboard/google/veyron/Kconfig
M src/mainboard/google/veyron_mickey/Kconfig
M src/mainboard/google/veyron_rialto/Kconfig
M src/mainboard/google/volteer/Kconfig
M src/mainboard/google/volteer/mainboard.c
M src/mainboard/google/volteer/variants/chronicler/overridetree.cb
M src/mainboard/google/volteer/variants/volteer2/overridetree.cb
M src/mainboard/google/volteer/variants/volteer2/variant.c
M src/mainboard/google/zork/Kconfig
M src/mainboard/hp/compaq_8200_elite_sff/Kconfig
M src/mainboard/hp/folio_9480m/Kconfig
M src/mainboard/hp/snb_ivb_laptops/Kconfig
M src/mainboard/hp/z220_series/Kconfig
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/baskingridge/Kconfig
M src/mainboard/intel/coffeelake_rvp/Kconfig
M src/mainboard/intel/galileo/Kconfig
M src/mainboard/intel/glkrvp/Kconfig
M src/mainboard/intel/kblrvp/Kconfig
M src/mainboard/intel/kunimitsu/Kconfig
M src/mainboard/intel/shadowmountain/Kconfig
M src/mainboard/intel/strago/Kconfig
M src/mainboard/intel/tglrvp/Kconfig
M src/mainboard/intel/wtm2/Kconfig
M src/mainboard/kontron/bsl6/Kconfig
M src/mainboard/kontron/mal10/Kconfig
M src/mainboard/lenovo/s230u/Kconfig
M src/mainboard/lenovo/t410/Kconfig
M src/mainboard/lenovo/t420/Kconfig
M src/mainboard/lenovo/t420s/Kconfig
M src/mainboard/lenovo/t430/Kconfig
M src/mainboard/lenovo/t430s/Kconfig
M src/mainboard/lenovo/t440p/Kconfig
M src/mainboard/lenovo/t520/Kconfig
M src/mainboard/lenovo/t530/Kconfig
M src/mainboard/lenovo/w541/Kconfig
M src/mainboard/lenovo/x131e/Kconfig
M src/mainboard/lenovo/x1_carbon_gen1/Kconfig
M src/mainboard/lenovo/x201/Kconfig
M src/mainboard/lenovo/x220/Kconfig
M src/mainboard/lenovo/x230/Kconfig
M src/mainboard/libretrend/lt1000/Kconfig
M src/mainboard/ocp/deltalake/Kconfig
M src/mainboard/opencellular/elgon/Kconfig
M src/mainboard/pcengines/apu1/Kconfig
M src/mainboard/pcengines/apu2/Kconfig
M src/mainboard/prodrive/hermes/Kconfig
M src/mainboard/protectli/vault_kbl/Kconfig
M src/mainboard/purism/librem_cnl/Kconfig.name
M src/mainboard/purism/librem_skl/Kconfig
M src/mainboard/razer/blade_stealth_kbl/Kconfig
M src/mainboard/samsung/lumpy/Kconfig
M src/mainboard/samsung/stumpy/Kconfig
M src/mainboard/siemens/chili/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig
M src/mainboard/siemens/mc_apl1/variants/mc_apl6/Kconfig
M src/mainboard/siemens/mc_ehl/Kconfig
M src/mainboard/starlabs/labtop/Kconfig
M src/mainboard/starlabs/lite/Kconfig
M src/mainboard/supermicro/x11-lga1151-series/Kconfig
M src/mainboard/supermicro/x9sae/Kconfig
M src/mainboard/system76/addw1/Kconfig
M src/mainboard/system76/bonw14/Kconfig
M src/mainboard/system76/cml-u/Kconfig
M src/mainboard/system76/darp7/Kconfig
M src/mainboard/system76/galp5/Kconfig
M src/mainboard/system76/gaze15/Kconfig
M src/mainboard/system76/gaze16/Kconfig
M src/mainboard/system76/kbl-u/Kconfig
M src/mainboard/system76/lemp10/Kconfig
M src/mainboard/system76/lemp9/Kconfig
M src/mainboard/system76/oryp5/Kconfig
M src/mainboard/system76/oryp6/Kconfig
M src/mainboard/system76/oryp8/Kconfig
M src/mainboard/system76/whl-u/Kconfig
M src/mainboard/up/squared/Kconfig
M src/security/tpm/Kconfig
M src/security/tpm/Makefile.inc
M src/security/tpm/tss/vendor/cr50/Kconfig
M src/security/vboot/secdata_mock.c
M src/security/vboot/secdata_tpm.c
M src/security/vboot/vboot_logic.c
M src/soc/intel/apollolake/Kconfig
M src/soc/intel/common/Makefile.inc
M src/soc/intel/skylake/acpi/systemagent.asl
M src/soc/intel/tigerlake/Kconfig
M src/vendorcode/google/chromeos/Kconfig
M src/vendorcode/google/chromeos/Makefile.inc
M src/vendorcode/google/chromeos/cse_board_reset.c
159 files changed, 262 insertions(+), 290 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/63424/10
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Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-MessageType: newpatchset