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Change subject: mb/google/brya/var/vell: add WWAN power sequence setting for vell
......................................................................
Set Ready For Review
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Change subject: mb/intel/adlrvp: Disable PM Timer for ADL-N
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62915/comment/ed5b3402_61d96a61
PS3, Line 9: Keeping the PM timer enabled will disqualify an ADL system from entering
> Ack
What about BOARD_INTEL_ADLRVP_N ?
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Change subject: mb/google/brya/var/brya0: Change MAX98360 AMP interface to I2S1
......................................................................
Patch Set 4: Code-Review+1
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Change subject: cpu/x86/smm_module_loader.c: Rewrite setup more purely function
......................................................................
Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63475/comment/c3f99a4c_d109507e
PS3, Line 7: Rewrite setup more purely function
fix...
File src/cpu/x86/smm/smm_module_loader.c:
https://review.coreboot.org/c/coreboot/+/63475/comment/73ab2462_1a14cbc4
PS3, Line 499: handler_size = rmodule_memory_size(&smm_mod);
: base -= handler_size;
: total_size += handler_size;
: module_alignment = rmodule_load_alignment(&smm_mod);
: alignment_size = module_alignment - (base % module_alignment);
: if (alignment_size != module_alignment) {
: handler_size += alignment_size;
: base += alignment_size;
: }
This is actually totally broken... Also fixed with this.
TODO: Add to the commit message.
https://review.coreboot.org/c/coreboot/+/63475/comment/027a1fb3_829021ad
PS3, Line 88: const unsigned
push to previous patch.
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Change subject: intel/common/block: Add gpmr common driver
......................................................................
Patch Set 14:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63170/comment/67518024_2ad2213c
PS14, Line 9: Move GPMR(General Purpose Memory Range) APIs to gpmr driver from dmi.c
: For this, 3 patches are used.
: 1. Add GPMR common driver in IA common code(CB:63170)
: 2. Migrate all DMI API usage to GPMR(CB:63471)
: 3. Drop DMI driver (CB:63472)
:
> in two separate CL, the reason that I have in mind is better code readability, otherwise same Cl is renaming APIs, changing Kconfig depex across SoC and rest of the IA common code
I didn't say these changes should be done in one change. The current approach breaks git history, though, which should be avoided.
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Change subject: mb/google/brya/var/brya0: Change MAX98360 AMP interface to I2S1
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/brya/variants/brya0/fw_config.c:
https://review.coreboot.org/c/coreboot/+/63495/comment/993f60d5_7b6a1e62
PS3, Line 143: if (fw_config_probe(FW_CONFIG(AUDIO, MAX98360_ALC5682I_I2S))) {
> since I2S0 not used here, you can i2s0_disable_pads
Done
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63495
to look at the new patch set (#4).
Change subject: mb/google/brya/var/brya0: Change MAX98360 AMP interface to I2S1
......................................................................
mb/google/brya/var/brya0: Change MAX98360 AMP interface to I2S1
Based on the latest schematic, change MAX98360 AMP interface from I2S2
to I2S1 due to Intel BT offload concern.
BUG=b:202671753
BRANCH=firmware-brya-14505.B
TEST=dmidecode -t 11
Change-Id: I9ee45dbceabdedd39a9befffb8002b8bc3d4bfb4
Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/brya0/fw_config.c
M src/mainboard/google/brya/variants/brya0/overridetree.cb
2 files changed, 22 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/63495/4
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63530 )
Change subject: [TESTME] mb/lenovo/t410: Complete and fix hybrid-graphics config
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/lenovo/t410/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/63530/comment/87771d9e_ce7f47e4
PS1, Line 143: register "ddc_mux_gpio" = "54"
> Can’t `has_ddc_mux_gpio` be derived from having `ddc_mux_gpio` set?
We don't know if a value is set. If it's not initialized, it's 0. But that
doesn't tell us if it's an implicit 0 or if somebody actually set it to 0.
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