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Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63570 )
Change subject: mb/google/brask/variants/moli: update type-c setting in overridetree for moli
......................................................................
Patch Set 5: Code-Review+1
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Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63582 )
Change subject: util/lint/checkpatch.pl: Update to v5.18-2 lines related to CONST_STRUCT
......................................................................
util/lint/checkpatch.pl: Update to v5.18-2 lines related to CONST_STRUCT
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Change-Id: I0fe2ec6a74a4b8c70452fbf05d534a37e1ea2c26
---
M util/lint/checkpatch.pl
1 file changed, 7 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/63582/1
diff --git a/util/lint/checkpatch.pl b/util/lint/checkpatch.pl
index b5184bd..3359150 100755
--- a/util/lint/checkpatch.pl
+++ b/util/lint/checkpatch.pl
@@ -855,9 +855,11 @@
return 0;
}
-my $const_structs = "";
-read_words(\$const_structs, $conststructsfile)
- or warn "No structs that should be const will be found - file '$conststructsfile': $!\n";
+my $const_structs;
+if (show_type("CONST_STRUCT")) {
+ read_words(\$const_structs, $conststructsfile)
+ or warn "No structs that should be const will be found - file '$conststructsfile': $!\n";
+}
my $typeOtherTypedefs = "";
if (length($typedefsfile)) {
@@ -6591,7 +6593,8 @@
# check for various structs that are normally const (ops, kgdb, device_tree)
# and avoid what seem like struct definitions 'struct foo {'
- if ($line !~ /\bconst\b/ &&
+ if (defined($const_structs) &&
+ $line !~ /\bconst\b/ &&
$line =~ /\bstruct\s+($const_structs)\b(?!\s*\{)/) {
WARN("CONST_STRUCT",
"struct $1 should normally be const\n" . $herecurr);
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Michał Kopeć has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52781 )
Change subject: cpu/amd/agesa/family14/model_14_init.c: create correct MTRR solution
......................................................................
Patch Set 14:
(1 comment)
File src/cpu/amd/agesa/family14/model_14_init.c:
https://review.coreboot.org/c/coreboot/+/52781/comment/e2fe6541_5fcfea71
PS7, Line 24: if (acpi_is_wakeup_s3()) {
: restore_mtrr();
> It looks like OemInitResume and OemS3LateRestore do not use the S3DataTypeMTRR part of the S3 NV dat […]
Boot tested and resume tested with `x86_setup_mtrrs_with_detect` only. Same MTRR solution is generated on coldboot and resume. Removed call to `restore_mtrr()` and left `x86_setup_mtrrs_with_detect()` only.
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/59807
to look at the new patch set (#14).
Change subject: nb/amd/agesa/family14: Enable PARALLEL_MP
......................................................................
nb/amd/agesa/family14: Enable PARALLEL_MP
Disable LEGACY_SMP_INIT and enable PARALLEL_MP.
TEST=Boot Debian 11 on PC Engines apu1
Boot time reduced by ~3ms on average.
Inspired by CB:59693
Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com>
Change-Id: I39a0779bdf115eebe31290591152b920acde773e
---
M src/cpu/amd/agesa/family14/model_14_init.c
M src/northbridge/amd/agesa/family14/Kconfig
M src/northbridge/amd/agesa/family14/northbridge.c
3 files changed, 23 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/59807/14
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Attention is currently required from: Michał Kopeć, Arthur Heymans.
Michał Kopeć has uploaded a new patch set (#14) to the change originally created by Michał Żygowski. ( https://review.coreboot.org/c/coreboot/+/52781 )
Change subject: cpu/amd/agesa/family14/model_14_init.c: create correct MTRR solution
......................................................................
cpu/amd/agesa/family14/model_14_init.c: create correct MTRR solution
Create the correct MTRR solution based on the physical address space
provided by RESOURCE_ALLOCATOR_V4. Previously CPU initialization did not
account for lost C6 DRAM storage MTRR during postcar frame creation.
The BSP on 2GB has been stripped from UC MTRR covering C6 DRAM and
overlapping with usable DRAM WB MTRR. However this UC MTRR remained on
APs which caused inconsistent MTRRs warning in Linux. Use generic MTRR
function to create correct MTRR solution that propagates to APs. This
also fixes the inconsistent MTRRs warning.
TEST=boot Debian with Linux 4.14 on apu1 2GB
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: If706f8851ed0b1d45729e81175d82abb1d9193be
Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com>
---
M src/cpu/amd/agesa/family14/model_14_init.c
1 file changed, 16 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/52781/14
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Hello build bot (Jenkins), YH Lin, Tim Wawrzynczak, Zhuohao Lee, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63570
to look at the new patch set (#5).
Change subject: mb/google/brask/variants/moli: update type-c setting in overridetree for moli
......................................................................
mb/google/brask/variants/moli: update type-c setting in overridetree for moli
Add conn1 for pch_espi and add type-c port2 for pmc_mux.
BUG=b:220814038
TEST=emerge-brask coreboot.
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: Idfd7b761496a110f34838abb0fd408b37d390ba2
---
M src/mainboard/google/brya/variants/moli/overridetree.cb
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/63570/5
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