coreboot-gerrit April 2022

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Change in coreboot[master]: soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code
by Angel Pons (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Felix Singer, Jeff Daly, Suresh Bellampalli, Patrick Rudolph, Elyes Haouas. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60992 ) Change subject: soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code ...................................................................... Patch Set 11: Code-Review+1 (1 comment) File src/soc/intel/denverton_ns/chip.h: https://review.coreboot.org/c/coreboot/+/60992/comment/bb2ca7e6_c83a79bf PS10, Line 6: #include <acpi/acpi_device.h> > please, why this include ? Ping! -- To view, visit https://review.coreboot.org/c/coreboot/+/60992 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I505b3a7761cb3719697626e1f272d0928fdd29f1 Gerrit-Change-Number: 60992 Gerrit-PatchSet: 11 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 12 Apr 2022 23:30:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: util/spd_tools/part_id_gen: Support Sabrina SoC
by Robert Zieba (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Raul Rangel, Reka Norman, Rob Barnes, Karthik Ramasubramanian. Robert Zieba has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63597 ) Change subject: util/spd_tools/part_id_gen: Support Sabrina SoC ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/63597 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica57b12239019831f7bf93982be3c93b7f8b6986 Gerrit-Change-Number: 63597 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 23:29:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/skyrim: Inject SPDs into APCB
by Karthik Ramasubramanian (Code Review) 13 Apr '22

13 Apr '22

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63600 ) Change subject: mb/google/skyrim: Inject SPDs into APCB ...................................................................... mb/google/skyrim: Inject SPDs into APCB Update the build scripts to inject variant specific SPDs into APCB. BUG=None TEST=Build and boot to OS in Skyrim boards with all the concerned memory parts. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I3b3f6f248d54681c6f55c00660d1f2988ae906ba --- M src/mainboard/google/skyrim/Makefile.inc 1 file changed, 13 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/63600/1 diff --git a/src/mainboard/google/skyrim/Makefile.inc b/src/mainboard/google/skyrim/Makefile.inc index e66f7c9..bf9c012 100644 --- a/src/mainboard/google/skyrim/Makefile.inc +++ b/src/mainboard/google/skyrim/Makefile.inc @@ -16,8 +16,19 @@ ifneq ($(wildcard $(MAINBOARD_BLOBS_DIR)/APCB_SBR_D5.bin),) $(info APCB sources present.) -APCB_SOURCES = $(MAINBOARD_BLOBS_DIR)/APCB_SBR_D5.bin -APCB_SOURCES_RECOVERY = $(MAINBOARD_BLOBS_DIR)/APCB_SBR_D5.bin + +LIB_SPD_DEPS = $(SPD_SOURCES) + +APCB_SOURCES = $(obj)/APCB_SBR_D5.gen +APCB_SOURCES_RECOVERY = $(obj)/APCB_SBR_D5.gen + +$(obj)/APCB_SBR_D5.gen: $(SPD_SOURCES) \ + $(APCB_V3_EDIT_TOOL) \ + $(MAINBOARD_BLOBS_DIR)/APCB_SBR_D5.bin + $(APCB_V3_EDIT_TOOL) $(MAINBOARD_BLOBS_DIR)/APCB_SBR_D5.bin \ + $(obj)/APCB_SBR_D5.gen \ + --spd_sources $(SPD_SOURCES) \ + --spd_magic '2311130E' else $(info APCB sources not found. Skipping APCB.) endif -- To view, visit https://review.coreboot.org/c/coreboot/+/63600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b3f6f248d54681c6f55c00660d1f2988ae906ba Gerrit-Change-Number: 63600 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/skyrim/var/skyrim: Add supported memory parts
by Karthik Ramasubramanian (Code Review) 13 Apr '22

13 Apr '22

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63599 ) Change subject: mb/google/skyrim/var/skyrim: Add supported memory parts ...................................................................... mb/google/skyrim/var/skyrim: Add supported memory parts Add supported memory parts and generate the associated DRAM part ID. Also for MT62F2G32D8DR-031 WT:B memory part, add a custom SPD that configures the DRAM speed at 5500 MHz. Use this custom SPD until that part can operate at full speed (i.e. 6400 MHz). BUG=None TEST=Build Skyrim. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: Id87e79f5d6187d57d74487841c09aa309f1450b4 --- A src/mainboard/google/skyrim/variants/skyrim/Makefile.inc A src/mainboard/google/skyrim/variants/skyrim/memory/Makefile.inc A src/mainboard/google/skyrim/variants/skyrim/memory/dram_id.generated.txt A src/mainboard/google/skyrim/variants/skyrim/memory/mem_parts_used.txt A src/mainboard/google/skyrim/variants/skyrim/memory/spd-MT62F2G32D8DR-031.hex 5 files changed, 56 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/63599/1 diff --git a/src/mainboard/google/skyrim/variants/skyrim/Makefile.inc b/src/mainboard/google/skyrim/variants/skyrim/Makefile.inc new file mode 100644 index 0000000..88e75bd --- /dev/null +++ b/src/mainboard/google/skyrim/variants/skyrim/Makefile.inc @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +subdirs-y += ./memory diff --git a/src/mainboard/google/skyrim/variants/skyrim/memory/Makefile.inc b/src/mainboard/google/skyrim/variants/skyrim/memory/Makefile.inc new file mode 100644 index 0000000..35975c7 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/skyrim/memory/Makefile.inc @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen SBR lp5 src/mainboard/google/skyrim/variants/skyrim/memory/ src/mainboard/google/skyrim/variants/skyrim/memory/mem_parts_used.txt + +SPD_SOURCES = +SPD_SOURCES += spd/lp5/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B +SPD_SOURCES += spd/lp5/set-1/spd-2.hex # ID = 1(0b0001) Parts = MT62F1G32D4DR-031 WT:B +SPD_SOURCES += src/mainboard/google/skyrim/variants/skyrim/memory/spd-MT62F2G32D8DR-031.hex # ID = 2(0b0010) Parts = MT62F2G32D8DR-031 WT:B diff --git a/src/mainboard/google/skyrim/variants/skyrim/memory/dram_id.generated.txt b/src/mainboard/google/skyrim/variants/skyrim/memory/dram_id.generated.txt new file mode 100644 index 0000000..b4115ed --- /dev/null +++ b/src/mainboard/google/skyrim/variants/skyrim/memory/dram_id.generated.txt @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# util/spd_tools/bin/part_id_gen SBR lp5 src/mainboard/google/skyrim/variants/skyrim/memory/ src/mainboard/google/skyrim/variants/skyrim/memory/mem_parts_used.txt + +DRAM Part Name ID to assign +MT62F512M32D2DR-031 WT:B 0 (0000) +MT62F1G32D4DR-031 WT:B 1 (0001) +MT62F2G32D8DR-031 WT:B 2 (0010) diff --git a/src/mainboard/google/skyrim/variants/skyrim/memory/mem_parts_used.txt b/src/mainboard/google/skyrim/variants/skyrim/memory/mem_parts_used.txt new file mode 100644 index 0000000..bd84cbf --- /dev/null +++ b/src/mainboard/google/skyrim/variants/skyrim/memory/mem_parts_used.txt @@ -0,0 +1,3 @@ +MT62F512M32D2DR-031 WT:B, +MT62F1G32D4DR-031 WT:B, +MT62F2G32D8DR-031 WT:B,2,spd-MT62F2G32D8DR-031.hex diff --git a/src/mainboard/google/skyrim/variants/skyrim/memory/spd-MT62F2G32D8DR-031.hex b/src/mainboard/google/skyrim/variants/skyrim/memory/spd-MT62F2G32D8DR-031.hex new file mode 100644 index 0000000..01a5734 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/skyrim/memory/spd-MT62F2G32D8DR-031.hex @@ -0,0 +1,32 @@ +23 11 13 0E 85 21 F9 18 00 40 00 00 09 02 00 00 +00 00 03 00 00 00 00 00 2C 00 90 A8 90 90 06 C0 +03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 C9 00 F4 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -- To view, visit https://review.coreboot.org/c/coreboot/+/63599 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id87e79f5d6187d57d74487841c09aa309f1450b4 Gerrit-Change-Number: 63599 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/apcb/apcb_v3_edit.py: Edit APCB based on different SPD magic
by Karthik Ramasubramanian (Code Review) 13 Apr '22

13 Apr '22

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63598 ) Change subject: util/apcb/apcb_v3_edit.py: Edit APCB based on different SPD magic ...................................................................... util/apcb/apcb_v3_edit.py: Edit APCB based on different SPD magic APCB edit tool edits APCBs with LP4 specific SPDs. Introduce an option to support different SPD magic so that the tool can be used to edit APCBs with LP5 specific SPDs. BUG=None TEST=Build Skyrim board with LP5 specific SPDs. Build Guybrush board with LP4 specific SPDs. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I8e96c89e4e5ce8e0567a17bf7685b69080fa1708 --- M util/apcb/apcb_v3_edit.py 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/63598/1 diff --git a/util/apcb/apcb_v3_edit.py b/util/apcb/apcb_v3_edit.py index 9a70bac..4d1fcbe 100755 --- a/util/apcb/apcb_v3_edit.py +++ b/util/apcb/apcb_v3_edit.py @@ -47,6 +47,10 @@ '--spd_sources', nargs='+', help='List of SPD sources') + parser.add_argument( + '--spd_magic', + type=str, + help='SPD Magic Identifier as hex byte stream') return parser.parse_args() @@ -62,6 +66,8 @@ def main(): + global SPD_MAGIC + args = parseargs() print(f'Reading input APCB from {args.apcb_in}') @@ -75,6 +81,9 @@ print(f'Using SPD Sources = {args.spd_sources}') + if args.spd_magic: + SPD_MAGIC = bytes.fromhex(args.spd_magic) + spds = [] for spd_source in args.spd_sources: with open(spd_source, 'rb') as f: -- To view, visit https://review.coreboot.org/c/coreboot/+/63598 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8e96c89e4e5ce8e0567a17bf7685b69080fa1708 Gerrit-Change-Number: 63598 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/spd_tools/part_id_gen: Support Sabrina SoC
by Karthik Ramasubramanian (Code Review) 13 Apr '22

13 Apr '22

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63597 ) Change subject: util/spd_tools/part_id_gen: Support Sabrina SoC ...................................................................... util/spd_tools/part_id_gen: Support Sabrina SoC Add support to generate DRAM part ID for boards using Sabrina SoC. BUG=None TEST=Generate DRAM part ID for Skyrim mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: Ica57b12239019831f7bf93982be3c93b7f8b6986 --- M util/spd_tools/src/part_id_gen/part_id_gen.go 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/63597/1 diff --git a/util/spd_tools/src/part_id_gen/part_id_gen.go b/util/spd_tools/src/part_id_gen/part_id_gen.go index edbad9c..eef7ee3 100644 --- a/util/spd_tools/src/part_id_gen/part_id_gen.go +++ b/util/spd_tools/src/part_id_gen/part_id_gen.go @@ -40,6 +40,7 @@ "JSL", "PCO", "CZN", + "SBR", } var supportedMemTechs = [...]string{ -- To view, visit https://review.coreboot.org/c/coreboot/+/63597 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica57b12239019831f7bf93982be3c93b7f8b6986 Gerrit-Change-Number: 63597 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/nipperkin: Disable PSPP for WLAN
by Karthik Ramasubramanian (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Rob Barnes, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63593 ) Change subject: mb/google/nipperkin: Disable PSPP for WLAN ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63593 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38f05b92ace4aba61163194a6a638915882b8871 Gerrit-Change-Number: 63593 Gerrit-PatchSet: 3 Gerrit-Owner: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bhanu Prakash Maiya <bhanumaiya(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 12 Apr 2022 23:24:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: checkpatch.conf: Disable gerrit change ID for coreboot
by 9elements QA (Code Review) 13 Apr '22

13 Apr '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63030 ) Change subject: checkpatch.conf: Disable gerrit change ID for coreboot ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/100662 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/100661 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/100660 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/100659 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/100658 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/100657 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/100656 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/100655 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/100654 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/100653 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/100652 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/100651 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/100650 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/100649 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/100648 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/100647 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/63030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f6efb5559027ed9497ee85497bb4b4e786f9901 Gerrit-Change-Number: 63030 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 12 Apr 2022 23:16:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [VERY WIP]tests/cpu/x86/smm: Add unit tests
by Arthur Heymans (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Jakub Czapiga. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63560 ) Change subject: [VERY WIP]tests/cpu/x86/smm: Add unit tests ...................................................................... Patch Set 6: Code-Review-2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63560 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7462fa6155b8f8085256a027692cbead0ca3f08e Gerrit-Change-Number: 63560 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 22:48:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/x86/smm_module_loader.c: Rewrite setup
by Arthur Heymans (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Edward O'Callaghan. Hello build bot (Jenkins), Edward O'Callaghan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63475 to look at the new patch set (#10). Change subject: cpu/x86/smm_module_loader.c: Rewrite setup ...................................................................... cpu/x86/smm_module_loader.c: Rewrite setup This code is much easier to read of one does not have to keep track of mutable variables. This also fixes the alignment code on the TSEG smihandler setup code. It was aligning the code upwards instead of downwards which would case it to encroach a part of the save state. Change-Id: I310a232ced2ab15064bff99a39a26f745239f6b9 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/smm/smm_module_loader.c 1 file changed, 133 insertions(+), 174 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/63475/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/63475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I310a232ced2ab15064bff99a39a26f745239f6b9 Gerrit-Change-Number: 63475 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2022