coreboot-gerrit April 2022

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Change in coreboot[master]: mb/google/brya: Add missing parameter name to variant_generate_s0ix_hook
by Felix Held (Code Review) 13 Apr '22

13 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63564 ) Change subject: mb/google/brya: Add missing parameter name to variant_generate_s0ix_hook ...................................................................... mb/google/brya: Add missing parameter name to variant_generate_s0ix_hook Fixes the following build error: src/mainboard/google/brya/mainboard.c: In function 'variant_generate_s0ix_hook': src/mainboard/google/brya/mainboard.c:157:40: error: parameter name omitted void __weak variant_generate_s0ix_hook(enum s0ix_entry) ^~~~~~~~~~~~~~~ BUG=None TEST=`abuild -a -x -c max -p none -t google/brya` now succeeds Change-Id: Id578766e2a3b7647e920740dde3e356a7db39d4d Signed-off-by: Reka Norman <rekanorman(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63564 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/mainboard.c M src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h 2 files changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c index b3f42ca..d85dc05 100644 --- a/src/mainboard/google/brya/mainboard.c +++ b/src/mainboard/google/brya/mainboard.c @@ -154,7 +154,7 @@ /* Add board-specific SSDT entries */ } -void __weak variant_generate_s0ix_hook(enum s0ix_entry) +void __weak variant_generate_s0ix_hook(enum s0ix_entry entry) { /* Add board-specific MS0X entries */ /* diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h index baf0597..b088ecb 100644 --- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h @@ -29,7 +29,7 @@ S0IX_ENTRY, }; -void variant_generate_s0ix_hook(enum s0ix_entry); +void variant_generate_s0ix_hook(enum s0ix_entry entry); /* Modify devictree settings during ramstage */ void variant_devtree_update(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/63564 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id578766e2a3b7647e920740dde3e356a7db39d4d Gerrit-Change-Number: 63564 Gerrit-PatchSet: 3 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/nereid: Enable OZ711LV2LN SD card controller
by Felix Held (Code Review) 13 Apr '22

13 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63434 ) Change subject: mb/google/brya/var/nereid: Enable OZ711LV2LN SD card controller ...................................................................... mb/google/brya/var/nereid: Enable OZ711LV2LN SD card controller Select the Bayhub LV2 driver, and implement power sequencing as per the datasheet. BUG=b:223304542 TEST=Check that connecting an SD card works as expected in the OS. Probe the EN and RST signals and check the timing requirements are met. Change-Id: Id1cca2024e06e5b2c7cefd22aa0b735bc542dc3b Signed-off-by: Reka Norman <rekanorman(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63434 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Kangheui Won <khwon(a)chromium.org> --- M src/mainboard/google/brya/Kconfig.name M src/mainboard/google/brya/variants/nereid/gpio.c 2 files changed, 7 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Kangheui Won: Looks good to me, approved diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 614fdc3..e936ca2 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -92,6 +92,7 @@ bool "-> Nereid" select ALDERLAKE_CONFIGURE_DESCRIPTOR select BOARD_GOOGLE_BASEBOARD_NISSA + select DRIVERS_GENERIC_BAYHUB_LV2 select DRIVERS_GENERIC_GPIO_KEYS config BOARD_GOOGLE_PRIMUS diff --git a/src/mainboard/google/brya/variants/nereid/gpio.c b/src/mainboard/google/brya/variants/nereid/gpio.c index f011e2f..7e70ac4 100644 --- a/src/mainboard/google/brya/variants/nereid/gpio.c +++ b/src/mainboard/google/brya/variants/nereid/gpio.c @@ -43,6 +43,8 @@ static const struct pad_config early_gpio_table[] = { /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */ PAD_CFG_GPO(GPP_B11, 0, DEEP), + /* H12 : UART0_RTS# ==> SD_PERST_L */ + PAD_CFG_GPO(GPP_H12, 0, DEEP), /* H20 : IMGCLKOUT1 ==> WLAN_PERST_L */ PAD_CFG_GPO(GPP_H20, 0, DEEP), /* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */ @@ -59,11 +61,15 @@ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* H11 : UART0_TXD ==> UART_SOC_TX_DBG_RX */ PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), + /* H13 : UART0_CTS# ==> EN_PP3300_SD_X */ + PAD_CFG_GPO(GPP_H13, 1, DEEP), }; static const struct pad_config romstage_gpio_table[] = { /* B11 : PMCALERT# ==> EN_PP3300_WLAN_X */ PAD_CFG_GPO(GPP_B11, 1, DEEP), + /* H12 : UART0_RTS# ==> SD_PERST_L */ + PAD_CFG_GPO(GPP_H12, 1, DEEP), }; const struct pad_config *variant_gpio_override_table(size_t *num) -- To view, visit https://review.coreboot.org/c/coreboot/+/63434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1cca2024e06e5b2c7cefd22aa0b735bc542dc3b Gerrit-Change-Number: 63434 Gerrit-PatchSet: 4 Gerrit-Owner: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/brya/var/brya0: Change MAX98360 AMP interface to I2S1
by Felix Held (Code Review) 13 Apr '22

13 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63495 ) Change subject: mb/google/brya/var/brya0: Change MAX98360 AMP interface to I2S1 ...................................................................... mb/google/brya/var/brya0: Change MAX98360 AMP interface to I2S1 Based on the latest schematic, change MAX98360 AMP interface from I2S2 to I2S1 due to Intel BT offload concern. BUG=b:202671753 BRANCH=firmware-brya-14505.B TEST=dmidecode -t 11 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> Change-Id: I9ee45dbceabdedd39a9befffb8002b8bc3d4bfb4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63495 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/brya0/fw_config.c M src/mainboard/google/brya/variants/brya0/overridetree.cb 2 files changed, 22 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Frank Wu: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/brya0/fw_config.c b/src/mainboard/google/brya/variants/brya0/fw_config.c index e1c6f89..8113627 100644 --- a/src/mainboard/google/brya/variants/brya0/fw_config.c +++ b/src/mainboard/google/brya/variants/brya0/fw_config.c @@ -26,6 +26,19 @@ PAD_CFG_NF(GPP_S5, NONE, DEEP, NF1), /* SDW_SPKR_DATA */ }; +static const struct pad_config max98360_enable_pads[] = { + PAD_CFG_NF(GPP_S0, NONE, DEEP, NF4), /* I2S_SPKR_SCLK_R */ + PAD_CFG_NF(GPP_S1, NONE, DEEP, NF4), /* I2S_SPKR_SFRM_R */ + PAD_CFG_NF(GPP_S2, NONE, DEEP, NF4), /* I2S_PCH_TX_SPKR_RX_R */ + PAD_CFG_NF(GPP_S3, NONE, DEEP, NF4), /* I2S_PCH_RX_SPKR_TX */ + PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2), /* DMIC_CLK0_R */ + PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), /* DMIC_DATA0_R */ + PAD_CFG_NF(GPP_R4, NONE, DEEP, NF3), /* DMIC_CLK1_R */ + PAD_CFG_NF(GPP_R5, NONE, DEEP, NF3), /* DMIC_DATA1_R */ + PAD_NC(GPP_R6, NONE), + PAD_NC(GPP_R7, NONE), +}; + static const struct pad_config sndw_disable_pads[] = { PAD_NC(GPP_S0, NONE), PAD_NC(GPP_S1, NONE), @@ -110,7 +123,7 @@ gpio_configure_pads(i2s0_enable_pads, ARRAY_SIZE(i2s0_enable_pads)); gpio_configure_pads(i2s2_disable_pads, ARRAY_SIZE(i2s2_disable_pads)); gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads)); - } else { + } else if (!fw_config_probe(FW_CONFIG(AUDIO, MAX98360_ALC5682I_I2S))) { printk(BIOS_INFO, "BT offload disabled\n"); gpio_configure_pads(i2s0_disable_pads, ARRAY_SIZE(i2s0_disable_pads)); gpio_configure_pads(i2s2_disable_pads, ARRAY_SIZE(i2s2_disable_pads)); @@ -127,9 +140,12 @@ enable_i2s(); } - if (fw_config_probe(FW_CONFIG(AUDIO, MAX98360_ALC5682I_I2S_AMP_SSP2))) { + if (fw_config_probe(FW_CONFIG(AUDIO, MAX98360_ALC5682I_I2S))) { printk(BIOS_INFO, "Configure audio over I2S with MAX98360 ALC5682I.\n"); - enable_i2s(); + gpio_configure_pads(max98360_enable_pads, ARRAY_SIZE(max98360_enable_pads)); + printk(BIOS_INFO, "BT offload enabled\n"); + gpio_configure_pads(i2s0_disable_pads, ARRAY_SIZE(i2s0_disable_pads)); + gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads)); } } BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index e566067..fd8224c 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -17,7 +17,7 @@ option MAX98373_ALC5682_SNDW 2 option MAX98373_NAU88L25B_I2S 3 option ALC1019_NAU88L25B_I2S 4 - option MAX98360_ALC5682I_I2S_AMP_SSP2 5 + option MAX98360_ALC5682I_I2S 5 end field DB_LTE 11 12 option LTE_ABSENT 0 @@ -255,7 +255,7 @@ register "property_list[0].integer" = "1" device i2c 1a on probe AUDIO MAX98357_ALC5682I_I2S - probe AUDIO MAX98360_ALC5682I_I2S_AMP_SSP2 + probe AUDIO MAX98360_ALC5682I_I2S end end chip drivers/i2c/nau8825 @@ -619,7 +619,7 @@ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)" register "sdmode_delay" = "5" device generic 0 on - probe AUDIO MAX98360_ALC5682I_I2S_AMP_SSP2 + probe AUDIO MAX98360_ALC5682I_I2S end end -- To view, visit https://review.coreboot.org/c/coreboot/+/63495 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ee45dbceabdedd39a9befffb8002b8bc3d4bfb4 Gerrit-Change-Number: 63495 Gerrit-PatchSet: 7 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/intel/adlrvp: Disable PM Timer for ADL-N
by Felix Held (Code Review) 13 Apr '22

13 Apr '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62915 ) Change subject: mb/intel/adlrvp: Disable PM Timer for ADL-N ...................................................................... mb/intel/adlrvp: Disable PM Timer for ADL-N Keeping the PM timer enabled will disqualify an ADL system from entering S0i3, and will also cause an increase in power during suspend states. The PM timer is not required for ADL-N boards, therefore disabling it. BRANCH=NONE TEST=Build and boot ADL-N RVP. Verify system is entering S0i3 state. localhost ~ # cat /sys/kernel/debug/pmc_core/substate_residencies Substate Residency S0i2.0 0 S0i3.0 13196801 Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I44651bf55df8e71a0a5a9a33ecbb8322ecd18575 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62915 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Reka Norman <rekanorman(a)chromium.org> --- M src/mainboard/intel/adlrvp/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Reka Norman: Looks good to me, approved diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig index 20c37a0..82ba5e4 100644 --- a/src/mainboard/intel/adlrvp/Kconfig +++ b/src/mainboard/intel/adlrvp/Kconfig @@ -160,6 +160,9 @@ config DRIVER_TPM_SPI_BUS default 0x2 if BOARD_INTEL_ADLRVP_M_EXT_EC +config USE_PM_ACPI_TIMER + default n if BOARD_INTEL_ADLRVP_N_EXT_EC || BOARD_INTEL_ADLRVP_N + config TPM_TIS_ACPI_INTERRUPT int default 67 if BOARD_INTEL_ADLRVP_M_EXT_EC # GPE0_DW2_3 (GPP_E3) -- To view, visit https://review.coreboot.org/c/coreboot/+/62915 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I44651bf55df8e71a0a5a9a33ecbb8322ecd18575 Gerrit-Change-Number: 62915 Gerrit-PatchSet: 5 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: util: Add amdfwread utility
by Christian Walter (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Robert Zieba, Bao Zheng, Marshall Dawson, Felix Held. Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62795 ) Change subject: util: Add amdfwread utility ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: > ok, if it's easier and cleaner to have another tool for that, i'm ok with that. […] Agree on this. Util should be standalone tools without including other tools. -- To view, visit https://review.coreboot.org/c/coreboot/+/62795 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15fa07c9cad8e4640e9c40e5539b0dab44424850 Gerrit-Change-Number: 62795 Gerrit-PatchSet: 7 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 13 Apr 2022 14:41:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Robert Zieba <robertzieba(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: x86/mtrr: Print address ranges inclusive to be more consistent
by Christian Walter (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Werner Zeh. Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63541 ) Change subject: x86/mtrr: Print address ranges inclusive to be more consistent ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63541 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ca292f9cf272564cb5ef1c4ea38f5c483605c94 Gerrit-Change-Number: 63541 Gerrit-PatchSet: 4 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 13 Apr 2022 14:40:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/LinuxBoot: Fix u-root branch
by Felix Singer (Code Review) 13 Apr '22

13 Apr '22

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62590 ) Change subject: payloads/LinuxBoot: Fix u-root branch ...................................................................... payloads/LinuxBoot: Fix u-root branch It looks like the u-root 'master' branch was renamed to 'main'. Change-Id: I384ba66289a49bf226b505615bd16bdf85612c1a Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62590 Reviewed-by: Christian Walter <christian.walter(a)9elements.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/targets/u-root.mk 2 files changed, 5 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Christian Walter: Looks good to me, approved diff --git a/payloads/external/LinuxBoot/Kconfig b/payloads/external/LinuxBoot/Kconfig index a1e4e1f..b4bb053 100644 --- a/payloads/external/LinuxBoot/Kconfig +++ b/payloads/external/LinuxBoot/Kconfig @@ -177,15 +177,15 @@ choice prompt "U-root version" - default LINUXBOOT_UROOT_MASTER + default LINUXBOOT_UROOT_MAIN config LINUXBOOT_UROOT_CUSTOM bool "custom" help choose a custom u-root branch -config LINUXBOOT_UROOT_MASTER - bool "master" +config LINUXBOOT_UROOT_MAIN + bool "main" help Latest u-root version @@ -207,7 +207,7 @@ config LINUXBOOT_UROOT_VERSION string default LINUXBOOT_UROOT_CHECKOUT if LINUXBOOT_UROOT_CUSTOM - default "master" if LINUXBOOT_UROOT_MASTER + default "main" if LINUXBOOT_UROOT_MAIN default "v3.0.0" if LINUXBOOT_UROOT_V3_0_0 default "v2.0.0" if LINUXBOOT_UROOT_V2_0_0 default "v1.0.0" if LINUXBOOT_UROOT_V1_0_0 diff --git a/payloads/external/LinuxBoot/targets/u-root.mk b/payloads/external/LinuxBoot/targets/u-root.mk index 0cf91fe..af2f95a 100644 --- a/payloads/external/LinuxBoot/targets/u-root.mk +++ b/payloads/external/LinuxBoot/targets/u-root.mk @@ -39,7 +39,7 @@ get: version if [ -d "$(go_path_dir)/src/$(uroot_package)" ]; then \ - git -C $(go_path_dir)/src/$(uroot_package) checkout --quiet master; \ + git -C $(go_path_dir)/src/$(uroot_package) checkout --quiet main; \ GOPATH=$(go_path_dir) go get -d -u -v $(uroot_package) || \ echo -e "\n<<u-root package update failed>>\n"; \ else \ -- To view, visit https://review.coreboot.org/c/coreboot/+/62590 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I384ba66289a49bf226b505615bd16bdf85612c1a Gerrit-Change-Number: 62590 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/mediatek/mt8195: Reserve 17MB DRAM for audio and DSP
by Rex-BC Chen (Code Review) 13 Apr '22

13 Apr '22

Rex-BC Chen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/63605 ) Change subject: soc/mediatek/mt8195: Reserve 17MB DRAM for audio and DSP ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/63605 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0ef9fe2ef3447c6f663eb91f5184cdb7482c4a4 Gerrit-Change-Number: 63605 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in coreboot[master]: soc/mediatek/mt8195: Reserve 17MB DRAM for audio and DSP
by Yu-Ping Wu (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63605 ) Change subject: soc/mediatek/mt8195: Reserve 17MB DRAM for audio and DSP ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Yes, the kernel dts reserves the region. […] Yes, as we don't need this patch. Sorry for not noticing this before. -- To view, visit https://review.coreboot.org/c/coreboot/+/63605 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id0ef9fe2ef3447c6f663eb91f5184cdb7482c4a4 Gerrit-Change-Number: 63605 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 13 Apr 2022 14:26:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: util: Add amdfwread utility
by Felix Held (Code Review) 13 Apr '22

13 Apr '22

Attention is currently required from: Robert Zieba, Bao Zheng, Marshall Dawson. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62795 ) Change subject: util: Add amdfwread utility ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: > I took a deeper look into 54901 and it seems that amdfwtool is so focused on writing FW images that […] ok, if it's easier and cleaner to have another tool for that, i'm ok with that. i'd strongly recommend to put the code for the new tool into the util/amdfwtool/ directory though, so that the code doesn't need to include things from a different directory which makes things more difficult to follow -- To view, visit https://review.coreboot.org/c/coreboot/+/62795 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15fa07c9cad8e4640e9c40e5539b0dab44424850 Gerrit-Change-Number: 62795 Gerrit-PatchSet: 7 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Wed, 13 Apr 2022 14:23:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Robert Zieba <robertzieba(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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