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Hello Lance Zhao, build bot (Jenkins), Raul Rangel, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: drivers/usb/acpi: acpi_power_res_params: Add use_gpio_for_status
......................................................................
drivers/usb/acpi: acpi_power_res_params: Add use_gpio_for_status
Add the member `use_gpio_for_status` to the structure
`drivers_usb_acpi_config`, so the `devicetree.cb` can specify it.
This field is then used to initialize the corresponding field in the
structure `acpi_power_res_params` in `usb_acpi_fill_ssdt_generator()`.
The member `acpi_power_res_params::use_gpio_for_status()` is already
being used by `acpi_device_add_power_res()` to determine which version
of the `_STA()` method to output.
BRANCH=None
Signed-off-by: Tim Van Patten <timvp(a)google.com>
BUG=b:225022810
TEST=Dump SSDT table for guybrush
Change-Id: I69eb5f1ad79f3b2980f43dcf4a36585fca198ec9
---
M src/drivers/usb/acpi/chip.h
M src/drivers/usb/acpi/usb_acpi.c
2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63558/3
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Change subject: soc/intel/denverton_ns: enable Denverton to use common SoC XHCI code
......................................................................
Patch Set 11:
(1 comment)
Patchset:
PS11:
> a new patch series is being prepared to address this (and the remaining patch series issues, if any)
OK. Ping me when it will be ready for review.
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63437 )
Change subject: util/lint/checkpatch.pl: Update to v5.18-2 lines related to verbosity
......................................................................
Patch Set 4:
(1 comment)
File util/lint/checkpatch.pl:
https://review.coreboot.org/c/coreboot/+/63437/comment/3f06733f_473ab3c9
PS4, Line 68: $D/../Documentation/dev-tools/checkpatch.rst
Sorry, I thought I had already commented, but I don't see anything, so I guess not.
This file doesn't exist at coreboot. We might want to grab that file and adapt it for our fork, but until we do, this should probably be left blank, i think.
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Change subject: mb/google/brya/var/kano: Configure Acoustic noise mitigation
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63610/comment/df34e95e_9f633c8f
PS1, Line 9: Enable Acoustic noise mitigation for kano and set slew rate to 1/8
> suggestion: […]
Done. Thanks.
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Hello build bot (Jenkins), Tim Wawrzynczak, Ren Kuo, Nick Vaccaro, Nick Vaccaro, Peter Ou,
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Change subject: mb/google/brya/var/kano: Configure Acoustic noise mitigation
......................................................................
mb/google/brya/var/kano: Configure Acoustic noise mitigation
Setup the following acoustic noise mitigation features:
1) Slew rate for both IA and GT domains to 1/8
2) Disable Fast package C ramp
BUG=b:229046516
TEST=build and verified by power team
Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com>
Change-Id: Ifb5700391e33818878994f205acae7ee3b1b96d9
---
M src/mainboard/google/brya/variants/kano/overridetree.cb
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/63610/2
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Change subject: mb/google/brya/var/kano: Configure Acoustic noise mitigation
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63610/comment/ce8a46c9_f6cf03d6
PS1, Line 9: Enable Acoustic noise mitigation for kano and set slew rate to 1/8
suggestion:
```
Setup the following acoustic noise mitigation features:
1) Slew rate for both IA and GT domains to 1/8
2) Disable Fast package C ramp
```
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Change subject: mb/google/brask/variants/moli: use specific VBT files
......................................................................
Patch Set 8: Code-Review+2
(1 comment)
File src/mainboard/google/brya/variants/moli/ramstage.c:
https://review.coreboot.org/c/coreboot/+/63604/comment/9e2a33e3_1359f2ca
PS2, Line 38: return "vbt-moli_HDMI.bin";
> Ok, it can reference by this […]
They are currently added to the coreboot image in a private build step.
That reminds me, I need to clarify when we can publish these in public with Intel. I am trying to push for us to be able to publish these in the open sooner in a program rather than afterwards.
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