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Change subject: soc/amd/common/block/update_microcode: Make ucode update more generic
......................................................................
Patch Set 1:
(1 comment)
File src/soc/amd/common/block/cpu/update_microcode.c:
https://review.coreboot.org/c/coreboot/+/63589/comment/da589942_b6e299be
PS1, Line 49: CEZANNE_PROC_REV_ID
> I'm not a fan of having SoC specific code in common/. […]
That's fair. I'll need to figure out a different approach then.
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Change subject: mb/google/brask/variants/moli: update type-c setting in overridetree
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Patch Set 6: Code-Review+2
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Change subject: util/apcb/apcb_v3_edit.py: Edit APCB based on different SPD magic
......................................................................
Patch Set 1:
(2 comments)
File util/apcb/apcb_v3_edit.py:
https://review.coreboot.org/c/coreboot/+/63598/comment/345973a5_89836d58
PS1, Line 84: if args.spd_magic:
: SPD_MAGIC = bytes.fromhex(args.spd_magic)
Can you use a local variable instead?
```
if args.spd_magic:
spd_magic = bytes.fromhex(args.spd_magic)
else:
spd_magic = SPD_MAGIC
```
https://review.coreboot.org/c/coreboot/+/63598/comment/1818aca5_df3d6f5f
PS1, Line 97: SPD_MAGIC
Switch this to use `spd_magic`
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Change subject: util/spd_tools/part_id_gen: Support Sabrina SoC
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Patch Set 1: Code-Review+2
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Change subject: mb/prodrive/atlas: Update Kconfig
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Patch Set 5: Code-Review+2
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Change subject: drivers/usb/acpi: acpi_power_res_params: Add use_gpio_for_status
......................................................................
Patch Set 2:
(3 comments)
File src/acpi/device.c:
https://review.coreboot.org/c/coreboot/+/63558/comment/cd67ab8f_48972f91
PS2, Line 608: bool active
not required
https://review.coreboot.org/c/coreboot/+/63558/comment/a4f404a9_6969e43f
PS2, Line 623: f (active)
: acpigen_emit_byte(LNOT_OP);
acpigen_get_tx_gpio() will already return "1" for the active state, regardless of polarity (i.e., the function already takes care of the pin's polarity, see https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…https://review.coreboot.org/c/coreboot/+/63558/comment/ccd393f3_8cfc6f28
PS2, Line 703: /* Check if the device is already enabled before enabling it again.
: This allows for skipping the sleep if it's also requested. */
See https://doc.coreboot.org/contributing/coding_style.html?highlight=Commenting about style for multi-line comments
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Change subject: soc/amd/sabrina: Allow to specify custom SPL File
......................................................................
Patch Set 4:
(1 comment)
File src/soc/amd/sabrina/Kconfig:
https://review.coreboot.org/c/coreboot/+/63313/comment/e1781dfb_f1fde5a0
PS3, Line 392: default y
> this needs to be default n, since the fw. […]
Done
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