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Change subject: soc/intel/alderlake/chip.c: Add missing ADL-S USB ports ACPI names
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/intel/alderlake: add chipset devicetree for ADL-S
......................................................................
Patch Set 9:
(1 comment)
File src/soc/intel/alderlake/fsp_params.c:
PS9:
Instead of all of these #ifs, should we add a small file each for -S/H and one for client (P/M/N) to paper over the differences>
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Change subject: arch/x86/acpi_bert_storage.c: Use BOOT_STATE over CBMEM hooks
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> looks good to me, but haven't tested this on hardware yet
I know it's fine for Intel, because the crashlog flow happens during the devicetree flow, and this is PRE_DEVICE, so it's really only slightly later in ramstage.
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Change subject: soc/intel/common: Add PMC Crashlog PCI driver
......................................................................
Patch Set 9:
(2 comments)
File src/soc/intel/common/Kconfig.common:
https://review.coreboot.org/c/coreboot/+/57684/comment/0f51cad6_8bbeec2e
PS9, Line 40: crashlog record on every boot.
> Do you mean "enables the PMC crashlog driver to collect crashlog records on every reset"? If the PMC […]
You can configure the PMC so that it will collect a trace of its activity during boot; so if you enable the Kconfig, it will send that message on every boot, hence every warm reboot will contain a PMC crashlog trace only.
File src/soc/intel/common/block/crashlog/pmc_crashlog.c:
https://review.coreboot.org/c/coreboot/+/57684/comment/3bab3ad0_050b75f4
PS9, Line 269:
> Once crashlog records are collected, should we clear the records?
Yep, that's part of the `enable` flow, see line 292
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Change subject: cpu/x86/smm: Refactor creating a stub/save state map
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Patch Set 7: Code-Review+1
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Hello build bot (Jenkins), Nico Huber, Martin L Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63639
to look at the new patch set (#5).
Change subject: Add SBOM (Software Bill of Materials) Generation
......................................................................
Add SBOM (Software Bill of Materials) Generation
Add Makefile.inc to Generate and build coswid tags
Add templates for most payloads, coreboot and intel-microcode
Add Kconfig entries to optionaly add coswid tags for payloads, coreboot
and intel microcode
Add CBFS entry called sbom to each build via Makefile.inc
Motivation:
https://blogs.gnome.org/hughsie/2022/03/10/firmware-software-bill-of-materi…
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: Icb7481d4903f95d200eddbfed7728fbec51819d0
---
M Makefile.inc
M payloads/Kconfig
M src/Kconfig
A src/sbom/Makefile.inc
A src/sbom/coreboot.ini.src
A src/sbom/intel-microcode.ini.src
A src/sbom/payload-BOOTBOOT.ini.src
A src/sbom/payload-FILO.ini.src
A src/sbom/payload-GRUB2.ini.src
A src/sbom/payload-LinuxBoot.ini.src
A src/sbom/payload-SeaBIOS.ini.src
A src/sbom/payload-U-Boot.ini.src
A src/sbom/payload-Yabits.ini.src
A src/sbom/payload-depthcharge.ini.src
A src/sbom/payload-iPXE.ini.src
A src/sbom/payload-skiboot.ini.src
M src/southbridge/intel/common/firmware/Kconfig
17 files changed, 328 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/63639/5
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Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63659 )
Change subject: mb/google/nipperkin: Remove EC_ENABLE_MKBP_DEVICE
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/guybrush/variants/dewatt/include/variant/ec.h:
https://review.coreboot.org/c/coreboot/+/63659/comment/34e8af38_d390936f
PS1, Line 5: /* Enable MKBP for buttons and switches */
: #define EC_ENABLE_MKBP_DEVICE
:
: /* Enable Tablet switch */
: #define EC_ENABLE_TBMC_DEVICE
I am not sure if they go well together. I think we removed TBMC in nipperkin before enabling MKBP
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Change subject: payloads/external: Add support for coreDOOM payload
......................................................................
Patch Set 5:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57222/comment/5a92252b_ae46da39
PS4, Line 9: coreDOOM is a port of the doomgeneric source port of DOOM to libpayload, drawing
> Please wrap lines after 72 characters.
Done
Patchset:
PS5:
Rebased, removed unused options for libpayload config, and tweaked help text wordings.
File payloads/Kconfig:
https://review.coreboot.org/c/coreboot/+/57222/comment/4985e888_10c332e0
PS4, Line 154: or any other payload that can load additional payloads.
> … It needs the generic linear framebuffer.
Done
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