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Change subject: soc/intel/cmn/fast_spi: Add API to clear outstanding SPI status
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Patch Set 6:
(1 comment)
File src/soc/intel/common/block/fast_spi/fast_spi.c:
https://review.coreboot.org/c/coreboot/+/63625/comment/42561270_f5dabfb2
PS6, Line 437: SPIBAR_HSFSTS_W1C_BITS
> Hmmm, just noticed that this macro is defined as 0xff, so bit 8 isn't cleared by this write. I see this bit in document 341081-002: https://imgur.com/U6xFZrA.png
I could see those bits are reserved.
10:6 0h
RO
Reserved.
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Change subject: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent
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Patch Set 4: Code-Review+1
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Change subject: soc/intel/cmn/fast_spi: Add API to clear outstanding SPI status
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Patch Set 6:
(1 comment)
File src/soc/intel/common/block/fast_spi/fast_spi.c:
https://review.coreboot.org/c/coreboot/+/63625/comment/65ff8508_4e5586cc
PS6, Line 437: SPIBAR_HSFSTS_W1C_BITS
Hmmm, just noticed that this macro is defined as 0xff, so bit 8 isn't cleared by this write. I see this bit in document 341081-002: https://imgur.com/U6xFZrA.png
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Change subject: amdfwtool: Change the name of macros for 'BHD'
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Patch Set 28: Code-Review+1
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Change subject: vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3133.00
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Patch Set 1: Code-Review+1
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Change subject: amdfwtool: Change the name of macros for 'BHD'
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Patch Set 27:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55411/comment/13764bfd_9d5bd088
PS27, Line 9: Use BHD instead of BDT as the name of cookie macro.
: Use L2 to make it clear it is for level 2. The 'BHD2' is misleading,
: which is going to be used for combo entry.
: The definition in psp_verstage is also changed.
> Please mark it up as a list, or do not wrap lines just because a sentence ends.
Done
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