coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/sabrina: Modify start address of PSP verstage
by Karthik Ramasubramanian (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63732 to look at the new patch set (#2). Change subject: soc/amd/sabrina: Modify start address of PSP verstage ...................................................................... soc/amd/sabrina: Modify start address of PSP verstage PSP verstage can start at address 0 and use 200KB of PSP SRAM for execution. Modify both the PSP SRAM start address and size for use by PSP verstage. BUG=b:220848544 TEST=Build Skyrim BIOS image with PSP verstage enabled. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I73e13b82faa0f443570a0c839e7699a79bdae024 --- M src/soc/amd/sabrina/include/soc/psp_verstage_addr.h 1 file changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/63732/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63732 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73e13b82faa0f443570a0c839e7699a79bdae024 Gerrit-Change-Number: 63732 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: tpm: Refactor TPM Kconfig dimensions
by Jes Klinke (Code Review) 20 Apr '22

20 Apr '22

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Change in coreboot[master]: mb/google/brya/var/taeko: Add WIFI SAR support for tarlo
by Tim Wawrzynczak (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: YH Lin, Joey Peng. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63644 ) Change subject: mb/google/brya/var/taeko: Add WIFI SAR support for tarlo ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63644/comment/a7bbaad2_06ad5053 PS5, Line 15: intaenal `internal` File src/mainboard/google/brya/variants/taeko/variant.c: https://review.coreboot.org/c/coreboot/+/63644/comment/a00fb0c5_42e3d653 PS5, Line 8: nit: remove extra blank line -- To view, visit https://review.coreboot.org/c/coreboot/+/63644 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9852553f5c91494db845d45a94e2566248538bba Gerrit-Change-Number: 63644 Gerrit-PatchSet: 5 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 22:06:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: tpm: Refactor TPM Kconfig dimensions
by Jes Klinke (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Stefan Ott, Felix Singer, Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Nico Huber, Sean Rhodes, Michał Żygowski, Johnny Lin, Christian Walter, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Julius Werner, Angel Pons, Michael Niewöhner, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak. Hello Felix Singer, Stefan Ott, build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Sean Rhodes, Nico Huber, Michał Żygowski, Johnny Lin, Christian Walter, siemens-bot, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Angel Pons, Julius Werner, Michael Niewöhner, Erik van den Bogaert, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63424 to look at the new patch set (#18). Change subject: tpm: Refactor TPM Kconfig dimensions ...................................................................... tpm: Refactor TPM Kconfig dimensions Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of the above is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e --- M Documentation/getting_started/kconfig.md M src/drivers/crb/Kconfig M src/drivers/crb/Makefile.inc M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/Makefile.inc M src/drivers/pc80/tpm/Kconfig M src/drivers/pc80/tpm/Makefile.inc M src/drivers/spi/tpm/Kconfig M src/drivers/spi/tpm/Makefile.inc M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/Makefile.inc M src/mainboard/acer/aspire_vn7_572g/Kconfig M src/mainboard/asrock/b85m_pro4/Kconfig M src/mainboard/asrock/h110m/Kconfig M src/mainboard/asus/am1i-a/Kconfig M src/mainboard/asus/h61-series/Kconfig.name M src/mainboard/asus/p8x7x-series/Kconfig.name M src/mainboard/clevo/cml-u/Kconfig M src/mainboard/clevo/kbl-u/Kconfig M src/mainboard/clevo/tgl-u/Kconfig M src/mainboard/dell/snb_ivb_workstations/Kconfig M src/mainboard/emulation/qemu-q35/Kconfig M src/mainboard/facebook/fbg1701/Kconfig M src/mainboard/facebook/monolith/Kconfig M src/mainboard/foxconn/g41s-k/Kconfig M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig M src/mainboard/google/asurada/Kconfig M src/mainboard/google/auron/Kconfig M src/mainboard/google/beltino/Kconfig M src/mainboard/google/brya/Kconfig M src/mainboard/google/butterfly/Kconfig M src/mainboard/google/cherry/Kconfig M src/mainboard/google/corsola/Kconfig M src/mainboard/google/cyan/Kconfig M src/mainboard/google/daisy/Kconfig M src/mainboard/google/dedede/Kconfig M src/mainboard/google/deltaur/Kconfig M src/mainboard/google/drallion/Kconfig M src/mainboard/google/eve/Kconfig M src/mainboard/google/fizz/Kconfig M src/mainboard/google/foster/Kconfig M src/mainboard/google/gale/Kconfig M src/mainboard/google/glados/Kconfig M src/mainboard/google/gru/Kconfig M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/hatch/Kconfig M src/mainboard/google/herobrine/Kconfig M src/mainboard/google/herobrine/bootblock.c M src/mainboard/google/jecht/Kconfig M src/mainboard/google/kahlee/Kconfig M src/mainboard/google/kukui/Kconfig M src/mainboard/google/link/Kconfig M src/mainboard/google/nyan_big/Kconfig M src/mainboard/google/nyan_blaze/Kconfig M src/mainboard/google/oak/Kconfig M src/mainboard/google/octopus/Kconfig M src/mainboard/google/parrot/Kconfig M src/mainboard/google/peach_pit/Kconfig M src/mainboard/google/poppy/Kconfig M src/mainboard/google/rambi/Kconfig M src/mainboard/google/reef/Kconfig M src/mainboard/google/sarien/Kconfig M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/slippy/Kconfig M src/mainboard/google/smaug/Kconfig M src/mainboard/google/storm/Kconfig M src/mainboard/google/stout/Kconfig M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/veyron/Kconfig M src/mainboard/google/veyron_mickey/Kconfig M src/mainboard/google/veyron_rialto/Kconfig M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/mainboard.c M src/mainboard/google/volteer/variants/chronicler/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/variant.c M src/mainboard/google/zork/Kconfig M src/mainboard/hp/compaq_8200_elite_sff/Kconfig M src/mainboard/hp/folio_9480m/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/z220_series/Kconfig M src/mainboard/intel/adlrvp/Kconfig M src/mainboard/intel/baskingridge/Kconfig M src/mainboard/intel/coffeelake_rvp/Kconfig M src/mainboard/intel/galileo/Kconfig M src/mainboard/intel/glkrvp/Kconfig M src/mainboard/intel/kblrvp/Kconfig M src/mainboard/intel/kunimitsu/Kconfig M src/mainboard/intel/shadowmountain/Kconfig M src/mainboard/intel/strago/Kconfig M src/mainboard/intel/tglrvp/Kconfig M src/mainboard/intel/wtm2/Kconfig M src/mainboard/kontron/bsl6/Kconfig M src/mainboard/kontron/mal10/Kconfig M src/mainboard/lenovo/s230u/Kconfig M src/mainboard/lenovo/t410/Kconfig M src/mainboard/lenovo/t420/Kconfig M src/mainboard/lenovo/t420s/Kconfig M src/mainboard/lenovo/t430/Kconfig M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t440p/Kconfig M src/mainboard/lenovo/t520/Kconfig M src/mainboard/lenovo/t530/Kconfig M src/mainboard/lenovo/w541/Kconfig M src/mainboard/lenovo/x131e/Kconfig M src/mainboard/lenovo/x1_carbon_gen1/Kconfig M src/mainboard/lenovo/x201/Kconfig M src/mainboard/lenovo/x220/Kconfig M src/mainboard/lenovo/x230/Kconfig M src/mainboard/libretrend/lt1000/Kconfig M src/mainboard/ocp/deltalake/Kconfig M src/mainboard/opencellular/elgon/Kconfig M src/mainboard/pcengines/apu1/Kconfig M src/mainboard/pcengines/apu2/Kconfig M src/mainboard/prodrive/hermes/Kconfig M src/mainboard/protectli/vault_kbl/Kconfig M src/mainboard/purism/librem_cnl/Kconfig.name M src/mainboard/purism/librem_skl/Kconfig M src/mainboard/razer/blade_stealth_kbl/Kconfig M src/mainboard/samsung/lumpy/Kconfig M src/mainboard/samsung/stumpy/Kconfig M src/mainboard/siemens/chili/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl6/Kconfig M src/mainboard/siemens/mc_ehl/Kconfig M src/mainboard/starlabs/labtop/Kconfig M src/mainboard/starlabs/lite/Kconfig M src/mainboard/supermicro/x11-lga1151-series/Kconfig M src/mainboard/supermicro/x9sae/Kconfig M src/mainboard/system76/addw1/Kconfig M src/mainboard/system76/bonw14/Kconfig M src/mainboard/system76/cml-u/Kconfig M src/mainboard/system76/darp7/Kconfig M src/mainboard/system76/galp5/Kconfig M src/mainboard/system76/gaze15/Kconfig M src/mainboard/system76/gaze16/Kconfig M src/mainboard/system76/kbl-u/Kconfig M src/mainboard/system76/lemp10/Kconfig M src/mainboard/system76/lemp9/Kconfig M src/mainboard/system76/oryp5/Kconfig M src/mainboard/system76/oryp6/Kconfig M src/mainboard/system76/oryp8/Kconfig M src/mainboard/system76/whl-u/Kconfig M src/mainboard/up/squared/Kconfig M src/security/tpm/Kconfig M src/security/tpm/Makefile.inc M src/security/tpm/tss/vendor/cr50/Kconfig M src/security/vboot/secdata_mock.c M src/security/vboot/secdata_tpm.c M src/security/vboot/vboot_logic.c M src/soc/intel/apollolake/Kconfig M src/soc/intel/common/Makefile.inc M src/soc/intel/skylake/acpi/systemagent.asl M src/soc/intel/tigerlake/Kconfig M src/vendorcode/google/chromeos/Kconfig M src/vendorcode/google/chromeos/Makefile.inc M src/vendorcode/google/chromeos/cse_board_reset.c 159 files changed, 260 insertions(+), 289 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/63424/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/63424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Gerrit-Change-Number: 63424 Gerrit-PatchSet: 18 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: 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Change in coreboot[master]: soc/intel/alderlake: Implement PMC static function lock
by Tim Wawrzynczak (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Subrata Banik, Nick Vaccaro, Arthur Heymans, Eric Lai, Lean Sheng Tan, Werner Zeh. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63689 ) Change subject: soc/intel/alderlake: Implement PMC static function lock ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/alderlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/63689/comment/929121e5_446eec02 PS2, Line 60: /* PMSYNC */ : pmc_lock_pmsync(); : /* Lock down ABASE and sleep stretching policy */ : pmc_lock_abase(); : : if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) : pmc_lock_smi(); : : if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) : pmc_st_pg_lock(); Noting that this file is basically just setting a few bits in some PMBASE registers, do we need another function to get pmcbase, etc. ? seems like this whole file could be more like 10 lines long? ``` static void pmc_lockdown_cfg(int chipset_lockdown) { setbits32(pmc_mmio_regs() + PMSYNC_TPR_CFG, PCH2CPU_TPR_CFG_LOCK); setbits32(pmc_mmio_regs() + GEN_PMCON_B, SLPSTR_PL_LOCK | ACPI_BASE_LOCK); if (chipset_lockdown) setbits8(pmc_mmio_regs() + GEN_PMCON_B, SMI_LOCK); if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) setbits32(pmc_mmio_regs() + ST_PG_FDIS1, ST_FDIS_LOCK); } void soc_lockdown_config(int chipset_lockdown) { pmc_lockdown_cfg(chipset_lockdown); } ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/63689 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I68343f9af4f34aceae06293c5f87c5eaa3430a60 Gerrit-Change-Number: 63689 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 21:36:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/smbus: Add `finalize` operation for smbus
by Tim Wawrzynczak (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Felix Singer, Subrata Banik, Angel Pons, Arthur Heymans, Nick Vaccaro, Lean Sheng Tan, Eric Lai, Werner Zeh. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63640 ) Change subject: soc/intel/common/smbus: Add `finalize` operation for smbus ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/smbus/smbus.c: https://review.coreboot.org/c/coreboot/+/63640/comment/18aa09aa_357c4b62 PS5, Line 77: tco_lockdown(); > That makes sense, thanks :) So why is this call even necessary here, because it is already taken care of in pch_finalize regardless? Seems like this part (of FSP PCI enum finalize step) is already taken care of in current coreboot code. -- To view, visit https://review.coreboot.org/c/coreboot/+/63640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie945680049514e6c5d797790a381a6946e836926 Gerrit-Change-Number: 63640 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 21:25:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent
by Tim Wawrzynczak (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Subrata Banik, Nick Vaccaro, Arthur Heymans. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63518 ) Change subject: soc/intel/common/{sa, adl}: Add `finalize` operation for systemagent ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/common/block/systemagent/systemagent.c: https://review.coreboot.org/c/coreboot/+/63518/comment/c1737b76_1527bf72 PS7, Line 327: if (!CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) : sa_lock_pam(); What about the lockdown_config() == CHIPSET_LOCKDOWN_COREBOOT on line 79? Shouldn't this code take that into account as well? -- To view, visit https://review.coreboot.org/c/coreboot/+/63518 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibd464d2507393ed0c746eb1fbd10e36092ed5599 Gerrit-Change-Number: 63518 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 19 Apr 2022 21:23:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: tpm: Refactor TPM Kconfig dimensions
by Jes Klinke (Code Review) 20 Apr '22

20 Apr '22

Attention is currently required from: Stefan Ott, Felix Singer, Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Nico Huber, Sean Rhodes, Michał Żygowski, Johnny Lin, Christian Walter, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Julius Werner, Angel Pons, Michael Niewöhner, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak. Hello Felix Singer, Stefan Ott, build bot (Jenkins), Patrick Rudolph, Jonathan Zhang, Nick Vaccaro, Arthur Heymans, Andrey Petrov, Piotr Król, Sean Rhodes, Nico Huber, Michał Żygowski, Johnny Lin, Christian Walter, siemens-bot, Werner Zeh, Alexander Couzens, Yu-Ping Wu, Tim Chu, Frans Hendriks, Tristan Corrick, Jeremy Soller, Angel Pons, Julius Werner, Michael Niewöhner, Erik van den Bogaert, Tim Crawford, Maxim Polyakov, Tim Wawrzynczak, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63424 to look at the new patch set (#17). Change subject: tpm: Refactor TPM Kconfig dimensions ...................................................................... tpm: Refactor TPM Kconfig dimensions Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of the above is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e --- M Documentation/getting_started/kconfig.md M src/drivers/crb/Kconfig M src/drivers/crb/Makefile.inc M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/Makefile.inc M src/drivers/pc80/tpm/Kconfig M src/drivers/pc80/tpm/Makefile.inc M src/drivers/spi/tpm/Kconfig M src/drivers/spi/tpm/Makefile.inc M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/Makefile.inc M src/mainboard/acer/aspire_vn7_572g/Kconfig M src/mainboard/asrock/b85m_pro4/Kconfig M src/mainboard/asrock/h110m/Kconfig M src/mainboard/asus/am1i-a/Kconfig M src/mainboard/asus/h61-series/Kconfig.name M src/mainboard/asus/p8x7x-series/Kconfig.name M src/mainboard/clevo/cml-u/Kconfig M src/mainboard/clevo/kbl-u/Kconfig M src/mainboard/clevo/tgl-u/Kconfig M src/mainboard/dell/snb_ivb_workstations/Kconfig M src/mainboard/emulation/qemu-q35/Kconfig M src/mainboard/facebook/fbg1701/Kconfig M src/mainboard/facebook/monolith/Kconfig M src/mainboard/foxconn/g41s-k/Kconfig M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig M src/mainboard/google/asurada/Kconfig M src/mainboard/google/auron/Kconfig M src/mainboard/google/beltino/Kconfig M src/mainboard/google/brya/Kconfig M src/mainboard/google/butterfly/Kconfig M src/mainboard/google/cherry/Kconfig M src/mainboard/google/corsola/Kconfig M src/mainboard/google/cyan/Kconfig M src/mainboard/google/daisy/Kconfig M src/mainboard/google/dedede/Kconfig M src/mainboard/google/deltaur/Kconfig M src/mainboard/google/drallion/Kconfig M src/mainboard/google/eve/Kconfig M src/mainboard/google/fizz/Kconfig M src/mainboard/google/foster/Kconfig M src/mainboard/google/gale/Kconfig M src/mainboard/google/glados/Kconfig M src/mainboard/google/gru/Kconfig M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/hatch/Kconfig M src/mainboard/google/herobrine/Kconfig M src/mainboard/google/herobrine/bootblock.c M src/mainboard/google/jecht/Kconfig M src/mainboard/google/kahlee/Kconfig M src/mainboard/google/kukui/Kconfig M src/mainboard/google/link/Kconfig M src/mainboard/google/nyan_big/Kconfig M src/mainboard/google/nyan_blaze/Kconfig M src/mainboard/google/oak/Kconfig M src/mainboard/google/octopus/Kconfig M src/mainboard/google/parrot/Kconfig M src/mainboard/google/peach_pit/Kconfig M src/mainboard/google/poppy/Kconfig M src/mainboard/google/rambi/Kconfig M src/mainboard/google/reef/Kconfig M src/mainboard/google/sarien/Kconfig M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/slippy/Kconfig M src/mainboard/google/smaug/Kconfig M src/mainboard/google/storm/Kconfig M src/mainboard/google/stout/Kconfig M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/veyron/Kconfig M src/mainboard/google/veyron_mickey/Kconfig M src/mainboard/google/veyron_rialto/Kconfig M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/mainboard.c M src/mainboard/google/volteer/variants/chronicler/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/variant.c M src/mainboard/google/zork/Kconfig M src/mainboard/hp/compaq_8200_elite_sff/Kconfig M src/mainboard/hp/folio_9480m/Kconfig M src/mainboard/hp/snb_ivb_laptops/Kconfig M src/mainboard/hp/z220_series/Kconfig M src/mainboard/intel/adlrvp/Kconfig M src/mainboard/intel/baskingridge/Kconfig M src/mainboard/intel/coffeelake_rvp/Kconfig M src/mainboard/intel/galileo/Kconfig M src/mainboard/intel/glkrvp/Kconfig M src/mainboard/intel/kblrvp/Kconfig M src/mainboard/intel/kunimitsu/Kconfig M src/mainboard/intel/shadowmountain/Kconfig M src/mainboard/intel/strago/Kconfig M src/mainboard/intel/tglrvp/Kconfig M src/mainboard/intel/wtm2/Kconfig M src/mainboard/kontron/bsl6/Kconfig M src/mainboard/kontron/mal10/Kconfig M src/mainboard/lenovo/s230u/Kconfig M src/mainboard/lenovo/t410/Kconfig M src/mainboard/lenovo/t420/Kconfig M src/mainboard/lenovo/t420s/Kconfig M src/mainboard/lenovo/t430/Kconfig M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t440p/Kconfig M src/mainboard/lenovo/t520/Kconfig M src/mainboard/lenovo/t530/Kconfig M src/mainboard/lenovo/w541/Kconfig M src/mainboard/lenovo/x131e/Kconfig M src/mainboard/lenovo/x1_carbon_gen1/Kconfig M src/mainboard/lenovo/x201/Kconfig M src/mainboard/lenovo/x220/Kconfig M src/mainboard/lenovo/x230/Kconfig M src/mainboard/libretrend/lt1000/Kconfig M src/mainboard/ocp/deltalake/Kconfig M src/mainboard/opencellular/elgon/Kconfig M src/mainboard/pcengines/apu1/Kconfig M src/mainboard/pcengines/apu2/Kconfig M src/mainboard/prodrive/hermes/Kconfig M src/mainboard/protectli/vault_kbl/Kconfig M src/mainboard/purism/librem_cnl/Kconfig.name M src/mainboard/purism/librem_skl/Kconfig M src/mainboard/razer/blade_stealth_kbl/Kconfig M src/mainboard/samsung/lumpy/Kconfig M src/mainboard/samsung/stumpy/Kconfig M src/mainboard/siemens/chili/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl6/Kconfig M src/mainboard/siemens/mc_ehl/Kconfig M src/mainboard/starlabs/labtop/Kconfig M src/mainboard/starlabs/lite/Kconfig M src/mainboard/supermicro/x11-lga1151-series/Kconfig M src/mainboard/supermicro/x9sae/Kconfig M src/mainboard/system76/addw1/Kconfig M src/mainboard/system76/bonw14/Kconfig M src/mainboard/system76/cml-u/Kconfig M src/mainboard/system76/darp7/Kconfig M src/mainboard/system76/galp5/Kconfig M src/mainboard/system76/gaze15/Kconfig M src/mainboard/system76/gaze16/Kconfig M src/mainboard/system76/kbl-u/Kconfig M src/mainboard/system76/lemp10/Kconfig M src/mainboard/system76/lemp9/Kconfig M src/mainboard/system76/oryp5/Kconfig M src/mainboard/system76/oryp6/Kconfig M src/mainboard/system76/oryp8/Kconfig M src/mainboard/system76/whl-u/Kconfig M src/mainboard/up/squared/Kconfig M src/security/tpm/Kconfig M src/security/tpm/Makefile.inc M src/security/tpm/tss/vendor/cr50/Kconfig M src/security/vboot/secdata_mock.c M src/security/vboot/secdata_tpm.c M src/security/vboot/vboot_logic.c M src/soc/intel/apollolake/Kconfig M src/soc/intel/common/Makefile.inc M src/soc/intel/skylake/acpi/systemagent.asl M src/soc/intel/tigerlake/Kconfig M src/vendorcode/google/chromeos/Kconfig M src/vendorcode/google/chromeos/Makefile.inc M src/vendorcode/google/chromeos/cse_board_reset.c 159 files changed, 260 insertions(+), 290 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/63424/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/63424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Gerrit-Change-Number: 63424 Gerrit-PatchSet: 17 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: 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Change in coreboot[master]: soc/amd/sabrina: Modify start address of PSP verstage
by Karthik Ramasubramanian (Code Review) 19 Apr '22

19 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Felix Held. Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63732 ) Change subject: soc/amd/sabrina: Modify start address of PSP verstage ...................................................................... soc/amd/sabrina: Modify start address of PSP verstage PSP verstage can start at address 0 and use 200KB of PSP SRAM for execution. Modify both the PSP SRAM start address and size for use by PSP verstage. BUG=b:220848544 TEST=Build Skyrim BIOS image with PSP verstage enabled. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I73e13b82faa0f443570a0c839e7699a79bdae024 --- M src/soc/amd/sabrina/include/soc/psp_verstage_addr.h 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/63732/1 diff --git a/src/soc/amd/sabrina/include/soc/psp_verstage_addr.h b/src/soc/amd/sabrina/include/soc/psp_verstage_addr.h index 6636ea1..b7939d9 100644 --- a/src/soc/amd/sabrina/include/soc/psp_verstage_addr.h +++ b/src/soc/amd/sabrina/include/soc/psp_verstage_addr.h @@ -6,12 +6,12 @@ #define AMD_SABRINA_PSP_VERSTAGE_ADDR_H /* - * Start of available space is 0x36000 and this is where the + * Start of available space is 0x0 and this is where the * header for the user app (verstage) must be mapped. - * Size is 0x14000 bytes + * Size is 208KB */ -#define PSP_SRAM_START 0x26000 -#define PSP_SRAM_SIZE (148K) +#define PSP_SRAM_START 0x0 +#define PSP_SRAM_SIZE (208K) #define VERSTAGE_START PSP_SRAM_START /* -- To view, visit https://review.coreboot.org/c/coreboot/+/63732 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73e13b82faa0f443570a0c839e7699a79bdae024 Gerrit-Change-Number: 63732 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/skyrim: Prepare for enabling PSP verstage
by Karthik Ramasubramanian (Code Review) 19 Apr '22

19 Apr '22

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63731 ) Change subject: mb/google/skyrim: Prepare for enabling PSP verstage ...................................................................... mb/google/skyrim: Prepare for enabling PSP verstage Add various verstage init functions to prepare for enable PSP verstage. BUG=None TEST=Build Skyrim BIOS image with PSP verstage enabled. Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Change-Id: I0d0dba05d4d083e2c6860078676e59cf8f487c87 --- M src/mainboard/google/skyrim/Makefile.inc M src/mainboard/google/skyrim/variants/baseboard/Makefile.inc A src/mainboard/google/skyrim/verstage.c 3 files changed, 40 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/63731/1 diff --git a/src/mainboard/google/skyrim/Makefile.inc b/src/mainboard/google/skyrim/Makefile.inc index f76a961..3a91cff 100644 --- a/src/mainboard/google/skyrim/Makefile.inc +++ b/src/mainboard/google/skyrim/Makefile.inc @@ -8,6 +8,8 @@ ramstage-y += ec.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c +verstage-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += verstage.c + subdirs-y += variants/baseboard subdirs-y += variants/$(VARIANT_DIR) diff --git a/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc b/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc index 7706e50..2864241 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/baseboard/Makefile.inc @@ -7,5 +7,6 @@ ramstage-y += tpm_tis.c verstage-y += tpm_tis.c +verstage-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += gpio.c smm-y += gpio.c diff --git a/src/mainboard/google/skyrim/verstage.c b/src/mainboard/google/skyrim/verstage.c new file mode 100644 index 0000000..8aaf70c --- /dev/null +++ b/src/mainboard/google/skyrim/verstage.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <amdblocks/acpimmio.h> +#include <amdblocks/gpio.h> +#include <arch/io.h> +#include <baseboard/variants.h> +#include <psp_verstage.h> +#include <security/vboot/vboot_common.h> +#include <soc/southbridge.h> + +void verstage_mainboard_early_init(void) +{ + const struct soc_amd_gpio *gpios, *override_gpios; + size_t num_gpios, override_num_gpios; + + variant_early_gpio_table(&gpios, &num_gpios); + variant_early_override_gpio_table(&override_gpios, &override_num_gpios); + gpio_configure_pads_with_override(gpios, num_gpios, override_gpios, override_num_gpios); +} + +void verstage_mainboard_espi_init(void) +{ + const struct soc_amd_gpio *gpios; + size_t num_gpios; + + variant_espi_gpio_table(&gpios, &num_gpios); + gpio_configure_pads(gpios, num_gpios); +} + +void verstage_mainboard_tpm_init(void) +{ + const struct soc_amd_gpio *gpios; + size_t num_gpios; + + variant_tpm_gpio_table(&gpios, &num_gpios); + gpio_configure_pads(gpios, num_gpios); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/63731 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d0dba05d4d083e2c6860078676e59cf8f487c87 Gerrit-Change-Number: 63731 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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