coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/alderlake: Implement PCH lock down configuration
by Werner Zeh (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Eric Lai, Lean Sheng Tan. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63692 ) Change subject: soc/intel/alderlake: Implement PCH lock down configuration ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/63692/comment/3d514e69_7847dd6e PS4, Line 41: if (CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) : return; : : /* Enable IOSF Primary Trunk Clock Gating */ : pcr_rmw32(PID_PSTH, PCR_PSTH_CTRLREG, ~0, PSTH_CTRLREG_IOSFPTCGE); > > In CB:63640 the logic is inverted.To stay consistent it would look like: […] Fine with me. -- To view, visit https://review.coreboot.org/c/coreboot/+/63692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie28dde8f62adc5bafc4a42e608827f51da82570c Gerrit-Change-Number: 63692 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 07:35:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Implement PMC feature lock
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63691 ) Change subject: soc/intel/alderlake: Implement PMC feature lock ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/63691/comment/f0beb719_f83b138f PS4, Line 28: setbits32(pmc_mmio_regs() + PM_CFG, PM_CFG_DBG_MODE_LOCK | > yes, this is what I asked at first. If we don't expect more, this is fine. for now, we are good I believe. -- To view, visit https://review.coreboot.org/c/coreboot/+/63691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29178bdd9a94a24ca7056eb7377625f41a43c33c Gerrit-Change-Number: 63691 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 07:34:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/cmn/fast_spi: Add API to clear outstanding SPI status
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63625 ) Change subject: soc/intel/cmn/fast_spi: Add API to clear outstanding SPI status ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/common/block/fast_spi/fast_spi.c: https://review.coreboot.org/c/coreboot/+/63625/comment/875c1688_35debe4c PS6, Line 437: SPIBAR_HSFSTS_W1C_BITS > I must admitt that Elkhart Lake does define bit 8 as well. Sorry for overseeing it. how about making is a word width ? actually BIOS_HSFSTS_CTL (offset 0x4) has two part as in LSB is HSFSTS and MSB is HSFCTL. In that case 0xFFFF would serve best IMO. WDYT? -- To view, visit https://review.coreboot.org/c/coreboot/+/63625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62adba0d0cef1d4c53b24800f90b4fe76a9d78b7 Gerrit-Change-Number: 63625 Gerrit-PatchSet: 6 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 22 Apr 2022 07:33:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Implement PMC feature lock
by Eric Lai (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Subrata Banik, Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Lean Sheng Tan, Werner Zeh. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63691 ) Change subject: soc/intel/alderlake: Implement PMC feature lock ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/63691/comment/ae3d03c3_b7d4812e PS4, Line 28: setbits32(pmc_mmio_regs() + PM_CFG, PM_CFG_DBG_MODE_LOCK | > > I am not sure that all this tweaks are worth it and will improve code readability. […] yes, this is what I asked at first. If we don't expect more, this is fine. -- To view, visit https://review.coreboot.org/c/coreboot/+/63691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29178bdd9a94a24ca7056eb7377625f41a43c33c Gerrit-Change-Number: 63691 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 07:33:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: lib/spd: Change log prefix for ddr4 params
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Kangheui Won, Tim Wawrzynczak, Reka Norman, Ivy Jian, Eric Lai. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63774 ) Change subject: lib/spd: Change log prefix for ddr4 params ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I55f0968b78baaa2fc9a6bbebf6712fb8bfd349f6 Gerrit-Change-Number: 63774 Gerrit-PatchSet: 1 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 07:31:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Implement PCH lock down configuration
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Eric Lai, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63692 ) Change subject: soc/intel/alderlake: Implement PCH lock down configuration ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/63692/comment/9791754c_fcd608cc PS4, Line 41: if (CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) : return; : : /* Enable IOSF Primary Trunk Clock Gating */ : pcr_rmw32(PID_PSTH, PCR_PSTH_CTRLREG, ~0, PSTH_CTRLREG_IOSFPTCGE); > In CB:63640 the logic is inverted.To stay consistent it would look like: > > if (!CONFIG(USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM)) > pcr_rmw32(PID_PSTH, PCR_PSTH_CTRLREG, ~0, PSTH_CTRLREG_IOSFPTCGE); > > But up to you. yeah, I did that to avoid braces and indentation @Werner, do you think this is reasonable ? with CB:63640, the entire `pmc_lockdown_cfg` function we are not skipping when `USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM` is selected, hence had to use `invert` logic there -- To view, visit https://review.coreboot.org/c/coreboot/+/63692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie28dde8f62adc5bafc4a42e608827f51da82570c Gerrit-Change-Number: 63692 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 07:30:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Implement PMC feature lock
by Subrata Banik (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Angel Pons, Arthur Heymans, Nick Vaccaro, Eric Lai, Lean Sheng Tan, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63691 ) Change subject: soc/intel/alderlake: Implement PMC feature lock ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/lockdown.c: https://review.coreboot.org/c/coreboot/+/63691/comment/41906b17_559e39af PS4, Line 28: setbits32(pmc_mmio_regs() + PM_CFG, PM_CFG_DBG_MODE_LOCK | > I am not sure that all this tweaks are worth it and will improve code readability. If we are not plan to add several dozens of these I would keep it as it is. I would prefer to keep it as is without bringing structure and additional complexity. Agree with Werner, it might reduce the code readability. WDYT @Eric? -- To view, visit https://review.coreboot.org/c/coreboot/+/63691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I29178bdd9a94a24ca7056eb7377625f41a43c33c Gerrit-Change-Number: 63691 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 07:27:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/*/*/*.fmd: Start flash at 0
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Stefan Ott, Jason Glenesk, Raul Rangel, Sean Rhodes, Patrick Rudolph, Marshall Dawson, Christian Walter, Tim Wawrzynczak, Julius Werner, Alexander Couzens, Fred Reitberger, Felix Held. Hello Stefan Ott, Raul Rangel, Frans Hendriks, Patrick Rudolph, Julius Werner, Erik van den Bogaert, Jason Glenesk, Sean Rhodes, Marshall Dawson, Christian Walter, Tim Wawrzynczak, Alexander Couzens, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63771 to look at the new patch set (#3). Change subject: mb/*/*/*.fmd: Start flash at 0 ...................................................................... mb/*/*/*.fmd: Start flash at 0 FMAP should not contain information about the memory map. Done with the following command: "find -name \*.fmd -exec sed -i 's/\(FLASH\).* \(.*\) /\1 \2 /' {} \;" Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/amd/bilby/board.fmd M src/mainboard/amd/chausie/board.fmd M src/mainboard/amd/chausie/chromeos.fmd M src/mainboard/amd/majolica/board.fmd M src/mainboard/amd/majolica/chromeos.fmd M src/mainboard/amd/mandolin/variants/cereme/board.fmd M src/mainboard/amd/mandolin/variants/mandolin/board.fmd M src/mainboard/cavium/cn8100_sff_evb/board.fmd M src/mainboard/emulation/qemu-i440fx/vboot-rwa-16M.fmd M src/mainboard/emulation/qemu-q35/vboot-rwa-16M.fmd M src/mainboard/emulation/qemu-q35/vboot-rwab-16M.fmd M src/mainboard/facebook/fbg1701/vboot-rw.fmd M src/mainboard/google/asurada/chromeos.fmd M src/mainboard/google/auron/chromeos.fmd M src/mainboard/google/beltino/chromeos.fmd M src/mainboard/google/butterfly/chromeos.fmd M src/mainboard/google/cherry/chromeos.fmd M src/mainboard/google/corsola/chromeos.fmd M src/mainboard/google/cyan/chromeos.fmd M src/mainboard/google/daisy/chromeos.fmd M src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd M src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd M src/mainboard/google/deltaur/chromeos-gbe.fmd M src/mainboard/google/deltaur/chromeos.fmd M src/mainboard/google/drallion/chromeos.fmd M src/mainboard/google/eve/chromeos.fmd M src/mainboard/google/fizz/chromeos.fmd M src/mainboard/google/foster/chromeos.fmd M src/mainboard/google/gale/chromeos.fmd M src/mainboard/google/glados/chromeos.fmd M src/mainboard/google/gru/chromeos.fmd M src/mainboard/google/guybrush/chromeos.fmd M src/mainboard/google/hatch/chromeos-hatch-16MiB.fmd M src/mainboard/google/hatch/chromeos-hatch-32MiB.fmd M src/mainboard/google/hatch/chromeos-puff-16MiB.fmd M src/mainboard/google/hatch/chromeos-puff-32MiB.fmd M src/mainboard/google/herobrine/chromeos.fmd M src/mainboard/google/jecht/chromeos.fmd M src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd M src/mainboard/google/kukui/chromeos.fmd M src/mainboard/google/link/chromeos.fmd M src/mainboard/google/mistral/chromeos.fmd M src/mainboard/google/nyan/chromeos.fmd M src/mainboard/google/nyan_big/chromeos.fmd M src/mainboard/google/nyan_blaze/chromeos.fmd M src/mainboard/google/oak/chromeos.fmd M src/mainboard/google/parrot/chromeos.fmd M src/mainboard/google/peach_pit/chromeos.fmd M src/mainboard/google/poppy/chromeos.fmd M src/mainboard/google/rambi/chromeos.fmd M src/mainboard/google/sarien/chromeos.fmd M src/mainboard/google/skyrim/chromeos.fmd M src/mainboard/google/slippy/chromeos.fmd M src/mainboard/google/smaug/chromeos.fmd M src/mainboard/google/storm/chromeos.fmd M src/mainboard/google/stout/chromeos.fmd M src/mainboard/google/trogdor/chromeos.fmd M src/mainboard/google/veyron/chromeos.fmd M src/mainboard/google/veyron_mickey/chromeos.fmd M src/mainboard/google/veyron_rialto/chromeos.fmd M src/mainboard/google/zork/chromeos.fmd M src/mainboard/intel/baskingridge/chromeos.fmd M src/mainboard/intel/cedarisland_crb/board.fmd M src/mainboard/intel/coffeelake_rvp/chromeos.fmd M src/mainboard/intel/coffeelake_rvp/chromeos_32MB.fmd M src/mainboard/intel/galileo/vboot.fmd M src/mainboard/intel/icelake_rvp/chromeos.fmd M src/mainboard/intel/jasperlake_rvp/chromeos.fmd M src/mainboard/intel/kblrvp/chromeos.fmd M src/mainboard/intel/kunimitsu/chromeos.fmd M src/mainboard/intel/shadowmountain/chromeos.fmd M src/mainboard/intel/strago/chromeos.fmd M src/mainboard/intel/tglrvp/chromeos.fmd M src/mainboard/intel/wtm2/chromeos.fmd M src/mainboard/lenovo/t400/vboot-rwa.fmd M src/mainboard/lenovo/t410/vboot-rwa.fmd M src/mainboard/lenovo/t420/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t420/vboot-ro.fmd M src/mainboard/lenovo/t420/vboot-rwa.fmd M src/mainboard/lenovo/t420s/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t420s/vboot-ro.fmd M src/mainboard/lenovo/t420s/vboot-rwa.fmd M src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t430/vboot-ro.fmd M src/mainboard/lenovo/t430/vboot-rwab.fmd M src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t430s/vboot-ro.fmd M src/mainboard/lenovo/t430s/vboot-rwab.fmd M src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t440p/vboot-ro.fmd M src/mainboard/lenovo/t440p/vboot-rwab.fmd M src/mainboard/lenovo/t520/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t520/vboot-ro.fmd M src/mainboard/lenovo/t520/vboot-rwa.fmd M src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t530/vboot-ro.fmd M src/mainboard/lenovo/t530/vboot-rwab.fmd M src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x131e/vboot-ro.fmd M src/mainboard/lenovo/x131e/vboot-rwab.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-rwab.fmd M src/mainboard/lenovo/x200/vboot-rwa.fmd M src/mainboard/lenovo/x201/vboot-rwa.fmd M src/mainboard/lenovo/x220/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x220/vboot-ro.fmd M src/mainboard/lenovo/x220/vboot-rwa.fmd M src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x230/vboot-ro.fmd M src/mainboard/lenovo/x230/vboot-rwab.fmd M src/mainboard/lenovo/x60/vboot-rwa.fmd M src/mainboard/opencellular/elgon/board.fmd M src/mainboard/opencellular/elgon/vboot.fmd M src/mainboard/samsung/lumpy/chromeos.fmd M src/mainboard/samsung/stumpy/chromeos.fmd M src/mainboard/siemens/mc_ehl/mc_ehl.fmd M src/mainboard/starlabs/labtop/variants/tgl/board.fmd M src/mainboard/ti/beaglebone/board.fmd M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/picasso/Makefile.inc M src/soc/amd/sabrina/Makefile.inc 122 files changed, 137 insertions(+), 125 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/63771/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/63771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99 Gerrit-Change-Number: 63771 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Kconfig: Add an option to omit a cbfs master header
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Arthur Heymans, Angel Pons, Julius Werner. Hello build bot (Jenkins), Christian Walter, Angel Pons, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63378 to look at the new patch set (#6). Change subject: Kconfig: Add an option to omit a cbfs master header ...................................................................... Kconfig: Add an option to omit a cbfs master header The CBFS master header is legacy feature that has no internal use in coreboot. Some payloads do depend on it however. Change-Id: Ib3d5b32412db40df48c0ed4dd6216bdd9cb955e2 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/Kconfig M src/lib/Makefile.inc 2 files changed, 12 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/63378/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/63378 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib3d5b32412db40df48c0ed4dd6216bdd9cb955e2 Gerrit-Change-Number: 63378 Gerrit-PatchSet: 6 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [NEEDTEST]soc/amd/non-car: Don't add bootblock cbfs file
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Angel Pons, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63226 to look at the new patch set (#13). Change subject: [NEEDTEST]soc/amd/non-car: Don't add bootblock cbfs file ...................................................................... [NEEDTEST]soc/amd/non-car: Don't add bootblock cbfs file The bootblock.elf file gets embedded in the BIOSPSP part and loaded by the PSP in dram. The top aligned bootblock in cbfs is unused. Change-Id: I72f0092e0e3628b388f6da6a417c2857a510b187 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/amd/common/block/cpu/Kconfig 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/63226/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/63226 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I72f0092e0e3628b388f6da6a417c2857a510b187 Gerrit-Change-Number: 63226 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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