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Change subject: soc/intel/alderlake: Refactor `pmc_lockdown_cfg` function
......................................................................
Patch Set 1: Code-Review+2
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Change subject: soc/intel/cmn/pch/lockdown: Implement LPC lock down configuration
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Patch Set 6: Code-Review+2
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Change subject: ec/google/chromeec: allow custom command timeout
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63733/comment/2edc3037_fe4bb889
PS1, Line 17:
> This can occur when a new AP firmware is installed that also provides a new EC firmware, so the EC n […]
I like the idea.
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Change subject: console: Add IO port serial logging
......................................................................
Patch Set 5:
(2 comments)
Patchset:
PS5:
Very nice. Please change the mainboard code in a separate commit.
File src/console/Kconfig:
https://review.coreboot.org/c/coreboot/+/61311/comment/b4a736ee_1b8ebfd7
PS5, Line 489: config CONSOLE_AMD_IO_PORT
Why is that AMD specific? (If so, it needs to be clarified in the commit message.)
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Change subject: mb/prodrive/atlas: Fix build error
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Patch Set 3:
(1 comment)
Patchset:
PS3:
sure, will do next time.
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Change subject: security/intel/cbnt/Makefile.inc: Improve build flow
......................................................................
Patch Set 18:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56119/comment/8275d553_8ff4ec0b
PS11, Line 9: is not needed any longer
> Done
It’s not done in patch set 18, I think.
(Should you repush, please reflow for 72 characters per line.)
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Change subject: mb/prodrive/atlas: Fix build error
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Patch Set 3: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63773/comment/092e4a5d_71bd92e2
PS3, Line 7: mb/prodrive/atlas: Fix build error
Thank yo ufor the patch. Next time, it’d be great if you use a more specific commit message summary. Maybe something like
> Use MEMORY_MAPPED_TPM in Kconfig to fix build
https://review.coreboot.org/c/coreboot/+/63773/comment/0cbe17fb_7cf07113
PS3, Line 9: commit c6b041a12e
Commit c6b041a12e (tpm: Refactor TPM Kconfig dimensions) …
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Change subject: mb/*/*/*.fmd: Start flash at 0
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Patch Set 2: Code-Review+1
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Change subject: lib/spd: Change log prefix for ddr4 params
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
We need this to pass suspend stress test. It will check FW log errors.
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Change subject: lib/spd: Change log prefix for ddr4 params
......................................................................
lib/spd: Change log prefix for ddr4 params
Reduce log level due to this is not error.
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: I55f0968b78baaa2fc9a6bbebf6712fb8bfd349f6
---
M src/lib/spd_bin.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/63774/1
diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c
index 1b236b0..2d33c34 100644
--- a/src/lib/spd_bin.c
+++ b/src/lib/spd_bin.c
@@ -38,7 +38,7 @@
case SPD_DRAM_LPDDR4X:
return true;
default:
- printk(BIOS_ERR, "Defaulting to using DDR4 params. Please add dram_type check for %d to %s\n",
+ printk(BIOS_WARNING, "Defaulting to using DDR4 params. Please add dram_type check for %d to %s\n",
dram_type, __func__);
return true;
}
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