coreboot-gerrit April 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/sabrina: enable warm reset functionality
by Felix Held (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Fred Reitberger, Karthik Ramasubramanian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63741 to look at the new patch set (#2). Change subject: soc/amd/sabrina: enable warm reset functionality ...................................................................... soc/amd/sabrina: enable warm reset functionality Commit 3e1943ec46d04aff01c7fc755ac371e33e7a2dcb (soc/amd/cezanne: Force resets to be cold) forced all resets on Cezanne to be cold resets to work around a bug. Since the bug is fixed on Sabrina, this workaround copied over from the Cezanne code isn't needed here, so sort-of revert what the patch referenced above changed for Cezanne in the Sabrina code. BUG=b:229105416 Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I785e43124a9a969eeb129454e6e15dc245625250 --- M src/soc/amd/sabrina/fch.c M src/soc/amd/sabrina/reset.c 2 files changed, 1 insertion(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/63741/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63741 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I785e43124a9a969eeb129454e6e15dc245625250 Gerrit-Change-Number: 63741 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: tpm: Allow separate handling of Google Ti50 TPM
by Jes Klinke (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Christian Walter, Julius Werner, Angel Pons, Jett Rink. Jes Klinke has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63158 ) Change subject: tpm: Allow separate handling of Google Ti50 TPM ...................................................................... Patch Set 17: (3 comments) File src/drivers/spi/tpm/tpm.c: https://review.coreboot.org/c/coreboot/+/63158/comment/011737fb_f672e677 PS16, Line 502: (tpm_info.vendor_id == 0x1ae0 > FWIW I'm not sure why this check is here in the first place. […] Done File src/drivers/tpm/cr50.c: https://review.coreboot.org/c/coreboot/+/63158/comment/456acd0a_57b8bd4b PS16, Line 104: if (!CONFIG(TPM_GOOGLE_CR50)) > So now you check the same Kconfig both in the caller and the callee... […] Done https://review.coreboot.org/c/coreboot/+/63158/comment/46e03135_c7973342 PS16, Line 158: return false; > Does this line have any purpose? We don't have a TPM_GOOGLE that's neither cr50 nor ti50 right now, […] You are right that we do not need to guard against "unrecognized" GSCs which do not support long enough pulses, as we have none, and any future GSC_TI50_OPENTITAN will also use long pulses as the only option. -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 17 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jett Rink <jettrink(a)google.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 20:59:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: tpm: Allow separate handling of Google Ti50 TPM
by Jes Klinke (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jes Klinke, Tim Wawrzynczak, Christian Walter, Angel Pons, Jett Rink. Hello build bot (Jenkins), Tim Wawrzynczak, Christian Walter, Julius Werner, Jett Rink, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63158 to look at the new patch set (#17). Change subject: tpm: Allow separate handling of Google Ti50 TPM ...................................................................... tpm: Allow separate handling of Google Ti50 TPM A new iteration of Google's TPM implementation will advertize a new DID:VID, but otherwise follow the same protocol as the earlier design. This change makes use of Kconfigs TPM_GOOGLE_CR50 and TPM_GOOGLE_TI50 to be able to take slightly different code paths, when e.g. evaluating whether TPM firmware is new enough to support certain features. Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Signed-off-by: Jes B. Klinke <jbk(a)chromium.org> --- M src/drivers/i2c/tpm/Kconfig M src/drivers/i2c/tpm/cr50.c M src/drivers/spi/tpm/tpm.c M src/drivers/tpm/cr50.c M src/drivers/tpm/cr50.h M src/mainboard/google/brya/Kconfig 6 files changed, 32 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/63158/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/63158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e1f8eb9b94fc2d5689656335dc1135b47880986 Gerrit-Change-Number: 63158 Gerrit-PatchSet: 17 Gerrit-Owner: Jes Klinke <jbk(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jett Rink <jettrink(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jes Klinke <jbk(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jett Rink <jettrink(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: [WIP] FMAP: Refactor CBMEM hook
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Julius Werner, Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63395 ) Change subject: [WIP] FMAP: Refactor CBMEM hook ...................................................................... Patch Set 3: Code-Review+1 (1 comment) File src/lib/fmap.c: https://review.coreboot.org/c/coreboot/+/63395/comment/185267a9_30a4e385 PS3, Line 322: fmap_register_cbmem_cache(); > We call this even if there is failure within fmap_add_cbmem_cache(), do we care? Wouldn't it fail to boot later then? There are error messages so I think that's fine? -- To view, visit https://review.coreboot.org/c/coreboot/+/63395 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib1257c57c64322c8c3dccdf1a754afb9b54ce7f8 Gerrit-Change-Number: 63395 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 20:35:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: timestamp: Replace TS_ROMSTAGE_END conditional
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Tim Wawrzynczak, Kyösti Mälkki. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63432 ) Change subject: timestamp: Replace TS_ROMSTAGE_END conditional ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63432 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I713732a291b6a6c0d8fcb23266f765fd33816db8 Gerrit-Change-Number: 63432 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 20:33:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/*: Set SMM SMRR code access check bit
by Tim Wawrzynczak (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jeff Daly, Subrata Banik, Mariusz Szafrański, Suresh Bellampalli, Paul Menzel, Vanessa Eusebio, Arthur Heymans. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63788 ) Change subject: cpu/intel/*: Set SMM SMRR code access check bit ...................................................................... Patch Set 4: (1 comment) File src/include/cpu/intel/smm_reloc.h: https://review.coreboot.org/c/coreboot/+/63788/comment/80810095_d0f412c1 PS4, Line 91: #define SMM_MCA_CAP_MSR 0x17d : #define SMM_CODE_ACCESS_CHK_BIT 58 : #define SMM_CODE_ACESSS_CHK_MASK (1 << (SMM_CODE_ACCESS_CHK_BIT - 32)) : : #define SMM_FEATURE_CONTROL_MSR 0x4e0 : #define SMM_FEATURE_CONTROL_LOCK (1 << 0) : #define SMM_CODE_CHK_EN (1 << 2) > > nit: align right side with tabs […] I use emacs too, but my c-mode setup doesn't auto-indent the whole file all the time. I just use the `linux` c-style for coreboot and manually indent with M-i 😋 -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 22 Apr 2022 20:27:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: console: Add IO port serial logging
by Alexey Buyanov (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Nico Huber, Marshall Dawson, Paul Menzel, Julius Werner, Nikolai Vyssotski, Fred Reitberger, Felix Held. Alexey Buyanov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61311 ) Change subject: console: Add IO port serial logging ...................................................................... Patch Set 5: (1 comment) File src/arch/x86/post.c: https://review.coreboot.org/c/coreboot/+/61311/comment/3c23eb98_b453d062 PS5, Line 10: if (CONFIG(CONSOLE_AMD_IO_PORT)) : outl(AMD_IO_PORT_DATA_END, CONFIG_POST_IO_PORT); > The Simnow console that's listening to IO port80. It includes both serial coreboot log and the postcodes. -- To view, visit https://review.coreboot.org/c/coreboot/+/61311 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87afea28535e03ef39e104e353255a901015973b Gerrit-Change-Number: 61311 Gerrit-PatchSet: 5 Gerrit-Owner: Alexey Buyanov <al3xbuy(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alexey Buyanov <alexey.buyanov(a)amd.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 22 Apr 2022 20:19:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alexey Buyanov <al3xbuy(a)gmail.com> Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: console: Add IO port serial logging
by Alexey Buyanov (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Nico Huber, Marshall Dawson, Paul Menzel, Julius Werner, Nikolai Vyssotski, Fred Reitberger, Felix Held. Alexey Buyanov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61311 ) Change subject: console: Add IO port serial logging ...................................................................... Patch Set 5: (1 comment) File src/arch/x86/post.c: https://review.coreboot.org/c/coreboot/+/61311/comment/1deb15f5_07345be4 PS5, Line 10: if (CONFIG(CONSOLE_AMD_IO_PORT)) : outl(AMD_IO_PORT_DATA_END, CONFIG_POST_IO_PORT); > Which logs were you looking at? The coreboot logs or the simnow logs? The Simnow console that's listening to IO port80. -- To view, visit https://review.coreboot.org/c/coreboot/+/61311 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87afea28535e03ef39e104e353255a901015973b Gerrit-Change-Number: 61311 Gerrit-PatchSet: 5 Gerrit-Owner: Alexey Buyanov <al3xbuy(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alexey Buyanov <alexey.buyanov(a)amd.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 22 Apr 2022 20:17:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alexey Buyanov <al3xbuy(a)gmail.com> Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: cpu/intel/*: Set SMM SMRR code access check bit
by Arthur Heymans (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Jeff Daly, Subrata Banik, Mariusz Szafrański, Tim Wawrzynczak, Suresh Bellampalli, Paul Menzel, Vanessa Eusebio. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63788 ) Change subject: cpu/intel/*: Set SMM SMRR code access check bit ...................................................................... Patch Set 4: (1 comment) File src/include/cpu/intel/smm_reloc.h: https://review.coreboot.org/c/coreboot/+/63788/comment/cfd84c10_605277aa PS4, Line 91: #define SMM_MCA_CAP_MSR 0x17d : #define SMM_CODE_ACCESS_CHK_BIT 58 : #define SMM_CODE_ACESSS_CHK_MASK (1 << (SMM_CODE_ACCESS_CHK_BIT - 32)) : : #define SMM_FEATURE_CONTROL_MSR 0x4e0 : #define SMM_FEATURE_CONTROL_LOCK (1 << 0) : #define SMM_CODE_CHK_EN (1 << 2) > nit: align right side with tabs Ok. Btw my editor (emacs + lsp) always does this... If you happen to know how to fix that, I would be delighted ^^ -- To view, visit https://review.coreboot.org/c/coreboot/+/63788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Gerrit-Change-Number: 63788 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Comment-Date: Fri, 22 Apr 2022 20:07:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: console: Add IO port serial logging
by Raul Rangel (Code Review) 22 Apr '22

22 Apr '22

Attention is currently required from: Alexey Buyanov, Jason Glenesk, Nico Huber, Marshall Dawson, Paul Menzel, Julius Werner, Nikolai Vyssotski, Fred Reitberger, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61311 ) Change subject: console: Add IO port serial logging ...................................................................... Patch Set 5: (1 comment) File src/arch/x86/post.c: https://review.coreboot.org/c/coreboot/+/61311/comment/7318738a_66182503 PS5, Line 10: if (CONFIG(CONSOLE_AMD_IO_PORT)) : outl(AMD_IO_PORT_DATA_END, CONFIG_POST_IO_PORT); > I started with this approach, but soon realized that not only performance affected (in current versi […] Which logs were you looking at? The coreboot logs or the simnow logs? -- To view, visit https://review.coreboot.org/c/coreboot/+/61311 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87afea28535e03ef39e104e353255a901015973b Gerrit-Change-Number: 61311 Gerrit-PatchSet: 5 Gerrit-Owner: Alexey Buyanov <al3xbuy(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alexey Buyanov <alexey.buyanov(a)amd.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Alexey Buyanov <al3xbuy(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 22 Apr 2022 19:55:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alexey Buyanov <al3xbuy(a)gmail.com> Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit April 2022