coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell
by Tim Wawrzynczak (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Robert Chen, Shon Wang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61847 ) Change subject: mb/google/brya/var/vell: Add 5G WWAN ACPI support for vell ...................................................................... Patch Set 22: (1 comment) Patchset: PS18: > Build unstable. I think we will have another CL to move rp devices. so is this obsolete due to CB:62771 ? -- To view, visit https://review.coreboot.org/c/coreboot/+/61847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If6d3f965b8f6b6753446f55a8bd47d3b0c1ae7be Gerrit-Change-Number: 61847 Gerrit-PatchSet: 22 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Mon, 14 Mar 2022 17:27:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Comment-In-Reply-To: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: Documentation: Describe our Coverity Scan integration
by Felix Singer (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Patrick Georgi, Paul Menzel. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62666 ) Change subject: Documentation: Describe our Coverity Scan integration ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62666 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a2b68a4b4b54c7345280b252d624799316641b1 Gerrit-Change-Number: 62666 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 14 Mar 2022 17:27:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add IOE P2SB for TCSS
by John Zhao (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Subrata Banik, Ravishankar Sarawadi, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62721 ) Change subject: soc/intel/common: Add IOE P2SB for TCSS ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/include/intelblocks/p2sb.h: https://review.coreboot.org/c/coreboot/+/62721/comment/1e5650a8_a1cd0037 PS3, Line 33: uint32_t ioe_p2sb_sbi_read(uint8_t pid, uint16_t reg); > can I request you to add a help comment section here with details about `arguments`. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19 Gerrit-Change-Number: 62721 Gerrit-PatchSet: 5 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Mon, 14 Mar 2022 17:21:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common: Add IOE P2SB for TCSS
by John Zhao (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Ravishankar Sarawadi, John Zhao, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Hello build bot (Jenkins), Wonkyu Kim, Subrata Banik, Ravishankar Sarawadi, Tim Wawrzynczak, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62721 to look at the new patch set (#5). Change subject: soc/intel/common: Add IOE P2SB for TCSS ...................................................................... soc/intel/common: Add IOE P2SB for TCSS Meteor Lake has the IOE Die for TCSS. This change adds the IOE P2SB sideband access and exposes API for TCSS usage. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19 Signed-off-by: John Zhao <john.zhao(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/p2sb.h M src/soc/intel/common/block/p2sb/Kconfig M src/soc/intel/common/block/p2sb/Makefile.inc A src/soc/intel/common/block/p2sb/ioe_p2sb.c M src/soc/intel/common/block/p2sb/p2sb.c 5 files changed, 75 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/62721/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/62721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19 Gerrit-Change-Number: 62721 Gerrit-PatchSet: 5 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common: Add IOE P2SB for TCSS
by John Zhao (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Ravishankar Sarawadi, John Zhao, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Hello build bot (Jenkins), Wonkyu Kim, Subrata Banik, Ravishankar Sarawadi, Tim Wawrzynczak, Eric Lai, Angel Pons, Patrick Rudolph, EricR Lai, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62721 to look at the new patch set (#4). Change subject: soc/intel/common: Add IOE P2SB for TCSS ...................................................................... soc/intel/common: Add IOE P2SB for TCSS Meteor Lake has the IOE Die for TCSS. This change adds the IOE P2SB sideband access and exposes API for TCSS usage. BUG=b:213574324 TEST=Build platforms coreboot images successfully. Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19 Signed-off-by: John Zhao <john.zhao(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/p2sb.h M src/soc/intel/common/block/p2sb/Kconfig M src/soc/intel/common/block/p2sb/Makefile.inc A src/soc/intel/common/block/p2sb/ioe_p2sb.c M src/soc/intel/common/block/p2sb/p2sb.c 5 files changed, 75 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/62721/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/62721 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19 Gerrit-Change-Number: 62721 Gerrit-PatchSet: 4 Gerrit-Owner: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block/p2sb: Add helper function to enable BAR
by John Zhao (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Wonkyu Kim, Tim Wawrzynczak, John Zhao, Angel Pons, Nick Vaccaro, Eric Lai, Patrick Rudolph. John Zhao has uploaded a new patch set (#3) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/62778 ) Change subject: soc/intel/common/block/p2sb: Add helper function to enable BAR ...................................................................... soc/intel/common/block/p2sb: Add helper function to enable BAR This patch creates a new helper function to enable P2SB BAR. `p2sb_dev_enable_bar()` takes the PCI P2SB device address (B/D/F) and BAR addresses (both high and low). BUG=b:224325352 TEST=Able to build and boot brya. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ica41e8e8bdfcfe855e730b3878b874070062ef93 --- M src/soc/intel/common/block/include/intelblocks/p2sblib.h M src/soc/intel/common/block/p2sb/Makefile.inc M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/common/block/p2sb/p2sblib.c 4 files changed, 14 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/62778/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62778 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica41e8e8bdfcfe855e730b3878b874070062ef93 Gerrit-Change-Number: 62778 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Wonkyu Kim Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/common/block/p2sb: Refactor P2SB to add comprehend future SoC
by John Zhao (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Wonkyu Kim, Subrata Banik, Tim Wawrzynczak, John Zhao, Nick Vaccaro, Eric Lai, Patrick Rudolph. John Zhao has uploaded a new patch set (#3) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/62774 ) Change subject: soc/intel/common/block/p2sb: Refactor P2SB to add comprehend future SoC ...................................................................... soc/intel/common/block/p2sb: Refactor P2SB to add comprehend future SoC This patch refactors the current P2SB common code driver to accommodate the future SoC platform with provision of more than one P2SB IP in disaggregated die architecture. IA SoC has only one P2SB in PCH die between SKL to ADL. Starting with MTL, one more P2SB IP resides in IOE die along with SoC die (PCH die is renamed as SoC in MTL). P2SB library (p2sblib.c) is common between PCH/SoC and IOE, and p2sb.c is added only for PCH/SoC P2SB. BUG=b:224325352 TEST=Able to build and boot brya. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ib671d9acbfdc61305ebb401499bfc4742b738ffb --- M src/soc/intel/common/block/p2sb/Kconfig M src/soc/intel/common/block/p2sb/Makefile.inc 2 files changed, 16 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/62774/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62774 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib671d9acbfdc61305ebb401499bfc4742b738ffb Gerrit-Change-Number: 62774 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Wonkyu Kim Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: John Zhao <john.zhao(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/cbmem: Add FlameGraph-compatible timestamps output
by Jakub Czapiga (Code Review) 14 Mar '22

14 Mar '22

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Change in coreboot[master]: commonlib/timestamp_serialized: Add timestamp enum to name mapping
by build bot (Jenkins) (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Julius Werner. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62709 ) Change subject: commonlib/timestamp_serialized: Add timestamp enum to name mapping ...................................................................... Patch Set 4: (8 comments) File src/commonlib/include/commonlib/timestamp_serialized.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/cc0ee96b_8bc22b67 PS4, Line 171: #define ts_enum_name_pair(e) e, XSTR(e) Macros with complex values should be enclosed in parentheses Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/9f310ca9_b0e6c4b6 PS4, Line 225: { ts_enum_name_pair(TS_VERIFY_SLOT_START), "starting to verify keyblock/preamble (RSA)" }, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/766c1b9b_c769af69 PS4, Line 237: { ts_enum_name_pair(TS_EC_POWER_LIMIT_WAIT), "waiting for EC to allow higher power draw" }, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/f2731a35_b9927e95 PS4, Line 272: { ts_enum_name_pair(TS_ME_INFORM_DRAM_START), "waiting for ME acknowledgement of raminit"}, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/3d25901c_8b1f94e8 PS4, Line 279: { ts_enum_name_pair(TS_ME_RECEIVED_CRDA_FROM_PMC), "CSE received 'CPU Reset Done Ack sent' from PMC"}, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/dbaab9c3_6c228123 PS4, Line 291: { ts_enum_name_pair(TS_FSP_MULTI_PHASE_SI_INIT_END), "returning from FspMultiPhaseSiInit" }, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/c47dd75e_bf285fb4 PS4, Line 318: { ts_enum_name_pair(TS_VB_STORAGE_INIT_DONE), "finished storage device initialization" }, line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-143909): https://review.coreboot.org/c/coreboot/+/62709/comment/588641fd_d302bc30 PS4, Line 323: { ts_enum_name_pair(TS_KERNEL_DECOMPRESSION), "starting kernel decompression/relocation" }, line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/62709 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifd49f20d6b00a5bbd21804cea3a50b8cef074cd1 Gerrit-Change-Number: 62709 Gerrit-PatchSet: 4 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Mon, 14 Mar 2022 16:57:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbmem: Add FlameGraph-compatible timestamps output
by Jakub Czapiga (Code Review) 14 Mar '22

14 Mar '22

Attention is currently required from: Tim Wawrzynczak, Paul Menzel, Alex Levin, Julius Werner, Jan Dabros. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62474 ) Change subject: util/cbmem: Add FlameGraph-compatible timestamps output ...................................................................... Patch Set 8: (6 comments) File src/commonlib/include/commonlib/timestamp_serialized.h: https://review.coreboot.org/c/coreboot/+/62474/comment/64870dc7_2635acff PS7, Line 454: uint32_t id_end; > I'd maybe put this in the other table too, as an optional "corresponding end" id for each start id. It won't work. Look at TS_COPYVPD_START. It has two possible ends. Moreover, I'd like to keep it as separate in order to let compiler/linker strip it from the final coreboot builds, as it probably won't be used by it. File util/cbmem/cbmem.c: https://review.coreboot.org/c/coreboot/+/62474/comment/056d6d8f_681f330e PS7, Line 665: process_subrange > Function name should probably still have something to do with timestamps, e.g. […] Done https://review.coreboot.org/c/coreboot/+/62474/comment/1b8679a2_d8e93d33 PS7, Line 668: for (uint32_t i = start; i < end;) { > Well... this is... uhh... super complicated. […] Ack https://review.coreboot.org/c/coreboot/+/62474/comment/c9698bd6_6d80f352 PS7, Line 715: /* Skip first timestamp, as it only marks the start of coreboot execution */ > Don't rely on that, we've recently added the option of inserting "negative" timestamps in front of t […] Ack https://review.coreboot.org/c/coreboot/+/62474/comment/fd0fb1f2_22a98bb1 PS7, Line 782: } else { > So I'm basically thinking, rather than using recursion, just maintain an explicit stack of ranges he […] Wow, that helped reuse a lot of code. Nice :D Btw., I also added end_name (name of end timestamp) to shorten the code a little. https://review.coreboot.org/c/coreboot/+/62474/comment/0ed28741_e688c8a5 PS7, Line 796: timestamp_print_entry(tse->entry_id, stamp, prev_stamp); > ...and then insert the stacked printing here with the others: […] After few fixes it works well. Thank you. Iterative solution is indeed much better than recursive one :) -- To view, visit https://review.coreboot.org/c/coreboot/+/62474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a4e20a267e9e0fbc6b3a4d6a2409b32ce8fca33 Gerrit-Change-Number: 62474 Gerrit-PatchSet: 8 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Alex Levin <levinale(a)google.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Alex Levin <levinale(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Comment-Date: Mon, 14 Mar 2022 16:51:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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coreboot-gerrit March 2022